JP6295206B2 - Multilayer printed wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a multilayer printed wiring board and a method for manufacturing the same. In particular, the present invention relates to a multilayer printed wiring board manufactured by a built-up method.

  Conventionally, multilayer printed wiring boards have been widely used to achieve the purpose of increasing the signal transmission speed and reducing the mounting area as a printed wiring board. This multilayer printed wiring board is used by mounting various electronic components. Various methods such as a solder reflow method and a wire bonding method are used for mounting electronic components on the multilayer printed wiring board. At this time, if the multilayer printed wiring board has “warp”, “twist”, and “dimensional change”, it is not preferable because good electronic components cannot be mounted. In particular, when the built-up method is used as a manufacturing method for multilayer printed wiring boards, “warping”, “twisting”, and “dimensional change” are likely to occur even during processing. Technology has been advocated. Such prior art will be exemplified below.

  Patent Document 1 (Japanese Patent Application Laid-Open No. 11-261228) describes “a core substrate with an interlayer” for the purpose of providing a multilayer printed wiring board having small dimensional changes in the XY direction and Z direction and less surface waviness and warpage. In a multilayer printed wiring board in which a resin insulating layer and a conductor layer are alternately laminated, a prepreg having a thickness of 0.15 mm or less in which a core substrate is impregnated with a bismaleimide triazine resin in a low thermal expansion fiber cloth such as a glass cloth. At this time, by reducing the thickness per sheet of the resin-impregnated prepreg and increasing the number of sheets, the core substrate in which the prepreg is laminated, that is, the multilayer printed wiring board in the XY direction is formed. The technique of preventing dimensional change and warping is disclosed.

  Patent Document 2 (Japanese Patent Laid-Open No. 2003-086941) provides a printed wiring board that can reduce the occurrence of warping due to thermal history and can easily form the outermost conductor layer with a fine pattern. In the printed wiring board formed by alternately building up a plurality of insulating resin layers and conductor layers on the surface of the inner layer circuit board, the outermost insulating resin layer is based on glass cloth. A printed wiring board characterized in that it is formed as a resin-based layer not contained as a material, and the second insulating resin layer from the outermost layer is formed as a layer containing glass cloth as a base material. Is adopted.

  Patent Document 3 (Japanese Patent Application Laid-Open No. 2004-342827) discloses a material having a low elasticity and a low elastic modulus compared to a multilayer printed wiring board in which IVH is filled with a resin and built up and laminated only by a resin layer. For the purpose of obtaining a printed wiring board having excellent surface irregularities, heat resistance, and migration resistance as compared with a multilayer printed wiring board produced only with a prepreg, the front and back of the inner layer board having IVH A printed wiring having a structure in which an organic film base resin composition or a resin composition layer without base material reinforcement is formed and filled with IVH, and at least the outermost layer is a fiber nonwoven base material reinforcing resin composition layer. A manufacturing method is adopted.

  Patent Document 4 (Japanese Patent Application Laid-Open No. 2008-307886) discloses that “a metal foil is arranged on a prepreg and formed for the purpose of providing a method for manufacturing a metal-clad laminate and a multilayer laminate with reduced warpage. A first step of heating and pressurizing the laminated body at a predetermined molding temperature and a predetermined first molding pressure, and a pressure ratio of at least 5 minutes from a predetermined time after the heating and pressurizing by the first step While pressing the laminate at a second molding pressure that is 0.4 or less of the first molding pressure, the temperature of the laminate is maintained at a temperature that is 5 ° C. lower than the temperature at which the prepreg has the lowest melt viscosity. It includes two steps and a third step of cooling and forming the laminated body after 30 minutes or more have passed since the predetermined time point. It is disclosed.

JP-A-11-261228 JP 2003/086941 A JP 2004-342827 A JP 2008-307886 A

  However, the inventions disclosed in any of the above-mentioned Patent Documents 1 to 4 have various problems in actual operation, and “warping”, “twisting”, “dimension change” of the multilayer printed wiring board. "It was pointed out that each of the problems could not be solved completely. Considering the problems of the invention disclosed in each of the above cited references, the following is obtained.

In the technique disclosed in Patent Document 1, there is a restriction that “ a prepreg is formed by stacking six or more layers ” , and there is a restriction on the layer configuration in the Z direction of the multilayer printed wiring board. Although the dimensional change and warpage in the Y direction can be prevented, there is a certain limit to reducing the thickness in the Z direction.

  Moreover, according to the technique disclosed in Patent Document 2, in the printed wiring board obtained by the build-up method, “the outermost insulating resin layer is formed as a resin-based layer not containing glass cloth as a base material. And “the second insulating resin layer from the outermost layer is formed as a layer containing glass cloth as a base material” must be satisfied.

  According to the technique disclosed in Patent Document 3, “filling with IVH after forming an organic film base resin composition or a resin composition layer without base reinforcement on the front and back of the inner layer plate having IVH”, And it is necessary to satisfy the two conditions of “at least the outermost layer is formed of a resin composition layer for reinforcing a nonwoven fabric substrate”.

  Further, according to the technique disclosed in Patent Document 4, “the pressure ratio is 0.4 or less of the first molding pressure for a period of at least 5 minutes from the predetermined time point after the heating and pressurizing in the first step. There is a second step in which the temperature of the laminate is maintained at a temperature 5 ° C. lower than the temperature at which the prepreg has the lowest melt viscosity while pressing the laminate at a certain second molding pressure. As described above, the manufacturing process becomes complicated, and the quality of the product obtained tends to vary.

  As can be understood from the above, the phenomenon of "warping", "twisting", and "dimensional change" of the multilayer printed wiring board obtained by using the conventional built-up method is reduced, and variations in these phenomena are reduced. There has been a demand for a simplified multilayer printed wiring board and a manufacturing method thereof.

  Therefore, as a result of diligent research, the inventors of the present invention simply changed the manufacturing method, or changed the layer configuration of the multilayer printed wiring board, so that the multilayer printed wiring board obtained by using the built-up method was warped and twisted.・ Recognized that it is difficult to suppress “dimensional changes” without variation. As a result, by adopting the following technical concept, it is possible to reduce variations among printed wiring board products even if the multilayer printed wiring board has slight “warping”, “twist”, and “dimensional change”. I came up with it. The outline of the invention related to the present application will be described below.

1. Multilayer printed wiring board The multilayer printed wiring board according to the present application is a multilayer printed wiring board in which two or more built-up wiring layers are provided on both sides of the core board, and the core board constituting the multilayer printed wiring board is insulated. The layer thickness is 150 μm or less, the inner layer circuit is provided on both surfaces of the skeleton material-containing insulating layer, and the XY direction linear expansion coefficient of the skeleton material-containing insulating layer is 0 ppm / ° C. to 20 ppm / ° C. The first built-up wiring layer provided on both surfaces of the core substrate and the second built-up wiring layer provided on the surface of the first built-up wiring layer have a copper circuit layer and an XY direction linear expansion coefficient of 1 ppm / ° C. It consists of an insulating resin layer of 50 ppm / ° C., and the value of the X direction linear expansion coefficient (Bx) and the Y direction linear expansion coefficient (By) of the insulating resin layer is [Bx] / [By] = 0. .9-1.1 relationship Characterized in that the plus.

  The insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application preferably has a tensile elastic modulus at 25 ° C. of 5 GPa to 10 GPa.

  The insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application preferably has a thickness of 20 μm to 80 μm.

  The insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application preferably has a relative dielectric constant of 3.5 or less.

  It is preferable to provide a built-up wiring layer including an insulating resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa on the outermost layer of the multilayer printed wiring board according to the present application.

2. Manufacturing method of multilayer printed wiring board The manufacturing method of the multilayer printed wiring board concerning this application includes the concept of the following two manufacturing methods. Therefore, they are referred to as a first manufacturing method and a second manufacturing method.

<First manufacturing method>
This 1st manufacturing method is the manufacturing method of the above-mentioned multilayer printed wiring board characterized by including the following processes 1 ~ 3.

Step 1: Using a copper-clad laminate having a copper foil layer on the surface of a skeleton-containing insulating layer having an insulating layer thickness of 150 μm or less and an X-Y direction linear expansion coefficient of 0 ppm / ° C. to 20 ppm / ° C. Then, an inner layer circuit is formed to obtain a core substrate.
Step 2: Using a copper foil with a semi-cured resin layer in which a semi-cured resin layer in which the XY linear expansion coefficient of the cured insulating resin layer is 1 ppm / ° C. to 50 ppm / ° C. is formed on the surface of the copper foil. Then, the semi-cured resin layer side of the copper foil with the semi-cured resin layer is brought into contact with both surfaces of the core substrate and laminated to obtain a first laminated board with a build-up wiring layer.
Step 3: The semi-cured resin layer of the copper foil with the semi-cured resin layer is brought into contact with the surface of the laminate with the first build-up wiring layer to further form a built-up layer composed of an insulating resin layer and a copper foil layer. Then, an operation for forming a circuit is set as a first unit process, and this first unit process is repeated n ₁ times (an integer of n ₁ ≧ 1) on both surfaces of the laminated board with the first buildup wiring layer. Then, a multilayer printed wiring board having (4 + 2n ₁ ) layer built-up layers on both surfaces of the core substrate is obtained.

<Second manufacturing method>
This 2nd manufacturing method is the manufacturing method of the above-mentioned multilayer printed wiring board characterized by including the following processes 1 ~ 4.

Step 1: Using a copper-clad laminate having a copper foil layer on the surface of a skeleton-containing insulating layer having an insulating layer thickness of 150 μm or less and an X-Y direction linear expansion coefficient of 0 ppm / ° C. to 20 ppm / ° C. Then, an inner layer circuit is formed to obtain a core substrate.
Step 2: Using a copper foil with a semi-cured resin layer in which a semi-cured resin layer in which the XY linear expansion coefficient of the cured insulating resin layer is 1 ppm / ° C. to 50 ppm / ° C. is formed on the surface of the copper foil. Then, the semi-cured resin layer side of the copper foil with the semi-cured resin layer is brought into contact with both surfaces of the core substrate and laminated to obtain a first laminated board with a build-up wiring layer.
Step 3: The semi-cured resin layer of the copper foil with the semi-cured resin layer is brought into contact with the surface of the laminate with the first build-up wiring layer to further form a built-up layer composed of an insulating resin layer and a copper foil layer. Then, an operation for forming a circuit is set as a first unit process, and this first unit process is repeated n ₁ times (an integer of n ₁ ≧ 1) on both surfaces of the laminated board with the first buildup wiring layer. A multilayer printed wiring board having (4 + 2n ₁ ) built-up wiring layers on both surfaces of the core substrate is obtained.
Step 4: A semi-cured resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa after curing is formed on the surface of the (4 + 2n ₁ ) layer of the built-up wiring layer formed using the first unit step. Using the copper foil with a cured resin layer, the second unit process is defined as an operation in which the semi-cured resin layer side of the copper foil with the semi-cured resin layer is brought into contact with each other to perform circuit formation. carried out _twice (n ₂ ≧ 1 integer) repeatedly, with a built-up layer of the layer structure of both sides of the core substrate {4 + 2 (n 1 + n 2)} layer, and a tensile modulus at 25 ° C. in the outermost layer A multilayer printed wiring board having a built-up wiring layer provided with an insulating resin layer of less than 5.0 GPa is obtained.

  In the multilayer printed wiring board according to the present application, the X-Y direction linear expansion coefficient of the insulating layer of the core substrate and the X-Y direction linear expansion coefficient of the insulating resin layer constituting the built-up wiring layers provided on both surfaces thereof are By grasping the above-mentioned conditions and relationships, “warping”, “twisting”, and “dimensional change” of multilayer printed wiring boards with two or more built-up wiring layers on both sides of the core substrate can be reliably reduced without variation. Will be.

It is a schematic cross section of the multilayer printed wiring board according to the present application. It is a schematic diagram for demonstrating the manufacturing process of the multilayer printed wiring board which concerns on this application. It is a schematic diagram for demonstrating the manufacturing process of the multilayer printed wiring board which concerns on this application. It is a schematic diagram for demonstrating the manufacturing process of the multilayer printed wiring board which concerns on this application. It is a schematic diagram for demonstrating the manufacturing process of the multilayer printed wiring board which concerns on this application. It is a schematic cross section of an eight-layer multilayer printed wiring board according to the present application.

  Hereinafter, the form of the multilayer printed wiring board according to the present application and the form of the manufacturing method of the multilayer printed wiring board according to the present application will be described.

1. Form of Multilayer Printed Wiring Board A multilayer printed wiring board 1 according to the present application includes two or more first built-up wiring layers Bu1 and second built-up wiring layers Bu2 on both surfaces of a core substrate 2, and a cross-sectional schematic view in FIG. It has the layer structure shown in the figure. If the “first built-up wiring layer Bu1” and the “second built-up wiring layer Bu2” constituting the multilayer printed wiring board 1 according to the present application satisfy the conditions described below, the third and subsequent layers are used. This built-up wiring layer can reduce “warping”, “twisting”, and “dimensional change” even if the preferred conditions described in the present invention are not satisfied.

  Hereinafter, the multilayer printed wiring board 1 according to the present application will be described with reference to FIG. FIG. 1 shows a configuration in which a skipped via 21 serving as an interlayer conduction means is provided as a layer configuration including two first built-up wiring layers Bu1 and second built-up wiring layers Bu2. In the following description, it demonstrates for every component of the multilayer printed wiring board 1 which concerns on this application as much as possible.

Core substrate: Here, the core substrate 2 constituting the multilayer printed wiring board 1 according to the present application has an insulating layer thickness of 150 μm or less, and has inner layer circuits on both sides of the insulating layer containing a skeleton material, and It is preferable that the XY direction linear expansion coefficient of the insulating layer containing a skeleton material is 0 ppm / ° C. to 20 ppm / ° C. The reason why the lower limit of the linear expansion coefficient in the XY direction of the insulating layer containing the skeleton material is set to 0 ppm / ° C. is that the combination of the insulating layer constituting resin 11 and the skeleton material 12 constituting the core substrate 2 is considered. This is because it is difficult to make this value or less. On the other hand, if the XY linear expansion coefficient of the skeleton-containing insulating layer exceeds 20 ppm / ° C, both “warping” and “twisting” tend to be prominent, and dimensional stability as a printed wiring board can be secured. Since the tendency to disappear becomes high, it is not preferable. Here, “X-Y direction linear expansion coefficient” is displayed as the expansion coefficient in the direction along one side when a square plate-shaped core substrate is assumed in plan view. The expansion coefficient in the direction perpendicular to the one side is referred to as “Y-direction linear expansion coefficient”.

  Measurement of the linear expansion coefficient in the XY direction of the insulating layer containing a skeleton material described above is performed by laminating a copper foil on both surfaces of the insulating layer containing the skeleton material, and then removing the copper foil by etching to harden the sheet-like skeleton. An insulating layer containing a material is obtained, and this is used as a sample, using a TMA test apparatus, and measured twice by the tensile load method at a temperature rising rate of 5 ° C./min. From the second measurement of room temperature to the glass transition temperature It is the value which calculated the average value of the linear expansion coefficient.

And the said core board | substrate 2 of the multilayer printed wiring board 1 which concerns on this application is normally equipped with the inner layer circuit 22 on the both surfaces. The inner layer circuit 22 and the copper circuit layer 23 of the first built-up wiring layer Bu1 located on the outer layer side of the core substrate 2 are connected by any interlayer conduction means (not shown) such as via holes and through holes. Used.

  The core substrate 2 of the multilayer printed wiring board 1 according to the present application preferably has an insulating layer thickness of 150 μm or less. If the thickness of the insulating layer of the core substrate 2 exceeds 150 μm, the requirement for a thin printed wiring board cannot be satisfied, which is not preferable. Although the lower limit is not set here, 15 μm is considered as the lower limit at the present stage when considering the thinnest skeleton material 12. In consideration of the demand for thinner printed wiring boards in the market, the thickness of the core substrate 2 is 100 μm or less, more preferably 80 μm or less.

  The skeleton material 12 can be made of glass cloth or glass nonwoven fabric used as a constituent material of the insulating layer of the printed wiring board, and there is no particular limitation on the material of the glass. Further, as the insulating layer constituting resin 11 of the core substrate 2, an epoxy resin, a cyanate resin, a maleimide resin, a polyphenylene ether resin, a polybutadiene resin, an acrylate resin used as a constituent material of an insulating layer of a printed wiring board. Resin or the like can be used, and there is no particular limitation.

Built-up wiring layer: As can be understood from FIG. 1, the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 are provided on the surface of the core substrate on which the inner layer circuit 22 is formed. And the said 1st built-up wiring layer Bu1 and 2nd built-up wiring layer Bu2 which comprise the multilayer printed wiring board concerning this application at this time are the copper circuit layers 23 and 24, and an X-Y direction linear expansion coefficient. It consists of insulating resin layers 30 and 31 of 1 ppm / ° C. to 50 ppm / ° C. Here, the reason why the lower limit of the linear expansion coefficient in the XY direction of the insulating resin layers 30 and 31 is set to 1 ppm / ° C. is because it is difficult to make the lower limit of this value practically. On the other hand, if the linear expansion coefficient in the XY direction of the insulating resin layers 30 and 31 exceeds 50 ppm / ° C., “warping” and “twisting” tend to become prominent, and dimensional stability as a printed wiring board is ensured. Is not preferable.

  As the resin constituting the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 mentioned here, epoxy resin, cyanate resin, maleimide resin, polyphenylene ether resin, polyamide Resins, polyimide resins, polyamideimide resins, polybutadiene resins, acrylate resins, and the like can be used.

  The measurement of the linear expansion coefficient in the XY direction of the built-up wiring layer described above is the above-described resin component used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2. Is used to manufacture two semi-cured resin layer-attached copper foils which will be described later, these resin surfaces are brought into contact with each other and laminated, and then the copper foil is etched away and cured sheet-like insulating resin layer And measured with the above-described TMA test apparatus and test conditions.

  The X-Y direction linear expansion coefficient of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 described above is a square built-up wiring layer as described above. Is assumed to be separated into an X-direction linear expansion coefficient (Bx) and a Y-direction linear expansion coefficient (By). It is preferable that the value of the X direction linear expansion coefficient (Bx) and the value of the Y direction linear expansion coefficient (By) satisfy the relationship [Bx] / [By] = 0.9 to 1.1. [Bx] / [By] = 0.95 to 1.05 is more preferable. If the value of [Bx] / [By] is out of this range, the linear expansion coefficient is large in the X direction and the Y direction in the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2. It becomes different and it becomes impossible to obtain the multilayer printed wiring board 1 with small “warping”, “twist”, and “dimensional change”, which is not preferable.

  In order to adjust the linear expansion coefficient in the XY direction of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2, silica particles, hollow It is also preferable to contain silica particles, alumina particles, talc and the like. In this case, it is preferable to use a filler having an average particle diameter of 20 nm to 1 μm. At this time, although there is no special limitation in the lower limit of the average particle diameter of a filler, it is 20 nm in consideration of the actual state as an industrial product. On the other hand, if the average particle size of the filler exceeds 1 μm, the protrusions on the rough surface of the copper foil and the filler in the insulating resin layer are likely to come into contact with each other, which tends to reduce the adhesion, which is not preferable. . And when making the insulating resin layers 30 and 31 which comprise the said 1st built-up wiring layer Bu1 and the 2nd built-up wiring layer Bu2 contain a filler with respect to the said insulating resin layers 30 and 31, 30 weight%- It is preferable to make it contain in 70 weight%. When the filler content is less than 30% by weight, the linear expansion coefficient in the XY direction of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 is adjusted. Is not preferable because it becomes difficult. On the other hand, when the filler content exceeds 70% by weight, it is difficult to embed an insulating resin layer containing the filler between the inner layer circuits provided in the core substrate.

  Hereinafter, physical characteristics that characterize the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application will be described. The insulating resin layers 30 and 31 preferably have a tensile elastic modulus at 25 ° C. of 5 GPa to 10 GPa. When the tensile elastic modulus at 25 ° C. of the insulating resin layers 30 and 31 is less than 5 GPa, “warp”, “twist”, and “dimensional change” when the multilayer printed wiring board 1 is formed tend to increase. It is not preferable. On the other hand, when the tensile elastic modulus at 25 ° C. of the insulating resin layers 30 and 31 exceeds 10 GPa, the insulating resin layers 30 and 31 become brittle. Due to the “twist”, the tendency of the built-up wiring layer to crack during component mounting is increased, which is not preferable.

The “tensile modulus at 25 ° C.” referred to here is described later using the above-described resin components used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2. After manufacturing two semi-cured resin layered copper foils, these resin surfaces are brought into contact with each other and laminated, and then the copper foil is etched away to obtain a cured sheet-like insulating resin layer. Is a value measured using a viscoelasticity measuring device (DMA).

  The relative dielectric constant of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application is 3.5 or less. Is preferred. Hereinafter, the reason why the relative permittivity is specified will be described. Considering the impedance control of a high-density printed wiring board in the case of using a high-frequency signal such as a mobile phone, good control of the crosstalk characteristics between layers is required. Factors affecting the crosstalk characteristics include the circuit width, the insulation distance between layers, the relative dielectric constant of the resin component used in the insulation layer, and the like. Among these, when the insulation distance between the layers is short, it is necessary to reduce the circuit width of the strip line, so that circuit formation becomes difficult. Therefore, in order to use a thick strip line with a short insulating distance between layers, it is necessary to use an insulating layer having a low relative dielectric constant. That is, it is preferable to use a thin printed wiring board having a low relative dielectric constant in order to perform impedance control when using a substrate (thin printed wiring board) having a short insulating distance between layers. For this reason, the dielectric constant of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application is 3.5 or less. By doing so, it becomes easy to perform impedance control of the high-density printed wiring board. Preferably, when the relative dielectric constant is 3.1 or less, impedance control accuracy is further improved. Furthermore, when the relative dielectric constant is set to 3.0 or less, impedance control accuracy that almost satisfies the market demand can be secured. Here, the relative dielectric constants of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 are used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2. Using the resin component described above, two copper foils with a semi-cured resin layer, which will be described later, are manufactured, and after laminating these resin surfaces in contact with each other, the copper foil is removed by etching, and the sheet is cured. This is a value measured by a split post dielectric resonance method (use frequency: 1 GHz) using this as a sample.

  Further, the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application are specially adapted to the glass transition temperature (Tg) after curing. However, the temperature is preferably less than 160 ° C. By setting the glass transition temperature (Tg) to less than 160 ° C., it tends to be low elasticity in the high temperature region of the insulating resin layers 30 and 31 and warpage is less likely to occur. Note that the “glass transition temperature” here is two sheets to be described later using the above-described resin components used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2. After manufacturing the semi-cured resin layered copper foil, the resin surfaces were brought into contact with each other and laminated, and then the copper foil was removed by etching to obtain a cured sheet-like insulating resin layer, which was used as a sample. , Measured using a viscoelasticity measuring device (DMA) under conditions of a temperature rising rate of 5 ° C./min.

  Furthermore, it is preferable that the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application have a thickness of 20 μm to 80 μm. . When the thickness of the insulating resin layers 30 and 31 is less than 20 μm, it is difficult to ensure insulation, and “warp”, “twist”, and “dimensional change” tend to increase, which is preferable. Absent. On the other hand, when the thickness of the insulating resin layers 30 and 31 exceeds 80 μm, it becomes difficult to satisfy the requirement for a thin printed wiring board, and the thickness variation of the insulating resin layers 30 and 31 becomes large. ”,“ Twist ”, and“ dimensional change ”tend to increase, which is not preferable. The thickness of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 is more preferably 50 μm or less in consideration of the demand for thinner printed wiring boards in the market. Preferably, it is 40 μm or less.

Multi-layer printed wiring board having eight or more layers: The multilayer printed wiring board according to the present application has six layers as the least layer structure, and a new built-up wiring layer is provided on the outer layer of the six-layer multilayer printed wiring board. The built-up wiring layer described below is preferably provided on the outermost layer of the multilayer printed wiring board having eight or more layers.

  The built-up wiring layer disposed in the outermost layer preferably has an insulating resin layer constituting the built-up wiring layer having a low elasticity with a tensile elastic modulus at 25 ° C. of less than 5.0 GPa. The reason why such an insulating resin layer having a low elastic modulus is employed is as follows. After mounting a component on a multilayer printed wiring board using a solder ball or the like, if the mounting board is accidentally dropped and collides with the floor surface, the mounting board receives a very strong drop impact. In such a case, when the mounting circuit in which the solder balls used for component mounting are placed on the surface where the insulating resin base material is in contact with the mounting circuit, if the impact such as the drop described above is received, the weight of the mounting component will Pressing strongly may cause cracks from the edge of the circuit into the insulating resin layer, peeling off of mounted components, circuit disconnection, and the like. This is because it is preferable to design the insulating resin layer constituting the outermost built-up wiring layer with low elasticity in order to solve such a problem. If the tensile elastic modulus is less than 5.0 GPa, even if it falls after it becomes a mounting board, it effectively prevents cracks, peeling of mounting parts, circuit disconnection, etc., and good drop resistance to the mounting board Can give performance. At this time, when the tensile elastic modulus is less than 3.5 GPa, the drop resistance performance of the mounting substrate is remarkably increased, and when the tensile elastic modulus is less than 3.0 GPa, the drop resistance performance is further improved. Almost no damage will occur even if dropped during handling. Here, although the lower limit of the tensile elastic modulus is not described, it is about 0.1 GPa from experience. When the tensile elastic modulus is less than 0.1 GPa, the circuit at the mounting position is pushed in due to the pressure of the bonder used at the time of component mounting and is not preferable.

  Moreover, it is preferable that the insulation resin layer which comprises the built-up wiring layer arrange | positioned in this outermost layer has a breaking elongation rate of 5% or more. When the elongation at break is less than 5%, the insulating resin layer constituting the built-up wiring layer becomes brittle, and even if the tensile elastic modulus is less than 5.0 GPa, the drop resistance performance of the mounting board described above varies. May occur. However, when the elongation at break of the insulating resin layer is 5% or more, the insulating resin layer constituting the built-up wiring layer has sufficient flexibility with respect to impact, and a good drop resistance performance tends to be obtained. Because there is.

  As the low-elasticity resin that constitutes the insulating resin layer of the built-up wiring layer arranged in the outermost layer here, epoxy resin, cyanate resin, maleimide resin, polyphenylene ether resin, polyamide resin, polyimide resin, polyamideimide Resins, polybutadiene resins, acrylate resins, polyester resins, phenoxy resins, polyvinyl acetal resins, styrene-butadiene resins, and the like can be used.

2. Manufacturing form of multilayer printed wiring board <First manufacturing method>
The first method for producing a multilayer printed wiring board includes the following steps 1 to 3. Hereinafter, it demonstrates for every process, referring FIGS.

Step 1: In this step, as shown in FIG. 2A, an insulating layer containing a skeleton material comprising the skeleton material 12 and an insulating layer-constituting resin 11 having an X-Y direction linear expansion coefficient of 0 ppm / ° C. to 20 ppm / ° C. The copper clad laminated board 40 provided with the copper foil layer 14 on the surface of 10 is prepared. Then, the copper foil layer 14 of the copper-clad laminate 40 is subjected to via hole processing, interlayer conductive plating processing, etching processing, or the like as necessary to form a predetermined inner layer circuit 22, as shown in FIG. The core substrate 2 having a thickness of the insulating layer shown is 150 μm or less.

Step 2: In this step, as shown in FIG. 3C, the semi-cured resin layer 15 side of the semi-cured resin layer-attached copper foil 50 is brought into contact with the surface of the core substrate 2 shown in FIG. As shown in FIG. 3D, the first built-up layer 3 a composed of the insulating resin layer 30 and the copper foil layer 14 is formed on both surfaces of the core substrate 2. The insulating resin layer 30 at this time has an XY direction linear expansion coefficient of 1 ppm / ° C. to 50 ppm / ° C., and the value of the X direction linear expansion coefficient (Bx) of the insulating resin layer and the Y direction. The value of the linear expansion coefficient (By) satisfies the relationship [Bx] / [By] = 0.9 to 1.1. The semi-cured resin layer-attached copper foil 50 is manufactured by applying a resin varnish for forming an insulating resin layer on the surface of the copper foil 14 and drying it. The method for producing the semi-cured resin layer-attached copper foil 50 can be easily understood by those skilled in the art of producing printed wiring boards, and therefore description thereof using drawings is omitted.

In Step 2, from the state shown in FIG. 3D, via hole processing, interlayer conductive plating processing, etching processing is performed on the copper foil layer 14 on the surface of the first built-up layer 3a as necessary. Etc., the first built-up wiring layer Bu1 is provided by forming the copper circuit layer 23 and obtaining the first built-up wiring layer-attached laminate 51 shown in FIG.

Step 3: In this step, the first unit step is repeated n ₁ times (an integer of n ₁ ≧ 1) on the circuit forming surfaces on both surfaces of the first build-up wiring layer-equipped laminate 51, and the core A multilayer printed wiring board having (4 + 2n ₁ ) built-up wiring layers on both sides of the substrate is obtained. The 1st unit process here is "it makes the semi-hardened resin layer of the copper foil with the said semi-hardened resin layer contact | abut to the surface of a built-up layer, and the built-up layer which consists of an insulating resin layer and a copper foil layer is formed. Furthermore, it is an operation of forming a circuit and forming a circuit.

  The first unit process corresponds to the process shown in FIGS. 4F to 5H. That is, as shown in FIG. 4 (f), the semi-cured resin layer-attached copper foil 50 half of the circuit-forming surface of the first built-up wiring layer Bu 1 of the first build-up wiring layer-attached laminate 51. The cured resin layer 15 is brought into contact with each other to form the second built-up layer 3b composed of the insulating resin layer 31 and the copper foil layer 14, and two layers are formed on both surfaces of the core substrate 2 as shown in FIG. A multilayer copper clad laminate 52 having the first built-up wiring layer Bu1 and the second built-up layer 3b is obtained.

Then, via hole processing, interlayer conductive plating processing, etching processing, or the like is performed on the copper foil layer 14 of the second built-up layer 3b on both surfaces of the multilayer copper clad laminate 52 shown in FIG. Then, as shown in FIG. 5 (h), the multilayer printed wiring board 1 provided with the second built-up wiring layer Bu2 by forming the copper circuit layer 24 is obtained. As shown in FIG. 5 (h), if the interlayer via plating 20 is applied to form the skipped via 21, the first built-up wiring layer Bu1 on the inner layer side can be omitted, so that the first built-up This is preferable because the steps for forming the wiring layer Bu1 can be reduced.

When the first unit process described above is repeated n ₁ times (an integer of n ₁ ≧ 1), a multilayer printed wiring board 1 having (4 + 2n ₁ ) built-up wiring layers on both surfaces of the core substrate is obtained. be able to.

<Second manufacturing method>
This 2nd manufacturing method of a multilayer printed wiring board is a manufacturing method of the above-mentioned multilayer printed wiring board, and is provided with the following processes 1 ~ 4. Here, Step 1 to Step 3 are the same as those in the first manufacturing method described above. Therefore, only the process 4 which is a different process will be described here, and a duplicate description will be omitted.

Step 4: In this step, the built-up on the outermost layer on both sides of the “multilayer printed wiring board having (4 + 2n ₁ ) built-up wiring layers on both sides of the core substrate” obtained in Step 3 of the first manufacturing method. A multilayer printed wiring board provided with a built-up wiring layer provided with an insulating resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa on the outermost layer with respect to the circuit forming surface of the wiring layer is obtained. At this time, the semi-cured resin layer side of the copper foil with a semi-cured resin layer provided with a semi-cured resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa after curing is brought into contact with the surface of the multilayer printed wiring board, The second unit process of stacking is repeated n ₂ times (an integer of n ₂ ≧ 1), and a built-up wiring layer having a {4 + 2 (n ₁ + n ₂ )} layer structure is provided on both surfaces of the core substrate. Can do.

The manufacturing process of the second unit process is the same as the manufacturing process of the first unit process. However, the copper foil with a semi-cured resin layer used for forming the built-up layer is different. That is, for the semi-cured resin layer of the copper foil with a semi-cured resin layer used in the second unit process, a material having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa after curing is used. A built-up layer composed of a foil layer is formed. Therefore, from the state shown in FIG. 5 (h), a semi-cured resin layer of a copper foil with a semi-cured resin layer is laminated on both sides, a copper circuit layer 25 is formed, and a third built-up wiring layer Bu3 is provided. A multilayer printed wiring board 1 shown in 5 (i) is obtained. At this time, the tensile elastic modulus at 25 ° C. of the insulating resin layer 32 of the third built-up wiring layer Bu3 is less than 5.0 GPa.

  In Example 1, a 10-layer multilayer printed wiring board as shown in FIG. 6 was manufactured through the following steps.

Step 1: In Example 1, a copper-clad laminate (copper foil thickness: 18 μm, insulating layer thickness: 60 μm, insulating layer) provided with copper foil on both sides of the insulating layer in the state shown in FIG. : Containing glass cloth, X-direction linear expansion coefficient was 14.0 ppm / ° C., and Y-direction linear expansion coefficient was 12.0 ppm / ° C.). And the copper foil of the outer layer of the said copper clad laminated board is etched, the predetermined inner layer circuit 22 is formed on both surfaces, and the core substrate whose thickness of an insulating layer is 150 micrometers or less as shown in FIG.2 (b) 2 was obtained.

Step 2: In this step 2, as shown in FIG. 3C, a copper foil 50 with a semi-cured resin layer (thickness: 30 μm, copper foil thickness: 18 μm, semi-cured resin layer: epoxy resin is used. The semi-cured resin layer 15 side of the formed resin film) is brought into contact with and laminated on the surface of the core substrate 2 shown in FIG. 2B, and insulated on both surfaces of the core substrate 2 as shown in FIG. A first built-up layer 3a composed of the resin layer 30 and the copper foil layer 14 was formed. The insulating resin layer of the first built-up layer 3a at this time has an XY linear expansion coefficient of 39 ppm / ° C., the X-directional linear expansion coefficient (Bx) value of the insulating resin layer, and the Y-directional linear expansion coefficient (By ) Value ratio was [Bx] / [By] = 1.0, the tensile modulus at 25 ° C. was 7.0 GPa, the relative dielectric constant was 3.1, and the glass transition temperature (Tg) was 150 ° C.

In Step 2, from the state shown in FIG. 3D, via hole processing, interlayer conductive plating processing, etching processing is performed on the copper foil layer 14 on the surface of the first built-up layer 3a as necessary. The first built-up wiring layer Bu1 provided with the copper circuit layer 23 was obtained to obtain a first laminated board 51 with a built-up wiring layer shown in FIG.

Step 3: In this step 3, a copper foil with a semi-cured resin layer similar to that used for forming the first built-up layer 3a is formed on the circuit forming surfaces on both sides of the laminate 51 with the first build-up wiring layer. 50, the above-mentioned first unit process is repeated twice to provide two layers of the second built-up wiring layer Bu2 and the third built-up wiring layer Bu3, and the built-up wiring layers on both surfaces of the core substrate 2. An eight-layer multilayer printed wiring board comprising Bu1 to Bu3 was obtained.

Step 4: In Step 4, the tensile modulus of elasticity at 25 ° C. after curing on the circuit forming surface of the third built-up wiring layer Bu3 in the outermost layer of the eight-layer multilayer printed wiring board obtained in Step 3 Using the copper foil with a semi-cured resin layer (thickness: 40 μm, copper foil thickness: 18 μm) provided with a semi-cured resin layer having a thickness of less than 5.0 GPa, the second unit step is performed once, By providing the built-up wiring layer Bu4, 10 layers of the built-up wiring layers Bu1 to Bu4 are provided on both surfaces of the core substrate, and the outermost layer is provided with an insulating resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa. A 10-layer multilayer printed wiring board provided with a built-up wiring layer was obtained. The circuit provided on the 10-layer multilayer printed wiring board formed a test circuit pattern that imitated a high-density wiring circuit.

Then, the 10-layer multilayer printed wiring board obtained here was divided into four to obtain a 12 cm × 12 cm measurement sample, and the amount of warpage was measured using a Thermore AXP manufactured by Akrotrix. The amount of warpage is 4 measurement samples at each temperature shown in Table 1 in the heating process from 30 ° C. to 260 ° C. and the cooling process from 260 ° C. to 30 ° C. of each measurement sample obtained by dividing into 4 parts. The amount of warpage was measured. Then, among the four measurements, (Table 1, are displayed as "maximum data".) Less measurement data most warp and, in the measurement data (Table 1 that occurred the most warped, ""Minimumdata" is displayed in Table 1. The same applies to the following examples and comparative examples.

  In Example 2, a 10-layer multilayer printed wiring board as shown in FIG. 6 was manufactured through Steps 1 to 4 similar to Example 1, and the amount of warpage was measured in the same manner as Example 1. Therefore, only different parts will be described.

  In Example 2, a copper foil 50 with a semi-cured resin layer (thickness: 30 μm, copper foil thickness: 18 μm, semi-cured resin layer: a resin formed using an epoxy resin, a cyanate resin, and a bismaleimide resin The insulating resin layer 32 of the first built-up wiring layer Bu1 to the third built-up wiring layer Bu3 formed through the same steps 1 to 3 as in Example 1 has a linear expansion coefficient in the XY direction. 24 ppm / ° C., the ratio of the X-direction linear expansion coefficient (Bx) to the Y-direction linear expansion coefficient (By) of the insulating resin layer is [Bx] / [By] = 1.0, tensile elasticity at 25 ° C. The rate was 8.9 GPa, the relative dielectric constant was 3.2, and the glass transition temperature (Tg) was 270 ° C.

Comparative example

[Comparative Example 1]
In Comparative Example 1, a 10-layer multilayer printed wiring board similar to that in Example 1 and Example 2 was produced, and the amount of warpage was measured in the same manner as in Example 1.

  In Comparative Example 1, a prepreg including a glass cloth having a thickness of 20 μm as a skeleton material (both having a thickness of 30 μm after lamination) on both surfaces of the core substrate 2 used in Example 1, a copper foil having a thickness of 18 μm, The process of forming a test circuit pattern was repeated four times to produce a 10-layer multilayer printed wiring board in which all of the insulating layer was composed of prepreg. The insulating resin layer composed of this prepreg has an X-direction linear expansion coefficient of 14 ppm / ° C., a Y-direction linear expansion coefficient of 12 ppm / ° C., a value of the X-direction linear expansion coefficient (Bx) and a Y-direction linear expansion coefficient (By). The ratio of [Bx] / [By] = 1.2, the X-direction tensile elastic modulus at 25 ° C. was 24 GPa. The Y-direction tensile elastic modulus was 22 GPa, and the relative dielectric constant was 4.6.

[Comparative Example 2]
In Comparative Example 2, a 10-layer multilayer printed wiring board similar to Example 1 and Example 2 was manufactured, and the amount of warpage was measured in the same manner as Example 1.

  In Comparative Example 2, the copper with a semi-cured resin layer provided with a semi-cured resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa after curing was used for forming the outermost layer of Example 1 and Example 2. Using a foil (thickness: 40 μm, copper foil thickness: 18 μm), the copper foil with a semi-cured resin layer is laminated on both surfaces of the core substrate 2 used in Example 1 to form a test circuit pattern. This process was repeated four times to produce a 10-layer multilayer printed wiring board. In this case, the insulating resin layer has an XY direction linear expansion coefficient of 70 ppm / ° C., and a ratio between the X direction linear expansion coefficient (Bx) and the Y direction linear expansion coefficient (By) is [Bx] / [ By] = 1.0, the tensile modulus at 25 ° C. was 3.2 GPa, and the relative dielectric constant was 3.1.

  Note that the warpage amount measurement sample obtained in Comparative Example 2 had a warpage of 1.0 mm or more immediately after the production, and thus the warpage amount was not measured in the temperature rising / falling process.

[Contrast between Example and Comparative Example]
Examples and Comparative Examples are summarized in Table 1 including the above-described characteristic values and warpage amounts so that they can be compared.

  With reference to Table 1, the amount of warpage between the example and the comparative example 1 is compared. First, looking at the highest data with the least amount of warpage in Example and Comparative Example 1, the 10-layer multilayer printed wiring board in which all of the insulating layers of Comparative Example 1 are composed of prepregs has the least warpage, It can be seen that the variation in warpage is small because the standard deviation is also small. However, when looking at the lowest data with the largest amount of warpage between the example and the comparative example 1, this relationship is reversed. Looking at the amount of warpage of the minimum data in Example 1, the maximum value was 164 μm, the minimum value was 126 μm, the average value was 140 μm, and the standard deviation was 13.4 μm. The amount of warpage of the lowest data in Example 2 was as follows: highest value 191 μm, lowest value 124 μm, average value 156 μm, and standard deviation 18.8 μm. On the other hand, when the amount of warpage of the minimum data of Comparative Example 1 is seen, the maximum value is 227 μm, the minimum value is 145 μm, the average value is 164 μm, and the standard deviation is 25.2 μm. Therefore, when looking at the lowest data with the largest amount of warpage, the 10-layer multilayer printed wiring board in which all of the insulating layers of Comparative Example 1 are made of prepreg has the largest warpage, the large standard deviation, and the large variation in warpage. I can judge.

  From these, it can be understood that, in the case of a multilayer printed wiring board manufactured using only a prepreg as in Comparative Example 1, the amount of warpage varies between products of the same lot, making it difficult to handle as a product. There is. On the other hand, if the “first built-up layer” and the “second built-up layer” satisfy the above-mentioned conditions as in the multilayer printed wiring board according to the present application, the built-up wiring in the third layer and thereafter is used. Regardless of what kind of layer is placed on the layer, "warp", "twist", "dimensional change" are reduced, and variations are reduced, resulting in "warp", "twist", "dimensional change" ”Can be predicted, and handling is improved.

  The multilayer printed wiring board according to the present application has less “warping”, “twist”, and “dimensional change” and less variation than the conventional multilayer printed wiring board having a built-up wiring layer. An error can be assumed in advance, and problems in the manufacturing process are less likely to occur. Therefore, the multilayer printed wiring board according to the present application can be easily mounted and can be supplied to the market as a high-quality printed wiring board. Moreover, since the manufacturing method of the multilayer printed wiring board which concerns on this application can use the conventional built-up manufacturing method as it is, it is excellent in the effective utilization of the existing installation.

DESCRIPTION OF SYMBOLS 1 Multilayer printed wiring board 2 Core board 3a, 3b Built-up layer 10 Insulating layer 11 with frame | skeleton material Insulation layer structure resin 12 core material 14 Copper foil (layer) of core substrate
15 semi-cured resin layer 20 interlayer conductive plating 21 skipped via 22 inner circuit 23, 24, 25 copper circuit layer 30, 31, 32 insulating resin layer 40 copper-clad laminate 50 semi-cured resin layered copper foil 51 first buildup wiring layer Laminated plate 52 Multilayer copper clad laminate Bun nth built-up wiring layer (n ≧ 1)

Claims (5)

In multilayer printed wiring boards with two or more built-up wiring layers on both sides of the core substrate,
The core substrate constituting the multilayer printed wiring board has an insulating layer thickness of 150 μm or less, and has inner layer circuits on both surfaces of the skeleton material-containing insulating layer, and the XY direction of the skeleton material-containing insulating layer The linear expansion coefficient is 0 ppm / ° C. to 20 ppm / ° C.,
The first built-up wiring layer provided on both surfaces of the core substrate and the second built-up wiring layer provided on the surface of the first built-up wiring layer have a copper circuit layer and an XY direction linear expansion coefficient of 1 ppm / ° C. It consists of an insulating resin layer of 50 ppm / ° C., and the value of the X direction linear expansion coefficient (Bx) and the Y direction linear expansion coefficient (By) of the insulating resin layer is [Bx] / [By] = 0. meet the relationship .9～1.1 tensile modulus at 25 ° C. of the insulating resin layer is 5GPa～10GPa,
The multilayer printed wiring board which provided the built-up wiring layer provided with the insulating resin layer whose tensile elasticity modulus in 25 degreeC is less than 5.0 GPa in the outermost layer of the said multilayer printed wiring board. 2. The multilayer printed wiring board according to claim 1, wherein an insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer has a thickness of 20 μm to 80 μm. The multilayer printed wiring board according to claim 1 or 2 , wherein the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer has a relative dielectric constant of 3.5 or less.   The multilayer printed wiring board according to any one of claims 1 to 3, wherein the insulating resin layer constituting the buildup wiring layer disposed in the outermost layer of the multilayer printed wiring board has a breaking elongation of 5% or more. . A method for producing a multilayer printed wiring board according to any one of claims 1 to 4,
The manufacturing method of the multilayer printed wiring board characterized by including the following processes 1-step 3.
Step 1: An inner layer circuit is formed using a copper-clad laminate including a copper foil layer on the surface of a skeleton-containing insulating layer having an X-Y direction linear expansion coefficient of 0 ppm / ° C to 20 ppm / ° C. Step 2 of obtaining a core substrate having a thickness of 150 μm or less: On the surface of the copper foil, the cured resin resin layer has an XY-direction linear expansion coefficient of 1 ppm / ° C. to 50 ppm / ° C., and the insulation resin layer A semi-cured resin layer in which the value of the X-direction linear expansion coefficient (Bx) and the Y-direction linear expansion coefficient (By) satisfy the relationship of [Bx] / [By] = 0.9 to 1.1 was formed. First build-up wiring by using a copper foil with a semi-cured resin layer and laminating the semi-cured resin layer side of the copper foil with a semi-cured resin layer in contact with both surfaces of the core substrate to form a circuit. A layered laminate is obtained.
Step 3: The semi-cured resin layer of the copper foil with the semi-cured resin layer is brought into contact with the surface of the laminate with the first build-up wiring layer to further form a built-up layer composed of an insulating resin layer and a copper foil layer. Then, an operation for forming a circuit is set as a first unit process, and this first unit process is repeated n ₁ times (an integer of n ₁ ≧ 1) on both surfaces of the laminated board with the first buildup wiring layer. Then, a multilayer printed wiring board having (4 + 2n ₁ ) layer built-up layers on both surfaces of the core substrate is obtained.
Step 4: A semi-cured resin layer having a tensile elastic modulus at 25 ° C. of less than 5.0 GPa after curing is formed on the surface of the (4 + 2n ₁ ) layer of the built-up wiring layer formed using the first unit step. Using the copper foil with a cured resin layer, the second unit process is defined as an operation in which the semi-cured resin layer side of the copper foil with the semi-cured resin layer is brought into contact with each other to perform circuit formation. carried out _twice (n ₂ ≧ 1 integer) repeatedly, with a built-up layer of the layer structure of both sides of the core substrate {4 + 2 (n 1 + n 2)} layer, and a tensile modulus at 25 ° C. in the outermost layer A multilayer printed wiring board having a built-up wiring layer provided with an insulating resin layer of less than 5.0 GPa is obtained.

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