KR20150094625A - Multilayer printed circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention aims to provide a multilayer printed wiring board in which warping, twisting, and dimensional change of a multilayered printed circuit board obtained by a conventional built-up method are reduced, and a manufacturing method thereof. In order to achieve this object, in a multilayer printed wiring board in which two or more build-up wiring layers are provided on both sides of a core substrate, the core substrate constituting the multilayer printed wiring board has a thickness of 150 mu m or less, Wherein an inner layer circuit is provided on both surfaces of the insulating layer including the ash material and the linear expansion coefficient in the XY direction of the insulating layer including the skeleton is from 0 ppm / DEG C to 20 ppm / DEG C, The up-wired layer and the second built-up wiring layer are composed of a copper circuit layer and an insulating resin layer having a coefficient of linear thermal expansion in the XY direction of 1 ppm / DEG C to 50 ppm / DEG C, and the value of the linear thermal expansion coefficient Bx And the ratio of the Y-direction linear expansion coefficient By to the value of 0.9 to 1.1.

Description

[0001] MULTILAYER PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF [0002]

The present invention relates to a multilayer printed wiring board and a manufacturing method thereof. In particular, the present invention relates to a multilayer printed wiring board manufactured by a build-up method.

Background Art [0002] Conventionally, a multilayer printed wiring board has been widely used in order to achieve a purpose of increasing the signal transmission speed and reducing the mounting area as a printed wiring board. This multilayer printed wiring board is used by mounting various electronic parts. Various methods such as a solder reflow method, a wire bonding method, and the like are used for mounting electronic components on the multilayer printed wiring board. At this time, if the multilayered printed circuit board has "bending", "twisting", and "dimensional change", it is not preferable because good electronic parts can not be mounted. Especially, when the build-up method is used as a manufacturing method of a multilayered printed circuit board, "warping", "twisting", and "dimensional change" are likely to occur even during processing, and various techniques for solving these phenomena have been proposed . Hereinafter, such prior art will be illustrated.

Patent Document 1 (Japanese Unexamined Patent Application Publication No. 11-261228) discloses a multilayer printed wiring board with small dimensional changes in the XY and Z directions and little surface undulation and warpage. A multilayer printed wiring board in which a resin insulating layer and a conductor layer are alternately laminated is characterized in that the core substrate is made of a prepreg having a thickness of 0.15 mm or less impregnated with a bismaleimide triazine resin in a low thermal expansion fiber cloth such as a glass cloth, Layer or more. In this case, by thinning the thickness of the resin-impregnated prepreg by one and increasing the number of sheets, the dimensional change and warping of the core substrate, that is, the multilayered printed circuit board obtained by laminating the prepregs in the XY directions are prevented " .

Patent Document 2 (Japanese Patent Application Laid-Open No. 2003-086941) discloses a printed wiring board capable of reducing the occurrence of warping due to thermal history and facilitating formation of a conductor layer in the outermost layer in a fine pattern , And "a printed wiring board formed by alternately building up a plurality of layers of insulating resin layer and conductor layer on the surface of an inner layer circuit board, wherein the insulating resin layer on the outermost layer contains glass fiber cloth as a base material And the second insulating resin layer from the outermost layer is formed as a layer containing glass fibers as a base material.

In Patent Document 3 (Japanese Patent Application Laid-Open No. 2004-342827), it is possible to obtain a resin having a low flexural / torsional rigidity and a high modulus of elasticity as compared with a multilayer printed wiring board in which resin is filled in the IVH, A printed wiring board excellent in surface irregularities and excellent in heat resistance and migration resistance as compared with a multilayer printed wiring board manufactured by FREMON alone is disclosed. "An organic film base resin composition or substrate reinforcement Is formed to fill the IVH, and at least the outermost layer is a printed wiring board having a structure in which a resin composition layer for reinforcing fibrous nonwoven fabric base is formed. &Quot;

Patent Document 4 (Japanese Unexamined Patent Application Publication No. 2008-307886) proposes a metal clad laminate with reduced warpage and a method for producing a multilayer laminate, wherein a laminate formed by disposing a metal foil on a prepreg , A first step of heating and pressing at a predetermined molding temperature and a predetermined first molding pressure, and a second step of forming a first molding pressure A second step of keeping the temperature of the laminate at a temperature not lower than the temperature at which the prepreg is at least 5 占 폚 lower than the temperature at which the prepreg is at the lowest melt viscosity while pressurizing the laminate at a second molding pressure of 0.4 or less, And a third step of cooling and forming the laminate after lapse of at least 30 minutes from the step of forming the metal clad laminate. It is disclosed to employ.

Japanese Patent Application Laid-Open No. 11-261228 Japanese Patent Application Laid-Open No. 2003-086941 Japanese Patent Application Laid-Open No. 2004-342827 Japanese Patent Application Laid-Open No. 2008-307886

However, the inventions disclosed in any one of Patent Documents 1 to 4 described above have various problems in actual operation, and the problems of "bending", "torsion", and "dimensional change" of the multilayered printed circuit board There is a point that it can not be completely solved. Considering the problems of the invention disclosed in the above-mentioned respective patent documents, it is as follows.

In the technique disclosed in Patent Document 1, there is a restriction that "the prepreg is formed by laminating six layers or more", and there is a restriction in the layer configuration in the Z direction of the multilayered printed circuit board. Therefore, the dimensional change in the XY direction of the multilayered printed circuit board, Even if warping can be prevented, there is a certain limit in order to reduce the thickness in the Z direction.

According to the technique disclosed in Patent Document 2, in the printed wiring board obtained by the build-up method, "the insulating resin layer of the outermost layer is formed as a layer of a resin main body not containing glass fiber as a base material" and " And the second insulating resin layer from the outermost layer is formed as a layer containing a glass fiber cloth as a base material ".

According to the technique disclosed in Patent Document 3, "the IVH is filled after forming the organic film base resin composition or the resin composition layer without reinforcement of the base material on the front and back surfaces of the inner laminate having IVH" and " A resin composition layer of a nonwoven fabric base reinforcement is formed. &Quot;

Further, according to the technique disclosed in Patent Document 4, it is preferable that the " pressure change rate of the first molding pressure " is set at a second molding pressure at a pressure ratio of 0.4 or less of the first molding pressure for a period of at least 5 minutes or more from a predetermined time after the heating and pressing by the first step A second step of keeping the temperature of the laminate at 5 [deg.] C or lower than the temperature at which the prepreg has the lowest melt viscosity while the laminate is being pressed; , The manufacturing process is complicated, and variations in the quality of the obtained product tend to occur.

As can be understood from the above, it is possible to reduce the phenomenon called " bending ", " twist ", and " dimensional change " of the multilayered printed circuit board obtained by using the conventional built-up method, A wiring board and a manufacturing method thereof have been desired to be simplified.

As a result of intensive researches, the inventors of the present invention have found that the change of a simple manufacturing method and the change of the layer configuration of a multilayer printed wiring board can be classified into a "bend", "twist", "dimensional change Quot ;, it is difficult to suppress it without deviation. As a result, by adopting the following technical idea, it has been deemed that the deviation between the printed wiring board products can be reduced even if the multilayered printed circuit board has hardness "warpage", "twist" and "dimensional change". The outline of the invention relating to the present application will be described below.

1. Multilayer Printed Circuit Board

The multilayer printed wiring board according to the present application is a multilayer printed wiring board in which two or more built-up wiring layers are provided on both surfaces of a core substrate. The core substrate constituting the multilayer printed wiring board has a thickness of 150 탆 or less , And an inner layer circuit on both surfaces of an insulating layer including a skeletal material and having an expansion coefficient in a range of 0 ppm / DEG C to 20 ppm / DEG C in an XY direction of an insulating layer including the skeleton, The first built-up wiring layer and the second built-up wiring layer provided on the surface of the first built-up wiring layer comprise a copper circuit layer and an insulating resin layer having a coefficient of linear thermal expansion in the XY direction of 1 ppm / DEG C to 50 ppm / The value of the linear expansion coefficient (Bx) in the X direction and the value of the Y direction linear expansion coefficient (By) of the insulating resin layer satisfy the relation of [Bx] / [By] = 0.9 to 1.1.

It is preferable that the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application has a tensile elastic modulus at 25 캜 of 5 ㎬ to 10㎬.

It is preferable that the thickness of the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application has a thickness of 20 탆 to 80 탆.

It is preferable that the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer of the multilayer printed wiring board according to the present application has a relative dielectric constant of 3.5 or less.

It is preferable to provide a built-up wiring layer having an insulation resin layer having a tensile modulus at 25 캜 of less than 5.0 에 at the outermost layer of the multilayer printed wiring board according to the present application.

2. Manufacturing Method of Multilayer Printed Circuit Board

The manufacturing method of the multilayered printed circuit board according to the present application includes the following two manufacturing methods. Therefore, it is referred to as a first manufacturing method and a second manufacturing method.

<First Production Method>

The first manufacturing method is the manufacturing method of the multilayered printed circuit board described above, which comprises the following steps 1 to 3.

Step 1: Using a copper clad laminate having a copper foil layer on the surface of an insulating layer including a skeleton having a thickness of an insulating layer of 150 占 퐉 or less and a coefficient of linear thermal expansion in the XY direction of 0 ppm / 占 폚 to 20 ppm / And a core substrate is obtained.

Step 2: Using a copper foil having a semi-cured resin layer formed on the surface of the copper foil and having a semi-cured resin layer having a coefficient of linear thermal expansion of 1 to 50 ppm / 占 폚 in the XY direction of the cured insulating resin layer, The laminated board having the first build-up wiring layer attached thereto is obtained by laminating the side of the semi-cured resin layer of the copper foil having the resin layer on both sides of the core substrate, and performing circuit formation.

Step 3: The semi-cured resin layer of the copper foil to which the semi-cured resin layer is adhered is brought into contact with the surface of the laminate with the first build-up wiring layer attached thereto to form a built-up layer composed of the insulating resin layer and the copper foil layer, for the operation of performing a formation on both surfaces of the art is the first build-up wiring layer as a first unit process-clad laminate, the first step is performed by repeating a unit of n ₁ times (n an integer from ₁ ≥1), both surfaces of the core substrate, Layered printed wiring board having a built-up layer having a layer structure of (4 + 2n ₁ ) layer is obtained.

<Second Manufacturing Method>

This second manufacturing method is a manufacturing method of the multilayered printed circuit board described above, which comprises the following steps 1 to 4.

Step 1: Using a copper clad laminate having a copper foil layer on the surface of an insulating layer including a skeleton having an insulating layer thickness of 150 mu m or less and a coefficient of linear thermal expansion in the XY direction of 0 ppm / ° C to 20 ppm / And a core substrate is obtained.

Step 2: Using a copper foil having a semi-cured resin layer formed on the surface of the copper foil and having a semi-cured resin layer having a coefficient of linear thermal expansion of 1 to 50 ppm / 占 폚 in the XY direction of the cured insulating resin layer, The laminated board having the first build-up wiring layer attached thereto is obtained by laminating the side of the semi-cured resin layer of the copper foil having the resin layer on both sides of the core substrate, and performing circuit formation.

Step 3: The semi-cured resin layer of the copper foil to which the semi-cured resin layer is adhered is brought into contact with the surface of the laminate with the first build-up wiring layer attached thereto to form a built-up layer composed of the insulating resin layer and the copper foil layer, for the operation of performing a formation on both surfaces of the art is the first build-up wiring layer as a first unit process-clad laminate, the first step is performed by repeating a unit of n ₁ times (n an integer from ₁ ≥1), both surfaces of the core substrate, (4 + 2n ₁ ) layer of a multilayer printed wiring board having a built-up wiring layer.

Step 4: the radius a in a built surface of the up wiring layer is formed by using the art the first unit process, (4 + 2n ₁₎ layer, forming a semi-cured resin layer is less than 5.0㎬ tensile elastic modulus at 25 ℃ after curing Chemistry The operation of forming a circuit by laminating the copper foil with the resin layer on the side of the semi-cured resin layer of the copper foil with the semi-cured resin layer attached thereto is referred to as a second unit process, and this second unit process is referred to as n _twice performed repeatedly (n an integer from _{2 ≥1), {4 + 2} (n 1+ n 2)} on both surfaces of a core substrate provided with a built-up layer of the layer structure of the layer, the tensile elastic modulus at 25 ℃ the outermost layer And a built-up wiring layer having an insulating resin layer of less than 5.0 mu m is disposed.

In the multilayered printed circuit board according to the present application, the linear expansion rate in the XY direction of the insulating layer of the core substrate and the linear expansion rate in the XY direction of the insulating resin layer constituting the built-up wiring layer provided on both sides thereof take the above- Warpage &quot; and &quot; dimensional change &quot; of the multilayered printed circuit board having two or more built-up wiring layers on both sides of the core substrate can be surely reduced without deviation.

1 is a schematic cross-sectional view of a multilayer printed wiring board according to the present application.
2 is a schematic view for explaining a manufacturing process of a multilayer printed wiring board according to the present application.
3 is a schematic view for explaining a manufacturing process of a multilayer printed circuit board according to the present application.
4 is a schematic view for explaining a manufacturing process of a multilayer printed wiring board according to the present application.
5 is a schematic diagram for explaining a manufacturing process of a multilayer printed wiring board according to the present application.
6 is a schematic cross-sectional view of an eight-layer multilayered printed circuit board according to the present application.

Hereinafter, the form of the multilayered printed circuit board relating to the present application and the method of manufacturing the multilayered printed circuit board relating to the present application will be described.

1. Form of multilayer printed wiring board

The multilayer printed wiring board 1 according to the present application has two or more layers of a first built-up wiring layer Bu1 and a second built-up wiring layer Bu2 on both sides of the core substrate 2, . If the "first built-up wiring layer Bu1" and the "second built-up wiring layer Bu2" constituting the multilayer printed wiring board 1 according to the present application satisfy the following conditions, the third and subsequent built- It is possible to reduce "bending", "torsion", and "dimensional change" even if the preferable conditions described in the present invention are not satisfied.

Hereinafter, the multilayered printed circuit board 1 relating to the present application will be described with reference to Fig. Fig. 1 shows a layer configuration including a first built-up wiring layer Bu1 and a second built-up wiring layer Bu2 of two layers, and a skipped via 21 as an interlayer conducting means. In the following description, each component of the multilayered printed circuit board 1 related to the present application will be explained as much as possible.

Core board: Here, the core board 2 constituting the multilayered printed circuit board 1 according to the present application has an inner layer circuit on both surfaces of the insulating layer including the skeletal material with a thickness of the insulating layer of 150 m or less And the linear expansion coefficient in the XY direction of the insulating layer including the skeleton is preferably 0 ppm / ° C to 20 ppm / ° C. The reason why the lower limit of the linear expansion rate in the XY direction of the insulating layer including the skeleton is set to 0 ppm / DEG C is that the combination of the types of the insulating layer constituting resin 11 and the skeleton 12 constituting the core substrate 2 , It is difficult to set the value to be equal to or less than this value. On the other hand, when the linear expansion coefficient in the XY direction of the insulating layer including the skeleton exceeds 20 ppm / DEG C, "warpage" tends to become remarkable also in "twist", and the dimension stability as a printed wiring board can not be secured Is undesirably increased. Here, what is indicated as &quot; linear expansion coefficient in the XY direction &quot; is that the expansion ratio in the direction along one side when a rectangular plate-shaped core substrate is assumed from a plan view is referred to as an &quot; linear expansion coefficient in the X direction &quot; And the expansion rate in the vertical direction is referred to as &quot; Y-direction linear expansion rate &quot;.

The measurement of the coefficient of linear expansion of the insulating layer including the skeleton described above in the XY direction can be performed by laminating copper foils on both surfaces of the insulating layer including the skeleton and then removing the copper foil by etching to form a cured sheet- And the resultant was measured twice using a TMA test apparatus under the conditions of a temperature rise rate of 5 캜 / min by a tensile load method. The average value of the linear expansion rates from the room temperature to the glass transition temperature of the second measurement was .

The core substrate 2 of the multilayer printed wiring board 1 according to the present application usually has an inner layer circuit 22 on both sides thereof. The inner circuit 22 and the copper circuit 23 of the first built-up wiring layer Bu1 located on the outer layer side of the core substrate 2 are connected to arbitrary interlayer conductive means (not shown) such as via holes and through holes And used.

It is preferable that the thickness of the insulating layer of the core substrate 2 of the multilayered printed circuit board 1 relating to the present application is 150 탆 or less. If the thickness of the insulating layer of the core substrate 2 exceeds 150 占 퐉, the demand for a thin printed wiring board becomes unsatisfactory, which is not preferable. Here, although the lower limit value is not defined here, when considering the thinnest skeleton 12, 15 占 퐉 is considered to be the lower limit value at the present stage. The thickness of the core substrate 2 is not more than 100 mu m, more preferably not more than 80 mu m, in consideration of the demand for thinning of the printed wiring board in the market.

The skeleton material 12 referred to herein can be a glass fiber cloth or a glass nonwoven fabric used as a constituent material of the insulating layer of the printed wiring board, and the material of the glass is not particularly limited. As the insulating layer constituting resin 11 of the core substrate 2, an epoxy resin, a cyanate resin, a maleimide resin, a polyphenylene ether resin, a poly Butadiene-based resin, acrylate-based resin, and the like can be used, and there is no particular limitation.

Built-up wiring layer: As can be understood from Fig. 1, the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 are provided on the surface on which the inner layer circuit 22 of the core substrate is formed. The first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 constituting the multilayered printed wiring board relating to the present application at this time are formed by the copper circuit layers 23 and 24 and the copper circuit layers 23 and 24 in the XY direction with a coefficient of linear expansion of 1 ppm / And an insulation resin layer 30, 31 of 50 ppm / 占 폚. Here, the reason why the lower limit of the coefficient of linear thermal expansion in the X-Y direction of the insulating resin layers 30, 31 is set to 1 ppm / 占 폚 is that it is practically difficult to make the lower limit. On the other hand, when the linear expansion coefficient of the insulating resin layers 30, 31 in the XY direction exceeds 50 ppm / DEG C, "warpage" also tends to become "twisted", which makes it difficult to secure dimensional stability as a printed wiring board I do not.

Examples of the resin constituting the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 are epoxy resin, cyanate resin, maleimide resin, polyphenylene ether resin , A polyamide resin, a polyimide resin, a polyamideimide resin, a polybutadiene resin, an acrylate resin, or the like can be used.

The foregoing linear expansion coefficient of the built-up wiring layer in the XY direction is measured by using the above-mentioned resin component used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 , A copper foil with two semi-cured resin layers to be described later is prepared, these resin surfaces are brought into contact with each other and laminated, and then the copper foil is removed by etching to obtain a cured sheet-like insulating resin layer. And the test conditions.

The linear expansion coefficients in the XY direction of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 which have been described above are assumed to be rectangular built-up wiring layers as described above , It can be considered to be separated into the X-direction linear expansion coefficient Bx and the Y-direction linear expansion coefficient By. It is preferable that the value of the linear expansion coefficient Bx in the X direction and the value of the linear expansion coefficient of the Y direction at this time satisfy the relation of [Bx] / [By] = 0.9 to 1.1, By] = 0.95 to 1.05. If the value of [Bx] / [By] is out of this range, the coefficient of linear expansion in the X direction and the Y direction becomes significantly different among the first built-up wiring layer Bu1 and the second built- The multilayered printed circuit board 1 having small "twist" and "dimensional change" can not be obtained, which is not preferable.

In order to adjust the coefficient of linear thermal expansion of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2, silica particles, hollow silica particles, alumina Particles, talc, and the like. As the filler at this time, it is preferable to use a filler having an average particle diameter of 20 nm to 1 m. In this case, the lower limit value of the average particle diameter of the filler is not particularly limited, but is 20 nm in consideration of the actual state as an industrial product. On the other hand, if the average particle diameter of the filler exceeds 1 탆, the projections of the roughened surface of the copper foil and the filler in the insulating resin layer are highly likely to come into contact with each other, which tends to lower the adhesiveness. When the filler is contained in the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2, the filler is added to the insulating resin layers 30 and 31 by 30 weight % To 70% by weight. When the filler content is less than 30% by weight, it is not preferable to adjust the linear expansion rate in the XY directions of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 . On the other hand, when the filler content exceeds 70% by weight, it is not preferable that the insulating resin layer containing filler is buried between the inner layer circuits provided in the core substrate.

Hereinafter, the physical characteristics and the like for characterizing the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application will be described. The insulating resin layers 30 and 31 preferably have a tensile elastic modulus at 25 캜 of 5 to 10.. When the tensile elastic modulus of the insulating resin layers 30 and 31 at 25 캜 is less than 5 에는, there is a tendency that the warpage, the twist, and the dimensional change in the multilayer printed wiring board 1 become large Therefore, it is not preferable. On the other hand, when the tensile elastic modulus of the insulating resin layers 30, 31 at 25 캜 exceeds 10 kPa, the insulating resin layers 30, 31 are retreated, Cracks are likely to occur in the built-up wiring layer at the time of component mounting due to &quot; bending &quot; or &quot; twisting &quot;

The "tensile modulus at 25 ° C" referred to herein is measured by using the above-mentioned resin component used for forming the first built-up wiring layer Bu1 and the insulating resin layers 30, 31 of the second built-up wiring layer Bu2 Then, a copper foil having two semi-cured resin layers to be described later is prepared, and these resin surfaces are brought into contact with each other and laminated. Thereafter, the copper foil is removed by etching to obtain a cured sheet-shaped insulating resin layer, Measured using a viscoelasticity measuring device (DMA).

It is preferable that the dielectric constant of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application is 3.5 or less. Hereinafter, the reasons for defining the relative permittivity will be described. Considering the impedance control of a high-density printed wiring board in the case of using a high-frequency signal such as a portable telephone, good control of crosstalk between layers is required. An element that influences the crosstalk characteristic is a circuit width, an insulation distance between layers, and a dielectric constant of a resin component used for an insulation layer. If the insulation distance between the layers is short, it is necessary to narrow the circuit width of the stripline, which makes it difficult to form a circuit. Therefore, in order to use a strip line having a short insulation distance between layers, it is necessary to use a low dielectric constant insulation layer. That is, it is preferable to use a printed wiring board having a low relative permittivity in order to control the impedance when a substrate (thin printed wiring board) having a short insulation distance between layers is used. For this reason, by setting the dielectric constant of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application to be 3.5 or less, The impedance control of the high-density printed wiring board can be easily performed. Preferably, when the relative permittivity is set to 3.1 or less, the impedance control accuracy is further improved. When the relative permittivity is 3.0 or less, it is possible to ensure impedance control precision that substantially satisfies market requirements. Here, the relative dielectric constants of the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 are the same as those of the above-mentioned resin used for forming the insulating resin layers 30 and 31 of the first built-up wiring layer Bu1 and the second built- , A copper foil having two semi-cured resin layers to be described later is prepared, and these resin surfaces are brought into contact with each other and laminated. Thereafter, the copper foil is removed by etching to obtain a cured sheet-shaped insulating resin layer, Post-dielectric resonance method (using frequency: 1 GHz) as a sample.

The insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application have a special glass transition temperature (Tg) after curing But is preferably less than 160 ° C. When the glass transition temperature (Tg) is lower than 160 占 폚, the resin tends to have low elasticity in the high-temperature region of the insulating resin layers 30 and 31, and warpage is unlikely to occur. The term "glass transition temperature" as used herein refers to the glass transition temperature of the first and second built-up wiring layers Bu1 and Bu2 by using the above-mentioned resin component used for forming the insulating resin layers 30 and 31 of the first built- And the copper foil was removed by etching to obtain an insulating resin layer having a cured sheet shape. Using this, a viscoelasticity measuring device (DMA) was used as a sample, And the temperature is measured at a rate of 5 ° C / min.

The insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 of the multilayer printed wiring board 1 according to the present application preferably have a thickness of 20 m to 80 m . When the thickness of the insulating resin layers 30 and 31 is less than 20 占 퐉, it is not preferable to secure insulation and also tends to increase in "warpage", "twist" and "dimensional change". On the other hand, when the thickness of the insulating resin layers 30, 31 exceeds 80 탆, it is difficult to satisfy the requirement for a thin printed wiring board, the thickness variation of the insulating resin layers 30, 31 becomes large, Warpage &quot;, &quot; twist &quot;, and &quot; dimensional change &quot; tend to increase. The thickness of the insulating resin layers 30 and 31 constituting the first built-up wiring layer Bu1 and the second built-up wiring layer Bu2 is preferably not more than 50 占 퐉 in consideration of the demand for thinning of the printed wiring board in the market More preferably 40 탆 or less.

8 layer or more multilayer printed wiring board: The multilayer printed wiring board according to the present application has a minimum number of layers constituted by six layers, and a new built-up wiring layer is provided on the outer layer of the six multilayer printed wiring boards. It is preferable to provide a build-up wiring layer described below on the outermost layer of the wiring board.

It is preferable that the insulation resin layer constituting the built-up wiring layer has a low elasticity with a tensile elastic modulus at 25 캜 of less than 5.0.. The reason why the insulating resin layer having such a low elastic modulus is adopted is as follows. A component is mounted on the multilayer printed circuit board by using a solder ball or the like, and then the mounting board erroneously falls and the mounting board is subjected to a very strong falling impact when it collides against the bottom surface. In this case, when a strong impact such as the above-described drop is received on the surface where the solder ball used for component mounting is placed and the insulating resin base material come into contact with each other, the weight of the mounting component is increased, Cracks from the edge portion of the circuit to the insulating resin layer, peeling-off of the mounting components, circuit breakage, and the like may occur. In order to solve such a problem, it is preferable to design the insulating resin layer constituting the build-up wiring layer of the outermost layer to have low elasticity. When the tensile modulus of elasticity is less than 5.0 psi, even when falling occurs after the substrate is mounted, it is possible to effectively prevent occurrence of cracks, peeling-off of components to be mounted, disconnection of circuits, and the like, and good drop performance can be imparted to the mounting substrate. At this time, when the tensile modulus of elasticity is less than 3.5 psi, the drop performance of the mounting board significantly increases. When the tensile modulus of elasticity is less than 3.0 psi, the drop performance is further improved, So that almost no damage occurs. Here, the lower limit of the tensile modulus is not mentioned, but from the empirical point of view, it is about 0.1.. When the tensile modulus of elasticity is less than 0.1 GPa, the circuit at the mounting position is press-fitted and infiltrated by the pressure of the bonder used for component mounting, which is not preferable.

The insulating resin layer constituting the built-up wiring layer disposed on the outermost layer preferably has a break elongation of 5% or more. When the elongation at break is less than 5%, the insulating resin layer constituting the built-up wiring layer is removed, and even when the above-described tensile elastic modulus is less than 5.0,, there is a possibility that the above-mentioned drop performance of the mounting board may deviate. However, when the breaking elongation percentage of the insulating resin layer is 5% or more, the insulating resin layer constituting the built-up wiring layer is provided with sufficient flexibility against impact, and a good drop performance tends to be obtained.

As the low elastic resin constituting the insulating resin layer of the build-up wiring layer disposed on the outermost layer, an epoxy resin, a cyanate resin, a maleimide resin, a polyphenylene ether resin, a polyamide resin, a polyimide resin , Polyamideimide resin, polybutadiene resin, acrylate resin, polyester resin, phenoxy resin, polyvinyl acetal resin, styrene-butadiene resin and the like can be used.

2. Manufacturing form of multilayer printed wiring board

<First Production Method>

The first manufacturing method of the multilayer printed wiring board is characterized by comprising the following steps 1 to 3. Hereinafter, each step will be described with reference to Figs. 2 to 4. Fig.

Step 1: In this step, as shown in Fig. 2 (a), the skeleton material 12 and the skeleton material composed of the insulating resin 11 having the coefficient of linear expansion in the XY direction of 0 ppm / ° C to 20 ppm / A copper clad laminate (40) having a copper foil layer (14) on the surface of the insulating layer (10) is prepared. Then, a predetermined inner layer circuit 22 is formed on the copper foil layer 14 of the copper clad laminate 40 by performing via hole processing, interlayer conductive plating processing, etching processing and the like as necessary, The core substrate 2 having a thickness of the insulating layer shown in (b) of 150 占 퐉 or less is obtained.

Step 2: In this step, as shown in Fig. 3 (c), the semi-cured resin layer side 15 of the copper foil 50 with the semi-cured resin layer adhered thereto is exposed, As shown in Fig. 3 (d), a first built-in layer made of an insulating resin layer 30 and a copper foil layer 14 is formed on both surfaces of the core substrate 2, Thereby forming an up layer 3a. The insulating resin layer 30 at this time has a linear expansion coefficient in the XY direction of 1 ppm / DEG C to 50 ppm / DEG C and a value of the linear expansion coefficient Bx of the insulation resin layer in the X direction and a linear expansion coefficient BY in the Y direction ) Satisfies the relation of [Bx] / [By] = 0.9 to 1.1. The copper foil 50 to which the semi-cured resin layer is adhered is produced by applying a resin varnish for forming an insulating resin layer on the surface of the copper foil 14 and drying it. The manufacturing method of the copper foil 50 with the semi-cured resin layer attached thereto will be easily understood by those skilled in the art of manufacturing a printed wiring board, so that the explanation using the drawings is omitted.

3 (d), the copper foil layer 14 on the surface of the first built-up layer 3a is subjected to via hole processing, interlayer conductive plating The circuit 23 is formed and the first built-up wiring layer Bu1 is provided to obtain the laminated board 51 to which the first build-up wiring layer shown in Fig. 3 (e) is attached.

Step 3: In this step, the first unit process is repeated n ₁ times (an integer of n _1? 1) with respect to the circuit formation surface on both surfaces of the laminate plate 51 to which the first build- (4 + 2n ₁ ) layers of build-up wiring layers on both sides of the core substrate. The term &quot; first unit process &quot; as used herein refers to a process in which a semi-cured resin layer of a copper foil on which the semi-cured resin layer is adhered is brought into contact with the surface of the built-up layer to further form a buildup layer comprising the insulating resin layer and the copper foil layer, Circuit forming operation &quot;.

This first unit process corresponds to the process shown in Figs. 4 (f) to 5 (h). 4 (f), on the circuit formation surface of the first built-up wiring layer Bu1 of the laminate board 51 to which the first build-up wiring layer is attached, The second built-up layer 3b made of the insulating resin layer 31 and the copper foil layer 14 is formed by bringing the semi-cured resin layer 15 of the resin layer 50 into contact with the first resin layer 3, Similarly, a multilayer copper clad laminate 52 having two layers of first built-up wiring layers Bu1 and second built-up layers 3b is obtained on both sides of the core substrate 2.

Then, the copper foil layer 14 of the second built-up layer 3b on both sides of the multilayer copper clad laminate 52 shown in Fig. 4 (g) is subjected to via hole processing, interlayer conductive plating processing, And a circuit 24 is formed as shown in FIG. 5 (h) to obtain a multilayer printed wiring board 1 having a second built-up wiring layer Bu2. As shown in FIG. 5 (h), when the interlayer conductive plating 20 is performed to form the skipped vias 21, the perforation of the first built-up wiring layer Bu1 on the inner layer side can be omitted And it is preferable since the process for forming the first built-up wiring layer Bu1 can be reduced.

Repeatedly performing the above-described first unit process n ₁ times (n ₁ &gt; = ₁ ), a multilayer printed wiring board 1 having a built-up wiring layer of (4 + 2n ₁ ) Can be obtained.

<Second Manufacturing Method>

The second manufacturing method of the multilayer printed wiring board is the manufacturing method of the multilayered printed circuit board described above and is characterized by including the following steps 1 to 4. Here, steps 1 to 3 are the same as the first manufacturing method described above. Therefore, only step 4, which is another process, will be described here, and redundant description will be omitted.

Step 4: In this step, the circuit of the built-up wiring layer on the outermost layer of both sides of the &quot; multilayered printed wiring board having the (4 + 2n ₁ ) layer built-up wiring layers on both sides of the core substrate &quot; obtained in Step 3 of the first manufacturing method A multilayer printed wiring board comprising a build-up wiring layer having an insulation resin layer having a tensile modulus at 25 캜 of less than 5.0 25 at an outermost layer is obtained. At this time, the side of the semi-cured resin layer of the copper foil on which the semi-cured resin layer having the semi-cured resin layer having a tensile elastic modulus at 25 ° C of less than 5.0 m was adhered to the surface of the multilayered printed circuit board, The second unit process of laminating is repeated n ₂ times (an integer of n ₂ ≥1), and a built-up wiring layer having a layer structure of {4 + 2 (n _{1 +} n ₂ )} layers can be provided on both sides of the core substrate .

The manufacturing process of the second unit process is the same as the manufacturing process of the first unit process. However, the copper foil having the semi-cured resin layer used for forming the build-up layer is different. That is, in the semi-cured resin layer of the copper foil having the semi-cured resin layer used in the second unit process, the tensile elastic modulus at 25 ° C of less than 5.0 kPa after curing was used, Layer is formed. Therefore, from the state shown in FIG. 5 (h), a circuit obtained by laminating a semi-cured resin layer of a copper foil having a semi-cured resin layer on both sides thereof and forming a circuit 25 to provide a third built-up wiring layer Bu3 The multilayered printed circuit board 1 shown in Fig. 5 (i) can be obtained. At this time, the tensile elastic modulus of the insulating resin layer 32 of the third built-up wiring layer Bu3 at 25 캜 is less than 5.0..

Example 1

In Example 1, a multilayer printed wiring board with ten layers was produced as shown in Fig. 6 through the following steps.

Step 1: In Example 1, a copper clad laminate (copper foil thickness: 18 占 퐉, insulating layer thickness: 60 占 퐉, insulating layer: copper clad laminated board having copper foil on both surfaces of the insulating layer in the state shown in Fig. A glass fiber cloth was contained, the linear expansion coefficient in the X direction was 14.0 ppm / ° C, and the linear expansion coefficient in the Y direction was 12.0 ppm / ° C). Then, the copper foil of the outer layer of the copper clad laminate is etched and a predetermined inner layer circuit 22 is formed on both sides to form a core layer having a thickness of 150 탆 or less as shown in Fig. 2 (b) Thereby obtaining a substrate 2.

Step 2: In this Step 2, as shown in Fig. 3 (c), a copper foil 50 (thickness: 30 탆, copper foil thickness: 18 탆, semi-cured resin layer: Cured resin layer side 15 of the core substrate 2 is brought into contact with the surface of the core substrate 2 shown in Figure 2 (b) The first built-up layer 3a composed of the insulating resin layer 30 and the copper foil layer 14 was formed on both sides of the core substrate 2. [ The insulation resin layer of the first built-up layer 3a at this time has a linear expansion coefficient in the XY direction of 39 ppm / 占 폚, a value of the linear expansion coefficient Bx in the X direction of the insulation resin layer and a value of the Y direction linear expansion coefficient By A ratio [Bx] / [By] = 1.0, a tensile modulus at 25 占 폚 of 7.0 占, a relative dielectric constant of 3.1, and a glass transition temperature (Tg) of 150 占 폚.

3 (d), the copper foil layer 14 on the surface of the first built-up layer 3a is subjected to via hole processing, interlayer conductive plating Etching, and the like were carried out to obtain a laminate plate 51 having the first build-up wiring layer shown in FIG. 3 (e) attached to the first built-up wiring layer Bu1 having the circuit 23.

Step 3: In this Step 3, the same semi-cured resin layer as used for forming the first built-up layer 3a is formed on the circuit formation surface on both sides of the laminated board 51 to which the first build-up wiring layer is attached The above-described first unit process is repeated twice using the attached copper foil 50 to provide a second built-up wiring layer Bu2 and a third built-up wiring layer Bu3 of two layers, An eight-layer multilayer printed wiring board having built-up wiring layers Bu1 to Bu3 on both sides was obtained.

Step 4: In Step 4, on the circuit formation surface of the third built-up wiring layer Bu3 on the outermost layer of the multilayered printed wiring board of 8 layers obtained in Step 3, the tensile modulus at 25 deg. (Thickness: 40 mu m, copper foil thickness: 18 mu m) with a semi-cured resin layer having a semi-cured resin layer serving as the first built-up wiring layer Bu4 A built-up wiring layer having 10 layers of built-up wiring layers Bu1 to Bu4 on both sides of the core substrate and an outermost layer having an insulation resin layer having a tensile elastic modulus of less than 5.0 psi at 25 DEG C was arranged 10 layers of multilayered printed circuit boards were obtained. Further, a circuit provided on the ten-layered multilayered printed circuit board formed a circuit pattern for testing that simulated a high-density wiring circuit.

The ten-layered multilayered printed circuit board thus obtained was divided into four parts and used as a measurement sample of 12 cm x 12 cm. The amount of bending was measured by TherMoire AXP manufactured by Akrometrix. The warping amount was obtained by dividing the amount of deflection of the four measuring samples at the respective temperatures shown in Table 1 in the heating process of each measurement sample obtained by dividing into four pieces to 30 to 260 占 폚 and the descending temperature of 260 占 폚 to 30 占 폚 Respectively. Among the four measured values, the measurement data (the highest data in Table 1) and the measurement data in which the maximum warp occurred (the lowest data in Table 1) ) Are shown in Table 1. The same applies to the following examples and comparative examples.

Example 2

In Example 2, ten multilayered printed circuit boards were produced through the same Steps 1 to 4 as in Example 1, as shown in Fig. 6, and the amount of warpage was measured in the same manner as in Example 1. Fig. Therefore, only the other parts will be described.

In this Example 2, a copper foil 50 (thickness: 30 탆, copper foil thickness: 18 탆, semi-cured resin layer: epoxy resin, cyanate resin and bismaleimide resin with a semi-cured resin layer) The insulating resin layer 32 of the first built-up wiring layer Bu1 to the third built-up wiring layer Bu3 formed through the same Steps 1 to 3 as in Example 1 was formed to have a coefficient of linear thermal expansion in the XY direction of 24 ppm / , The ratio of the value of the linear expansion coefficient Bx of the insulating resin layer to the value of the Y direction linear expansion coefficient By of the insulating resin layer is represented by [Bx] / [By] = 1.0, the tensile elastic modulus at 25 deg. 3.2, and a glass transition temperature (Tg) of 270 占 폚.

Comparative Example

[Comparative Example 1]

In this Comparative Example 1, a multilayer printed wiring board having ten layers identical with those of Example 1 and Example 2 was produced, and the amount of warpage was measured in the same manner as in Example 1. [

In Comparative Example 1, on both sides of the core substrate 2 used in Example 1, a prepreg (having a thickness of 30 占 퐉 after lamination) containing 20 占 퐉 of glass fiber as a skeleton, And a step of forming a circuit pattern for testing were repeated four times to produce a multilayer printed circuit board having ten layers composed of all of the insulating layers as prepregs. The insulating resin layer composed of the prepreg has a ratio of a linear expansion coefficient of 14 ppm / ° C in the X direction, a linear expansion coefficient of 12 ppm / ° C in the Y direction, a value of the linear expansion coefficient Bx in the Y direction, [Bx] / [By] = 1.2, the tensile elastic modulus in the X direction at 25 占 폚 was 24 占 인, the tensile modulus in the Y direction was 22 占 and the relative dielectric constant was 4.6.

[Comparative Example 2]

In this Comparative Example 2, ten multilayer printed wiring boards identical to those of Examples 1 and 2 were produced, and the amount of warpage was measured in the same manner as in Example 1. [

In Comparative Example 2, the "cured" semi-cured resin layer having a semi-cured resin layer having a tensile modulus at 25 ° C of less than 5.0 kPa, which was used for forming the outermost layers of Examples 1 and 2, The copper foil with the semi-cured resin layer adhered thereon was laminated on both surfaces of the core substrate 2 used in Example 1 by using a copper foil (thickness: 40 탆, copper foil thickness: 18 탆) Was repeated four times to produce a multilayer printed wiring board having ten layers. The insulating resin layer at this time has a ratio of the linear expansion coefficient in the XY direction of 70 ppm / ° C and the value of the linear expansion coefficient in the X direction and the value of the Y direction linear expansion coefficient By in the range of [Bx] / [By] = 1.0, 25 Lt; 0 &gt; C had a tensile elastic modulus of 3.2 kPa and a relative dielectric constant of 3.1.

In addition, the sample for measuring the deflection amount obtained in Comparative Example 2 did not measure the amount of deflection in the process of raising and lowering the temperature, since warpage of 1.0 mm or more occurred in the stage immediately after the preparation.

[Contrast between Examples and Comparative Examples]

Included in Table 1 are the values of the characteristics and the amount of deflection described above so that the embodiment and the comparative example are comparable.

With reference to Table 1, the amounts of deflection of Examples and Comparative Example 1 are compared. First, the embodiment and the comparative example 1 show that the ten-layer multilayered printed circuit board in which all of the insulating layers of the comparative example 1 are made of prepregs has the smallest warpage and the smallest standard deviation It can be seen that the deviation of warpage is small. By the way, when the lowest data having the greatest amount of deflection in the embodiment and the comparative example 1 is viewed, this relationship is reversed. The minimum data deflection amount in Example 1 was found to be a maximum value of 164 mu m, a minimum value of 126 mu m, an average value of 140 mu m, and a standard deviation of 13.4 mu m. The minimum amount of deflection of the data in Example 2 was found to be a maximum value of 191 탆, a minimum value of 124 탆, an average value of 156 탆, and a standard deviation of 18.8 탆. On the other hand, when the amount of deflection of the lowest data in Comparative Example 1 is observed, the maximum value is 227 占 퐉, the minimum value is 145 占 퐉, the average value is 164 占 퐉, and the standard deviation is 25.2 占 퐉. Therefore, from the lowest data with the greatest amount of bending, it can be judged that the ten-layered multilayered printed circuit board comprising all the insulating layers of the prepreg in Comparative Example 1 has the largest warpage, the large standard deviation, and the large variation in warpage .

It can be understood from this that, in the case of the multilayered printed circuit board manufactured using only the prepreg as in Comparative Example 1, the deflection amount varies between the products of the same lot, which may make handling as a product difficult. On the other hand, if the "first built-up layer" and the "second built-up layer" satisfy the above-described conditions as in the multilayer printed wiring board according to the present application, even if any kind of layers are arranged in the built- Bending "," torsion ", and" dimensional change "can be predicted by reducing" warping "," torsion ", and" dimensional change "

The multilayered printed circuit board according to the present application has a smaller deflection, &quot; torsion &quot; and &quot; dimensional change &quot; and less variation, as compared with a multilayered printed circuit board having a conventional built-up wiring layer, Can be predicted in advance, and problems in the manufacturing process are less likely to occur. As a result, the multilayer printed wiring board relating to the present application can easily be mounted on a component, and can be supplied to the market as a high-quality printed wiring board. In addition, since the conventional build-up method can be used as it is in the method of manufacturing a multilayered printed circuit board according to the present application, the existing usability of the existing equipment is excellent.

1: multilayer printed wiring board
2: core substrate
3a, 3b: built-up layer
10: Insulating layer comprising skeletal material
11: Insulation layer constituent resin of core substrate
12: Skeleton material
14: Copper foil (layer)
15: Insulation resin layer
20: Interlayer plating
21: Skiped Beer
22: Inner layer circuit
23, 24, 25: Copper circuit layer
30, 31, 32: insulating resin layer
40: Copper clad laminate
50: Copper with a semi-cured resin layer
51: Laminate with first build-up wiring layer
52: multilayer copper clad laminate
B: The nth built-up wiring layer (n? 1)

Claims (7)

In a multilayer printed wiring board in which two or more build-up wiring layers are provided on both sides of a core substrate,
The core substrate constituting the multilayered printed circuit board is characterized in that the thickness of the insulating layer is 150 占 퐉 or less and the inner layer circuit is provided on both surfaces of the insulating layer including the skeleton and the XY direction of the insulating layer including the skeleton The coefficient of linear expansion is 0 ppm / DEG C to 20 ppm / DEG C,
The first built-up wiring layer provided on both sides of the core substrate and the second built-up wiring layer provided on the surface of the first built-up wiring layer are formed of a copper circuit layer and a copper foil layer having a linear expansion coefficient in the XY direction of 1 ppm / The value of the linear expansion coefficient Bx of the insulating resin layer in the X direction and the value of the Y direction linear expansion coefficient By of the insulation resin layer satisfy the relation of [Bx] / [By] = 0.9 to 1.1 Layer printed wiring board. The multilayer printed wiring board according to claim 1, wherein the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer has a tensile elastic modulus at 25 캜 of 5 to 10 탆. The multilayer printed wiring board according to claim 1 or 2, wherein the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer has a thickness of 20 μm to 80 μm. 4. The multilayer printed wiring board according to any one of claims 1 to 3, wherein the insulating resin layer constituting the first built-up wiring layer and the second built-up wiring layer has a relative dielectric constant of 3.5 or less. A multilayer printed wiring board according to any one of claims 1 to 4, wherein a built-up wiring layer having an insulation resin layer having a tensile modulus at 25 캜 of less than 5.0 을 is provided on the outermost layer of the multilayer printed wiring board, Multilayer printed wiring board. The method for manufacturing a multilayer printed wiring board according to any one of claims 1 to 4,
A process for producing a multilayer printed wiring board characterized by comprising the following steps 1 to 3.
Step 1: An inner layer circuit is formed by using a copper clad laminate having a copper foil layer on the surface of an insulating layer including a skeleton having an XY linear expansion coefficient of 0 ppm / ° C to 20 ppm / ° C. Mu] m or less.
Step 2: The surface of the copper foil is coated with the insulating resin layer after curing in a range of 1 ppm / 占 폚 to 50 ppm / 占 폚 in the XY direction in the XY direction, the value of the linear expansion coefficient (Bx) ) Of the copper foil having the semi-cured resin layer adhered thereto is in the range of [Bx] / [By] = 0.9 to 1.1, The resin layer side is brought into contact with both surfaces of the core substrate and laminated, and a circuit is formed to obtain a laminated board having the first build-up wiring layer attached thereto
Step 3: The semi-cured resin layer of the copper foil to which the semi-cured resin layer is adhered is brought into contact with the surface of the laminate with the first build-up wiring layer attached thereto to form a built-up layer composed of the insulating resin layer and the copper foil layer, for the operation of performing a formation on both surfaces of the art is the first build-up wiring layer as a first unit process-clad laminate, the first step is performed by repeating a unit of n ₁ times (n an integer from ₁ ≥1), both surfaces of the core substrate, Layered printed wiring board having a built-up layer having a layer structure of (4 + 2n ₁ ) layer is obtained. The method for manufacturing a multilayer printed wiring board according to claim 5,
A method for manufacturing a multilayer printed wiring board characterized by comprising the following steps 1 to 4.
Step 1: An inner layer circuit is formed by using a copper clad laminate having a copper foil layer on the surface of an insulating layer including a skeleton having an XY linear expansion coefficient of 0 ppm / ° C to 20 ppm / ° C. Mu] m or less.
Step 2: The surface of the copper foil is coated with the insulating resin layer after curing in a range of 1 ppm / 占 폚 to 50 ppm / 占 폚 in the XY direction in the XY direction, the value of the linear expansion coefficient (Bx) ) Of the copper foil having the semi-cured resin layer adhered thereto is in the range of [Bx] / [By] = 0.9 to 1.1, The resin layer side is brought into contact with both surfaces of the core substrate and laminated, and a circuit is formed to obtain a laminate plate having the first build-up wiring layer attached thereto.
Step 3: The semi-cured resin layer of the copper foil to which the semi-cured resin layer is adhered is brought into contact with the surface of the laminate with the first build-up wiring layer attached thereto to form a built-up layer composed of the insulating resin layer and the copper foil layer, for the operation of performing a formation on both surfaces of the art is the first build-up wiring layer as a first unit process-clad laminate, the first step is performed by repeating a unit of n ₁ times (n an integer from ₁ ≥1), both surfaces of the core substrate, (4 + 2n ₁ ) layer of a multilayer printed wiring board having a built-up wiring layer.
Step 4: the radius a in a built surface of the up wiring layer is formed by using the art the first unit process, (4 + 2n ₁₎ layer, forming a semi-cured resin layer is less than 5.0㎬ tensile elastic modulus at 25 ℃ after curing Chemistry A process of forming a circuit by using a copper foil having a resin layer attached thereto and laminating the copper foil on the side of the semi-cured resin layer of the copper foil on which the semi-cured resin layer is adhered is laminated to form a second unit process, _twice performed repeatedly (n an integer from _{2 ≥1), {4 + 2} (n 1+ n 2)} on both surfaces of a core substrate provided with a built-up layer of the layer structure of the layer, the tensile elastic modulus at 25 ℃ the outermost layer And a built-up wiring layer having an insulating resin layer of less than 5.0 mu m is disposed.

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