JP5252024B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5252024B2 JP5252024B2 JP2011088139A JP2011088139A JP5252024B2 JP 5252024 B2 JP5252024 B2 JP 5252024B2 JP 2011088139 A JP2011088139 A JP 2011088139A JP 2011088139 A JP2011088139 A JP 2011088139A JP 5252024 B2 JP5252024 B2 JP 5252024B2
- Authority
- JP
- Japan
- Prior art keywords
- solder
- semiconductor chip
- circuit pattern
- layer
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83194—Lateral distribution of the layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
両角,他2名,「パワー半導体モジュールにおける信頼性設計技術」,冨士時報,富士電機株式会社,平成13年2月10日,第74巻,第2号,p145〜148
半導体チップと回路パターンとの間の接合面を半導体チップの中央部下に対応する中央面域と、該中央面域を囲む外周面域とに分け、かつ回路パターンには前記中央面域に対応して台形状の凸部を形成した上で、回路パターン上に形成した前記凸部と半導体チップの中央部との間を、半田の代わりにナノ金属ペーストを適用して金属接合し、その外周面域を鉛フリー半田で接合する(請求項1)。
2 絶縁基板
2b 回路パターン
2b−1 凸部
3 半導体チップ
5 鉛フリー半田の半田接合層
5a 金属間化合物
8 ナノ金属粒子接合層
Claims (1)
- 絶縁基板の回路パターン上に鉛フリー半田を適用して半導体チップを半田マウントした半導体装置において、
半導体チップと回路パターンとの間の接合面を半導体チップの中央部下に対応する中央面域と、該中央面域を囲む外周面域とに分け、かつ回路パターンには前記中央面域に対応して台形状の凸部を形成した上で、該凸部と半導体チップの中央部との間をナノ金属粒子で金属接合し、その外周面域を鉛フリー半田で接合したことを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011088139A JP5252024B2 (ja) | 2011-04-12 | 2011-04-12 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011088139A JP5252024B2 (ja) | 2011-04-12 | 2011-04-12 | 半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005301427A Division JP4904767B2 (ja) | 2005-10-17 | 2005-10-17 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011159994A JP2011159994A (ja) | 2011-08-18 |
JP5252024B2 true JP5252024B2 (ja) | 2013-07-31 |
Family
ID=44591630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011088139A Expired - Fee Related JP5252024B2 (ja) | 2011-04-12 | 2011-04-12 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5252024B2 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5874516B2 (ja) * | 2012-04-27 | 2016-03-02 | 株式会社村田製作所 | 電子部品 |
JP5975007B2 (ja) * | 2013-09-25 | 2016-08-23 | トヨタ自動車株式会社 | 半導体装置及びその製造方法 |
EP3069811A4 (en) | 2013-11-11 | 2017-11-29 | Nippon Steel & Sumitomo Metal Corporation | Metal bonding structure, metal bonding method, and metal bonding material using metal nanoparticles |
JP2015177182A (ja) * | 2014-03-18 | 2015-10-05 | 三菱電機株式会社 | パワーモジュール |
JP6366766B2 (ja) * | 2017-03-24 | 2018-08-01 | 三菱電機株式会社 | 半導体装置 |
JP7492375B2 (ja) * | 2020-05-26 | 2024-05-29 | 株式会社 日立パワーデバイス | 半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5466073A (en) * | 1977-11-04 | 1979-05-28 | Nec Corp | Semiconductor device |
EP0495005A1 (en) * | 1989-10-05 | 1992-07-22 | Digital Equipment Corporation | Die attach structure |
JP4471470B2 (ja) * | 2000-07-25 | 2010-06-02 | 京セラ株式会社 | 半導体装置 |
JP2002158238A (ja) * | 2000-11-16 | 2002-05-31 | Mitsubishi Electric Corp | 電子部品の接合方法、電子装置の製造方法、及び電子装置 |
JP2003142809A (ja) * | 2001-11-05 | 2003-05-16 | Denki Kagaku Kogyo Kk | 金属ベース回路基板及びそれを用いたモジュール |
-
2011
- 2011-04-12 JP JP2011088139A patent/JP5252024B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2011159994A (ja) | 2011-08-18 |
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