JP2010021416A5 - - Google Patents
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- JP2010021416A5 JP2010021416A5 JP2008181456A JP2008181456A JP2010021416A5 JP 2010021416 A5 JP2010021416 A5 JP 2010021416A5 JP 2008181456 A JP2008181456 A JP 2008181456A JP 2008181456 A JP2008181456 A JP 2008181456A JP 2010021416 A5 JP2010021416 A5 JP 2010021416A5
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- Japan
- Prior art keywords
- resist pattern
- main surface
- semiconductor substrate
- forming
- organic material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Claims (7)
前記反射防止膜上に、パターン端部において前記パターンの端部が2°以上5°以下の傾斜角度で前記半導体基板側に向かって広がるような傾斜を有するレジストパターンを形成する工程と、
前記レジストパターンをマスクとして前記半導体基板の前記主表面にイオンを注入する工程とを備えた、半導体装置の製造方法。 Forming an antireflection film on the main surface of the semiconductor substrate;
Forming a resist pattern on the antireflection film having an inclination such that the end of the pattern spreads toward the semiconductor substrate at an inclination angle of 2 ° or more and 5 ° or less at the pattern end ;
And a step of implanting ions into the main surface of the semiconductor substrate using the resist pattern as a mask.
前記レジストパターンの周囲にシリコンおよびゲルマニウムの少なくともいずれかを含む有機材料層を形成する工程と、
前記レジストパターンおよび前記有機材料層をマスクとして前記半導体基板の前記主表面にイオンを注入する工程とを備えた、半導体装置の製造方法。 Forming a resist pattern on the main surface of the semiconductor substrate;
Forming an organic material layer containing at least one of silicon and germanium around the resist pattern;
And a step of implanting ions into the main surface of the semiconductor substrate using the resist pattern and the organic material layer as a mask.
シリコンおよびゲルマニウムの少なくともいずれかを含み、かつ前記レジストパターン中の酸成分を触媒として熱架橋反応を起こして硬化する有機材料を、前記レジストパターンを覆うように形成する工程と、
加熱処理を施して前記レジストパターンに接する部分の前記有機材料を熱硬化させることにより、前記レジストパターンの周囲に前記有機材料層を形成する工程とを含む、請求項2に記載の半導体装置の製造方法。 The step of forming the organic material layer includes
Forming an organic material containing at least one of silicon and germanium and curing by causing a thermal crosslinking reaction using an acid component in the resist pattern as a catalyst; and covering the resist pattern;
The method of manufacturing a semiconductor device according to claim 2 , further comprising: heat-treating the organic material in a portion in contact with the resist pattern to form the organic material layer around the resist pattern. Method.
前記レジストパターンをマスクとして前記半導体基板の前記主表面にイオンを注入する工程とを備えた、半導体装置の製造方法。 Forming a resist pattern including one or more selected from the group consisting of silicon, germanium and a dye on the main surface of the semiconductor substrate;
And a step of implanting ions into the main surface of the semiconductor substrate using the resist pattern as a mask.
前記レジストパターンをマスクとして前記半導体基板の前記主表面にイオンを注入する工程とを備えた、半導体装置の製造方法。 Forming a negatively charged resist pattern on the main surface of the semiconductor substrate;
And a step of implanting ions into the main surface of the semiconductor substrate using the resist pattern as a mask.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008181456A JP2010021416A (en) | 2008-07-11 | 2008-07-11 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008181456A JP2010021416A (en) | 2008-07-11 | 2008-07-11 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010021416A JP2010021416A (en) | 2010-01-28 |
JP2010021416A5 true JP2010021416A5 (en) | 2011-08-25 |
Family
ID=41706003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008181456A Pending JP2010021416A (en) | 2008-07-11 | 2008-07-11 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
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JP (1) | JP2010021416A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9268899B2 (en) * | 2013-03-14 | 2016-02-23 | Silicon Storage Technology, Inc. | Transistor design for use in advanced nanometer flash memory devices |
CN112038391B (en) * | 2019-06-03 | 2024-05-24 | 上海先进半导体制造有限公司 | Method for manufacturing super junction field effect transistor |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100633994B1 (en) * | 2005-07-26 | 2006-10-13 | 동부일렉트로닉스 주식회사 | Well photoresist pattern of semiconductor device and method for forming the same |
JP2007305858A (en) * | 2006-05-12 | 2007-11-22 | Matsushita Electric Ind Co Ltd | Manufacturing method of semiconductor device |
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2008
- 2008-07-11 JP JP2008181456A patent/JP2010021416A/en active Pending
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