JP2005252232A5 - - Google Patents
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- JP2005252232A5 JP2005252232A5 JP2004362116A JP2004362116A JP2005252232A5 JP 2005252232 A5 JP2005252232 A5 JP 2005252232A5 JP 2004362116 A JP2004362116 A JP 2004362116A JP 2004362116 A JP2004362116 A JP 2004362116A JP 2005252232 A5 JP2005252232 A5 JP 2005252232A5
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- JP
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- Prior art keywords
- semiconductor film
- chip
- integrated circuit
- forming
- thickness
- Prior art date
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Claims (14)
前記集積回路は、液滴吐出法又はレーザカット法により形成された回路接続により、選択されるメモリセルを有するROM、を有することを特徴とするチップ搭載物。 A chip-mounted object including a chip having a light-transmitting property, including an integrated circuit having a semiconductor film having a thickness of 0.2 μm or less,
The integrated circuit includes a ROM having a memory cell selected by a circuit connection formed by a droplet discharge method or a laser cut method.
前記集積回路は、液滴吐出法又はレーザカット法により形成された回路接続により、選択されるメモリセルを有する第1ROMと、
フォトリソグラフィー法により形成された回路接続により、選択されるメモリセルを有する第2ROMと、を有することを特徴とするチップ搭載物。 A chip-mounted object having translucency , mounted with a chip including an integrated circuit having a semiconductor film having a thickness of 0.2 μm or less,
The integrated circuit includes a first ROM having memory cells selected by circuit connection formed by a droplet discharge method or a laser cut method;
And a second ROM having a memory cell selected by circuit connection formed by a photolithography method.
前記集積回路は、前記半導体膜の特性ばらつきに基づく固有なデータを格納した書き換え不可能な不揮発性メモリを有することを特徴とするチップ搭載物。 A chip-mounted object having translucency , mounted with a chip including an integrated circuit having a semiconductor film having a thickness of 0.2 μm or less,
The chip mounted product, wherein the integrated circuit has a non-rewritable nonvolatile memory storing unique data based on characteristic variations of the semiconductor film.
前記アンテナは、前記集積回路と電気的に接続されていることを特徴とするチップ搭載物。 An integrated circuit thickness having the following semiconductor film 0.2 [mu] m, to have a, an antenna provided on the integrated circuit, a switch-up payload equipped with chips having translucency ,
A chip-mounted object , wherein the antenna is electrically connected to the integrated circuit.
前記アンテナは、前記集積回路と電気的に接続されていることを特徴とするチップ搭載物。 Provided over the first substrate, mounted an integrated circuit having the 0.2μm or less of the semiconductor film thickness, the antenna provided on a second substrate, to have a, a chip with a light-transmitting property a the switch-up mounted object,
A chip-mounted object , wherein the antenna is electrically connected to the integrated circuit.
前記半導体膜は、ガラス基板、石英基板、ステンレス基板、及び可撓性を有する合成樹脂からなる基板のいずれかの絶縁表面上に設けられていることを特徴とするチップ搭載物。 In any one of Claims 1 thru | or 7 ,
The chip mounting object, wherein the semiconductor film is provided on an insulating surface of any of a glass substrate, a quartz substrate, a stainless steel substrate, and a substrate made of a synthetic resin having flexibility.
前記集積回路は、前記半導体膜を有する薄膜トランジスタを有することを特徴とするチップ搭載物。 In any one of Claims 1 thru | or 8 ,
The integrated circuit, chip mounting was characterized by having a thin film transistor having the semiconductor film.
前記半導体膜を結晶化して結晶性半導体膜を形成し、
前記結晶性半導体膜を有する集積回路を形成し、
前記集積回路を有する、透光性を備えたチップを搭載することを特徴とするチップ搭載物の作製方法。 Forming a semiconductor film having a thickness of 0.2 μm or less;
Crystallizing the semiconductor film to form a crystalline semiconductor film,
Forming an integrated circuit having the crystalline semiconductor film;
A method for manufacturing a chip-mounted object, comprising mounting a chip having translucency, the chip having the integrated circuit.
前記半導体膜を結晶化して結晶性半導体膜を形成し、
前記結晶性半導体膜上に、フォトリソグラフィー法を用いて第1の配線を形成し、
前記第1の配線による回路接続によって選択される第1メモリセルを形成し、且つ前記結晶性半導体膜上に、液滴吐出法又はレーザカット法を用いて第2の配線を形成し、
前記第2の配線による回路接続によって選択される第2メモリセルを形成して集積回路を形成し、
前記集積回路を有する、透光性を備えたチップを搭載することを特徴とするチップ搭載物の作製方法。 Forming a semiconductor film having a thickness of 0.2 μm or less;
Crystallizing the semiconductor film to form a crystalline semiconductor film,
On the crystalline semiconductor film, forming a first wiring by photolithography,
It said first forming a first memory cell which is selected by a circuit connected by wiring, and on the crystalline semiconductor film, forming a second wiring by a droplet discharging method or a laser cutting method,
Wherein forming a second memory cell which is selected to form an integrated circuit by a circuit connected by a second wiring,
A method for manufacturing a chip-mounted object, comprising mounting a chip having translucency, the chip having the integrated circuit.
前記半導体膜をレーザにより結晶化して結晶性半導体膜を形成し、
前記結晶性半導体膜を有する集積回路を形成し、
前記集積回路を有する、透光性を備えたチップを搭載することを特徴とするチップ搭載物の作製方法。 Forming a semiconductor film having a thickness of 0.2 μm or less;
Crystallizing the semiconductor film with a laser to form a crystalline semiconductor film,
Forming an integrated circuit having the crystalline semiconductor film;
A method for manufacturing a chip-mounted object, comprising mounting a chip having translucency, the chip having the integrated circuit.
前記半導体膜に接するように金属元素を添加し、加熱することにより結晶化して第1の結晶性半導体膜を形成し、
前記第1の結晶性半導体膜をレーザにより結晶化して第2の結晶性半導体膜を形成し、
前記第2の結晶性半導体膜を有する集積回路を形成し、
前記集積回路を有する、透光性を備えたチップを搭載することを特徴とするチップ搭載物の作製方法。 Forming a semiconductor film having a thickness of 0.2 μm or less;
A metal element is added so as to be in contact with the semiconductor film, and is heated to crystallize to form a first crystalline semiconductor film,
Crystallizing the first crystalline semiconductor film with a laser to form a second crystalline semiconductor film;
Forming an integrated circuit having the second crystalline semiconductor film;
A method for manufacturing a chip-mounted object, comprising mounting a chip having translucency, the chip having the integrated circuit.
前記レーザの照射方向と、キャリア移動方向とが沿うように、前記半導体膜のチャネル形成領域を形成し、
前記レーザの照射方向と垂直な方向に曲がるように固定して前記チップを搭載することを特徴とするチップ搭載物の作製方法。 In claim 12 or 13 ,
Forming a channel formation region of the semiconductor film so that the laser irradiation direction and the carrier movement direction are along;
A method of manufacturing a chip-mounted object, wherein the chip is mounted while being fixed so as to bend in a direction perpendicular to the laser irradiation direction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004362116A JP5121119B2 (en) | 2003-12-26 | 2004-12-15 | Chip loading |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003432343 | 2003-12-26 | ||
JP2003432343 | 2003-12-26 | ||
JP2004030976 | 2004-02-06 | ||
JP2004030976 | 2004-02-06 | ||
JP2004362116A JP5121119B2 (en) | 2003-12-26 | 2004-12-15 | Chip loading |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2005252232A JP2005252232A (en) | 2005-09-15 |
JP2005252232A5 true JP2005252232A5 (en) | 2007-12-06 |
JP5121119B2 JP5121119B2 (en) | 2013-01-16 |
Family
ID=35032384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004362116A Expired - Fee Related JP5121119B2 (en) | 2003-12-26 | 2004-12-15 | Chip loading |
Country Status (1)
Country | Link |
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JP (1) | JP5121119B2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007234001A (en) * | 2006-01-31 | 2007-09-13 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
WO2007088796A1 (en) * | 2006-01-31 | 2007-08-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP5196212B2 (en) * | 2006-03-02 | 2013-05-15 | セイコーエプソン株式会社 | Thin film device manufacturing method |
JP2008221880A (en) * | 2007-03-08 | 2008-09-25 | Willcom Inc | Pedal of bicycle having built-in position information transmitting device, and mobile communication system providing position information of bicycle |
US7897482B2 (en) * | 2007-05-31 | 2011-03-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP2011141856A (en) * | 2010-01-08 | 2011-07-21 | Junichi Mizutani | Crime prevention method for money |
JP7551410B2 (en) | 2020-09-11 | 2024-09-17 | 株式会社フジシール | RFID labels |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63244497A (en) * | 1987-03-31 | 1988-10-11 | Texas Instr Japan Ltd | Semiconductor device |
JPH06196659A (en) * | 1992-12-22 | 1994-07-15 | Kawasaki Steel Corp | Semiconductor memory |
JP2629626B2 (en) * | 1994-12-26 | 1997-07-09 | 日本電気株式会社 | Semiconductor memory device and method of manufacturing the same |
JP4042182B2 (en) * | 1997-07-03 | 2008-02-06 | セイコーエプソン株式会社 | IC card manufacturing method and thin film integrated circuit device manufacturing method |
TW586231B (en) * | 2001-07-24 | 2004-05-01 | Seiko Epson Corp | Transfer method, methods of manufacturing thin film devices and integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, manufacturing methods of IC card and electronic appliance |
JP5057619B2 (en) * | 2001-08-01 | 2012-10-24 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP4159779B2 (en) * | 2001-12-28 | 2008-10-01 | 株式会社半導体エネルギー研究所 | Semiconductor devices, electronic equipment |
JP2003209421A (en) * | 2002-01-17 | 2003-07-25 | Dainippon Printing Co Ltd | Rfid tag having transparent antenna and production method therefor |
-
2004
- 2004-12-15 JP JP2004362116A patent/JP5121119B2/en not_active Expired - Fee Related
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