CN113485052A

CN113485052A - Display panel and manufacturing method thereof

Info

Publication number: CN113485052A
Application number: CN202110738932.6A
Authority: CN
Inventors: 黄世帅; 郑浩旋
Original assignee: HKC Co Ltd
Current assignee: HKC Co Ltd
Priority date: 2021-06-30
Filing date: 2021-06-30
Publication date: 2021-10-08
Anticipated expiration: 2041-06-30
Also published as: CN113485052B

Abstract

The application provides a display panel and a manufacturing method thereof. The display panel includes an array substrate. The array substrate is provided with a display area and a non-display area. The display area is provided with a plurality of data lines and a common electrode. The non-display area is provided with a plurality of chip on films, a first test pad, a second test pad and a third test pad. The chip on film is electrically connected with the plurality of data lines of the display area in a one-to-one correspondence manner. The third test pad is electrically connected to the common electrode. The first test pad and the second test pad are arranged in the area between two adjacent chip on films and are arranged at intervals along the extending direction of the first edge of the array substrate. The third test pad is arranged in the interval area between the chip on film and the second edge of the array substrate. The non-display area is also provided with a waterproof glue layer, and the waterproof glue layer covers the surface of the third test pad. The third test pad is arranged on the outer side of the chip on film of the display panel, so that the situation that the third test pad is corroded by water vapor caused by poor coating of the waterproof glue layer and further the common electrode is corroded can be avoided.

Description

Display panel and manufacturing method thereof

Technical Field

The present disclosure relates to the field of liquid crystal display technologies, and in particular, to a display panel and a method for manufacturing the display panel.

Background

In a conventional process of manufacturing a Liquid Crystal Display (LCD), after a liquid crystal panel is cut, a simple lighting confirmation, which is generally called a lighting Test (CT), is performed. In the lighting Test process, a Test signal is usually applied to a lighting Test Pad (Cell Test Pad) of the liquid crystal panel, and the lighting Test Pad transmits the Test signal to the pixel unit of the liquid crystal panel through a corresponding Test line. After one lighting test (CT1) inspection, the liquid crystal panel is directly scrapped if the liquid crystal panel has obvious line defects. After the liquid crystal panel is qualified through lighting test, the test circuit between the lighting test pad and the pixel unit is cut off through the laser cutting process, then the chip on film is attached to the liquid crystal panel, and subsequent signals are applied to the pixel unit of the liquid crystal panel through the chip on film. However, during the laser cutting process, the common electrode trace cannot be cut off, because the subsequent lighting test process needs to continue to externally feed signals through the common electrode trace. However, if the common electrode trace is not cut off, when the lighting test pad is corroded by water vapor, the water vapor can diffuse to the display area of the liquid crystal panel along the common electrode trace, thereby affecting the display performance of the liquid crystal panel. One conventional approach is to coat taffey (tufy) glue on the lighting test pad to avoid the phenomenon of moisture corrosion. However, when the coating condition of the taffy glue is not good, the lighting test pad is still easily corroded by water vapor.

Disclosure of Invention

The main objective of the present application is to provide a display panel, which is to provide a test pad connected to a common electrode in a space between a flip chip and a second edge of an array substrate, and cover a waterproof adhesive layer on a surface connected to the common electrode, so as to solve the problem that the test pad is corroded by water vapor due to poor coating condition of taffy adhesive in the prior art.

In order to achieve the above object, an embodiment of the present application provides a display panel, which includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate. The array substrate is provided with a display area and a non-display area adjacent to the display area. The display area is provided with a plurality of data lines and a common electrode. The non-display area is provided with a plurality of chip on films. The plurality of chip on films are electrically connected with the plurality of data wires of the display area in a one-to-one correspondence mode, and the third test pad is electrically connected with the common electrode.

The non-display area is also provided with a first test pad, a second test pad and a third test pad, and the third test pad is electrically connected with the common electrode. The first test pad and the second test pad are arranged in an area between two adjacent chip on films and are arranged at intervals along the extending direction of the first edge of the array substrate. The third test pad is arranged in a spacing area between the plurality of chip on films and the second edge of the array substrate. The non-display area is also provided with a waterproof adhesive layer, and the waterproof adhesive layer covers the surface of the third test pad.

In an embodiment, the first test pad and the second test pad are further disposed in a spacing region between the plurality of flip chips and the second edge of the array substrate, and the first test pad and the second test pad disposed between the plurality of flip chips and the second edge of the array substrate are located between the flip chips and the third test pad.

In one embodiment, during the testing process of the display panel, the first test pad is electrically connected with the even-numbered data lines through a first test lead, and the second test pad is electrically connected with the odd-numbered data lines through a second test lead;

during the use process of the display panel, the electric connection circuit of the first test lead and the even-numbered column data lines is cut off, and the electric connection circuit of the second test lead and the odd-numbered column data lines is cut off.

In an embodiment, in an area between two adjacent flip chips, a first test pad group composed of the first test pad and the second test pad, and in an interval area between the plurality of flip chips and the second edge of the array substrate, a second test pad group composed of the first test pad, the second test pad and the third test pad, the first test pad group and the second test pad group are arranged in a row.

In one embodiment, the waterproof adhesive layer is in a long strip shape, and the waterproof adhesive layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

In an embodiment, the waterproof glue layer includes a first glue layer located between two adjacent flip chips and a second glue layer located in a spacing area between the two adjacent flip chips and the second edge of the array substrate, the first glue layer covers the surfaces of the first test pad and the second test pad, the second glue layer covers the surfaces of the first test pad, the second test pad and the third test pad, and the coating width of the second glue layer is greater than the coating width of the first glue layer, or the coating thickness of the second glue layer is greater than the coating thickness of the first glue layer.

Another embodiment of the present application further provides a manufacturing method of a display panel, which is used for manufacturing the display panel according to any one of the above embodiments. The manufacturing method of the display panel comprises the following steps:

s101: providing a display panel, wherein the display panel comprises an array substrate, and the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with first test pads, second test pads and third test pads, the first test pads and the second test pads are arranged at intervals along the extending direction of the first edge of the array substrate, the first test pads are electrically connected with even-numbered rows of data lines through first test leads, the second test pads are electrically connected with odd-numbered rows of data lines through second test leads, and the third test pads are electrically connected with the common electrode;

s102: performing lighting test on the display panel;

s103: cutting off an electric connection line between the first test lead and the even-numbered row data lines and cutting off an electric connection line between the second test lead and the odd-numbered row data lines;

s104: the method comprises the steps of attaching a plurality of chip on films to the display panel, enabling the chip on films and the data lines to be in one-to-one correspondence to form electric connection, enabling the first test pads and the second test pads to be arranged in an area between two adjacent chip on films, and enabling the third test pads to be arranged in outer areas of the chip on films.

S105: and coating a waterproof adhesive layer on the non-display area of the array substrate, wherein the waterproof adhesive layer covers the surface of the third test pad.

In one embodiment, in step S105, the waterproof adhesive layer is in a strip shape, and the waterproof adhesive layer covers the surfaces of the first test pad, the second test pad and the third test pad at the same time.

In an embodiment, in step S105, the waterproof adhesive layer includes a first adhesive layer located between two adjacent flip chips and a second adhesive layer located outside the plurality of flip chips, the first adhesive layer covers the surfaces of the first test pad and the second test pad, the second adhesive layer covers the surfaces of the first test pad, the second test pad and the third test pad, and a coating width of the second adhesive layer is greater than a coating width of the first adhesive layer, or a coating thickness of the second adhesive layer is greater than a coating thickness of the first adhesive layer.

In one embodiment, the lighting test process includes the following steps: filling even-numbered rows of data driving signals into the first test pad, filling odd-numbered rows of data driving signals into the second test pad, wherein the even-numbered rows of data driving signals are transmitted to even-numbered rows of data lines through the first test lead, and the odd-numbered rows of data driving signals are transmitted to odd-numbered rows of data lines through the second test lead; perfusing a common voltage signal at the third test pad, the common voltage signal being transmitted to the common electrode through the third test pad;

and/or, before the waterproof adhesive layer is coated, performing a lighting test on the display panel with the chip on film again, wherein the lighting test again comprises the following steps: transmitting a data driving signal to the plurality of data lines through the chip on film; and pouring a common voltage signal into the third test pad, so that the common voltage signal is transmitted to the common electrode through the third test pad.

In the display panel and the manufacturing method of the display panel provided by the embodiment of the application, because the third test pad connected with the common electrode is arranged at the interval areas between the second edges of the plurality of flip chips and the array substrate, when the waterproof glue layer is coated, the area of the waterproof glue layer needing to be coated is smaller and is located in the edge area of the array substrate, and the coating difficulty of the waterproof glue layer is smaller. Therefore, the arrangement position of the third test pad can effectively ensure the coating quality of the waterproof adhesive layer. In addition, because the first test pad and the second test pad with the electric connection circuit between many data lines can be cut off in the use of follow-up display panel, even the coating quality that the surface of first test pad and second test pad does not coat waterproof glue layer or waterproof glue layer is not good, when first test pad or second test pad is corroded to steam, steam can not along first test pad or second test pad with the electric connection circuit between many data lines spreads to display panel's inside to cause the influence to display panel's performance.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

fig. 2 is a schematic structural view of the array substrate in fig. 1;

fig. 3 is an enlarged schematic view of a region a of the array substrate in fig. 2;

fig. 4 is a schematic structural diagram of a display panel according to a second embodiment of the present application;

FIG. 5 is a schematic structural diagram of the array substrate in FIG. 4;

fig. 6 is a schematic flowchart of a manufacturing method of a display panel according to a third embodiment of the present application;

fig. 7 is a schematic structural diagram of the display panel provided in step S101 in fig. 6;

FIG. 8 is a schematic structural diagram of the display panel shown in FIG. 7 after laser cutting;

fig. 9 is a schematic structural view of the display panel in fig. 8 after the flip-chip film is attached.

The reference numbers illustrate:

name (R)	Reference numerals	Name (R)	Reference numerals
				Display panel
	100	Array substrate	110
				Color film substrate	210	Data line	120
Scanning line	130	Pixel unit	140
				Display area	111	Non-display area	112
Common electrode	141	Chip on film	150
				First test pad	161	Second test pad	162
Third test pad	163	First test lead	171
				Second test lead	172	The first part	1711
The second part	1712	Waterproof glue line	180
				First adhesive layer	181	Second adhesive layer	182

Detailed Description

The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that if directional indications (such as up, down, left, right, front, and back … …) are referred to in the embodiment of the present application, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture, and if the specific posture is changed, the directional indications are changed accordingly.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, if the meaning of "and/or" and/or "appears throughout, the meaning includes three parallel schemes, for example," A and/or B "includes scheme A, or scheme B, or a scheme satisfying both schemes A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.

The first embodiment is as follows:

referring to fig. 1, an embodiment of the present disclosure provides a display panel 100, which includes an array substrate 110, a color filter substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color filter substrate 210. Referring to fig. 2, the array substrate 110 is provided with a plurality of data lines 120, a plurality of scan lines 130, and a plurality of pixel units 140. In this embodiment, the data lines 120 and the scan lines 130 are arranged in an array to define the area where the pixel units 140 are located.

The array substrate 110 has a display region 111 and a non-display region 112 adjacent to the display region 111.

The plurality of data lines 120, the plurality of scan lines 130, and the plurality of pixel units 140 are disposed in the display region 111. The plurality of pixel units 140 have a common electrode 141. In the present embodiment, the common electrode 141 is a CF _ com line in a liquid crystal panel, i.e., a common electrode trace disposed on a CF (Color Filter) substrate side.

In the embodiment, the display panel 100 is a Gate driver on array (GOA) type liquid crystal panel. Specifically, the display panel 100 further includes a GOA circuit. The plurality of scanning lines 130 are driven by the GOA circuit. Specifically, the GOA circuit is disposed at a lateral side of the display region 111 of the array substrate 110. As required, two GOA circuits may be provided, and are respectively disposed on two sides of the display region 111 of the array substrate 110 in the transverse direction. When the GOA circuits are disposed on two sides of the display area 111 of the array substrate 110 in the transverse direction, the two GOA circuits simultaneously drive the thin film transistors connected to the plurality of scan lines 130 in the display area 111. At this time, the display panel 100 is a liquid crystal panel driven by a double-ended array substrate row driving circuit.

Referring to fig. 3, the non-display area 112 has a plurality of flip chips 150, a first test pad 161, a second test pad 162 and a third test pad 163. The plurality of flip-chip films 150 are electrically connected to the plurality of data lines 140 of the display region 111. The third test pad 163 is electrically connected to the common electrode 141. Specifically, during the test of the display panel 100, the first test pad 161 is electrically connected to the data line 120 of the even column through the first test lead 171. The second test pad 162 is electrically connected to the data lines 120 of the odd columns through a second test lead 172. During the use of the display panel 100, the electrical connection between the first test lead 171 and the data lines 120 of the even columns is cut off. The electrical connection between the second test lead 172 and the data lines 120 of the odd columns is cut off. In this embodiment, the first test lead 171 includes a first portion 1711 and a plurality of second portions 1712. The first portion 1711 is disposed in an area of the non-display area 112 away from the display area 111. The second portion 1712 is disposed in an area of the non-display area 112 near the display area 111. The second portions 1712 surround a plurality of first test pad groups composed of adjacent first and

second test pads

161 and 162, respectively, and a plurality of second test pad groups composed of adjacent first, second, and

third test pads

161, 162, and 163, respectively. In this embodiment, the second portion 1712 is curved or folded and is disposed around the first test pad group or around the second test pad group. In the present embodiment, in the area between two adjacent flip chips 150, the first test pad set is composed of the first test pad 161 and the second test pad 162. In the outer region of the plurality of flip chips 150, a second test pad group consisting of the first test pad 161, the second test pad 162 and the third test pad 163. The first test pad group and the second test pad group are arranged in a row.

The first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chips 150 and are arranged at intervals along an extending direction of the first edge of the array substrate 110. The third test pads 163 are disposed at the outer regions of the plurality of flip-chips 150. That is, the third test pads 163 are disposed in the spaced regions between the plurality of flip chips 150 and the second side of the array substrate 110. In this embodiment, the first side of the array substrate 110 is the side on which the data line 120 is disposed; the second side of the array substrate 110 is a side on which the scan line 130 is disposed. The non-display area 112 further has a waterproof adhesive layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. In this embodiment, the waterproof glue layer 180 is made of taffy glue. In one embodiment, the waterproof adhesive layer 180 is a strip. The waterproof adhesive layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time. Specifically, the waterproof adhesive layer 180 includes a first adhesive layer 181 located between two adjacent flip chips 150 and a second adhesive layer 182 located outside the plurality of flip chips 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163. The coating width of the second glue layer 182 is greater than that of the first glue layer 181. Alternatively, the coating thickness of the second glue layer 182 is greater than the coating thickness of the first glue layer 181. It is understood that the second adhesive layer 182 may also cover only the surface of the third test pad 163. And the surfaces of the first test pad 161 and the second test pad 162 are covered with the first glue layer 181.

In one embodiment, the first test pads 161 and the second test pads 162 are further disposed at an outer region of the chip on film 150, i.e., a spacing region between the chip on film 150 and the second edge of the array substrate 110. The first test pad 161 and the second test pad 162 disposed between the plurality of flip chips 150 and the second side of the array substrate 110 are located between the flip chips 150 and the third test pad 163.

In the display panel 100 provided in the present embodiment, the first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chips 150. The third test pads 163 are disposed in the spacing region between the plurality of flip chips 150 and the second side of the array substrate 110. The non-display area 112 further has a waterproof adhesive layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. Since the third test pads 163 connected to the common electrode 141 are disposed at the outer sides of the plurality of flip-chips 150, when the waterproof adhesive layer 180 is coated, the waterproof adhesive layer 180 only needs to be coated on the third test pads 163 at the outer regions of the plurality of flip-chips 150. Since the area of the waterproof adhesive layer 180 to be coated is small and is located at the edge area of the array substrate 110, the coating difficulty of the waterproof adhesive layer 180 is small. Therefore, the third test pad 163 is disposed in a manner that the coating quality of the waterproof adhesive layer 180 can be effectively ensured. In addition, the electrical connection lines between the first and

second test pads

161 and 162 and the data lines 120 are cut off during the use of the subsequent display panel 100. Even if the surfaces of the first test pad 161 and the second test pad 162 are not coated with the waterproof adhesive layer 180 or the coating quality of the waterproof adhesive layer 180 is poor, when the first test pad 161 or the second test pad 162 is corroded by moisture, the moisture does not diffuse into the display panel 100 along the electrical connection lines between the first test pad 161 or the second test pad 162 and the data lines 120, thereby affecting the performance of the display panel 100.

In addition, when the waterproof glue layer 180 covers the first test pad 161, the second test pad 162, and the third test pad 163 at the same time, the waterproof glue layer 180 may be divided into the first glue layer 181 and the second glue layer 182. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163. The coating width of the second glue layer 182 is greater than that of the first glue layer 181. Alternatively, the coating thickness of the second glue layer 182 is greater than the coating thickness of the first glue layer 181. At this time, since the coating width or the coating thickness of the second adhesive layer 182 is greater than that of the first adhesive layer, the problem that the common electrode 141 is corroded by water vapor due to the poor coating quality of the waterproof adhesive layer 180 can be avoided.

Example two:

referring to fig. 4, another embodiment of the present disclosure provides a display panel 100, which includes an array substrate 110, a color filter substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color filter substrate 210. Referring to fig. 5, the array substrate 110 is provided with a plurality of data lines 120, a plurality of scan lines 130, and a plurality of pixel units 140. In this embodiment, the data lines 120 and the scan lines 130 are arranged in an array to define the area where the pixel units 140 are located.

The plurality of data lines 120, the plurality of scan lines 130, and the plurality of pixel units 140 are disposed in the display region 111. The plurality of pixel units 140 have a common electrode 141.

The non-display area 112 has a plurality of flip chips 150, a first test pad 161, a second test pad 162 and a third test pad 163. The plurality of flip-chip films 150 are electrically connected to the plurality of data lines 140 of the display region 111. The third test pad 163 is electrically connected to the common electrode 141. Specifically, during the test of the display panel 100, the first test pad 161 is electrically connected to the data line 120 of the even column through the first test lead 171. The second test pad 162 is electrically connected to the data lines 120 of the odd columns through a second test lead 172. During the use of the display panel 100, the electrical connection between the first test lead 171 and the data lines 120 of the even columns is cut off. The electrical connection between the second test lead 172 and the data lines 120 of the odd columns is cut off.

The first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chips 150 and are arranged at intervals along an extending direction of the first edge of the array substrate 110. The third test pads 163 are disposed at the outer regions of the plurality of flip chips 150, i.e., the spaced regions between the flip chips 150 and the second edge of the array substrate 110. The non-display area 112 further has a waterproof adhesive layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. In this embodiment, the waterproof glue layer 180 is made of taffy glue. In one embodiment, the waterproof adhesive layer 180 is a strip. The waterproof adhesive layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time. Specifically, the waterproof adhesive layer 180 includes a first adhesive layer 181 located between two adjacent flip chips 150 and a second adhesive layer 182 located outside the plurality of flip chips 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163. The coating width of the second glue layer 182 is greater than that of the first glue layer 181. Alternatively, the coating thickness of the second glue layer 182 is greater than the coating thickness of the first glue layer 181.

Unlike the first embodiment, in the present embodiment, the first test lead 171 includes a first portion 1711 and a plurality of second portions 1712. The first portion 1711 is disposed at an edge region of the non-display region 112 near the array substrate 110. The second portion 1712 is disposed in an area of the non-display area 112 near the display area 111. The second portions 1712 surround a plurality of first test pad groups composed of adjacent first and

second test pads

third test pads

161, 162, and 163, respectively.

In the display panel 100 of the present embodiment, the first test lead 171 is divided into a first portion 1711 and a plurality of second portions 1712, and the plurality of second portions 1712 respectively surround a plurality of first test pad groups composed of adjacent first test pads 161 and second test pads 162, and surround a plurality of second test pad groups composed of adjacent first test pads 161, second test pads 162, and third test pads 163. At this time, the regions where the first test pad 161, the second test pad 162 and the third test pad 163 are located may be isolated from the display region 111 by the first test lead 171, thereby enhancing the reliability of the display panel 100 during use. In this embodiment, the second testing lead 172 is also divided into a first portion and a second portion, and the specific structure thereof is similar to the first testing lead 171, which is not described herein again.

Example three:

referring to fig. 6, another embodiment of the present application further provides a method for manufacturing a display panel 100. The manufacturing method of the display panel 100 includes the following steps:

s101: a display panel 100 is provided. Referring to fig. 7, the display panel 100 includes an array substrate 110, a color filter substrate 210, and a liquid crystal layer disposed between the array substrate 110 and the color filter substrate 210. The display panel 100 is manufactured by a conventional cell process of a liquid crystal panel. The method specifically comprises the following steps: the array substrate 110 and the color filter substrate 210 of the display panel 100 are combined, and then cut or split into single display units, liquid crystal is poured between the array substrate 110 and the color filter substrate 210, and finally, a lighting test is performed on the manufactured display panel 100. Wherein, the array substrate 110 of each display unit is provided with a test pad for testing. In the present embodiment, the structure of the array substrate 110 is similar to that of the array substrate 110 shown in fig. 2. The array substrate 110 has a display region 111 and a non-display region 112 adjacent to the display region 111. The display region 111 has a plurality of data lines 120 and a common electrode 141. The non-display area 112 has a first test pad 161, a second test pad 162, and a third test pad 163. The third test pads 163 are disposed at both sides of the non-display area 112. The first test pad 161 and the second test pad 162 are disposed between the two third test pads 163. The first test pad 161 is electrically connected to the data line 120 of the even column through a first test lead 171. The second test pad 162 is electrically connected to the data lines 120 of the odd columns through a second test lead 172. The third test pad 163 is electrically connected to the common electrode 141.

S102: a lighting test is performed on the display panel 100 provided in step S101. Specifically, the lighting test process includes the following steps: even columns of data driving signals are filled in the first test pad 161. Odd columns of data driving signals are applied to the second test pad 162. The data driving signals of the even columns are transmitted to the data lines 120 of the even columns through the first test wire 171. The data driving signal of the odd column is transmitted to the data line 120 of the odd column through the second test lead 172. A common voltage signal is applied to the third test pad 163. The common voltage signal is transmitted to the common electrode 141 through the third test pad 163. Specifically, after the lighting test process in step S102, if the liquid crystal panel has an obvious line defect, the liquid crystal panel is directly scrapped, and subsequent components such as a polarizer, a printed circuit board, a flip chip film and the like are saved. During the lighting test, since the data lines 120 of the even columns are all connected together by the first test lead 171 and the data lines 120 of the odd columns are all connected together by the second test lead 172, the first test lead 171 and the second test lead 172 may also be referred to as a shorting bar.

S103: the electrical connection between the first test lead 171 and the data lines 120 of the even columns is cut off, and the electrical connection between the second test lead 172 and the data lines 120 of the odd columns is cut off, as shown in fig. 8. In the present embodiment, the electrical connection lines between the first test lead 171 and the data lines 120 of the even-numbered columns and the electrical connection lines between the second test lead 172 and the data lines 120 of the odd-numbered columns are cut by laser cutting. The purpose of cutting the electrical connection line between the first test lead 171 or the second test lead 172 and the plurality of data lines 120 is to: the first test lead 171 or the second test lead 172 is only used for a test process, and if the first test lead 171 or the second test lead 172 is still connected to the plurality of data lines 120 during the actual use of the display panel 100, the first test lead 171 or the second test lead 172 may cause a short circuit between the plurality of data lines 120, so that the display panel 100 may not work normally.

S104: a plurality of flip chips 150 are attached to the display panel 100, and the flip chips 150 are electrically connected to the data lines 120, as shown in fig. 9. Meanwhile, the first test pad 161 and the second test pad 162 are disposed in an area between two adjacent flip chips 150. The third test pads 163 are disposed at the outer regions of the plurality of flip-chips 150. Specifically, the chip on film 150 generally includes a flexible circuit board 151 and a driving chip 152 disposed on the flexible circuit board 151. When the chip on film 150 is attached to the display panel 100, the driving chip 152 is electrically connected to the data lines 120. That is, after the chip on film 150 is attached, the driving chip 152 in the chip on film 150 can provide a data driving signal for the data line 120 in the display panel 100. As required, in addition to providing the data driving signals for the data lines 120 on the array substrate 110, the chip on film 150 may also provide the scanning driving signals for the scan lines 130 on the array substrate 110. In this embodiment, the flip-chip film 150 is disposed on one side of the display area 111 in the longitudinal direction and is used for providing data driving signals to the data lines 120. Specifically, the chip on film 150 has a plurality of pins corresponding to the number of the data lines 120, so as to form electrical connections with the data lines 120 respectively during the attaching process. The number of the flip-chip films 150 can be set according to actual requirements, and is not limited herein.

S105: a waterproof adhesive layer 180 is coated on the non-display area 112 of the array substrate 110. The waterproof glue layer 180 covers the surface of the third test pad 163. Specifically, the waterproof glue layer 180 may be taffeta glue. The waterproof adhesive layer 180 may cover only the surface of the third test pad 163, or may cover the surfaces of the first test pad 161, the second test pad 162, and the third test pad 163 at the same time. Specifically, the waterproof adhesive layer 180 is in a long strip shape. The waterproof adhesive layer 180 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163 at the same time.

In this embodiment, the waterproof adhesive layer 180 includes a first adhesive layer 181 located between two adjacent flip chips 150 and a second adhesive layer 182 located outside the plurality of flip chips 150. The first adhesive layer 181 covers the surfaces of the first test pad 161 and the second test pad 162. The second adhesive layer 182 covers the surfaces of the first test pad 161, the second test pad 162 and the third test pad 163. The coating width of the second glue layer 182 is greater than that of the first glue layer 181. Alternatively, the coating thickness of the second glue layer 182 is greater than the coating thickness of the first glue layer 181.

If necessary, the lighting test may be performed again on the display panel 100 to which the plurality of flip chips 150 are attached before the waterproof adhesive layer 180 is applied. In one embodiment, the process of performing the lighting test again includes the following steps:

before the waterproof adhesive layer 180 is coated, a lighting test is performed again on the display panel 100 having the flip-chip film 150. The lighting test process comprises the following steps: transmitting a data driving signal to the plurality of data lines 120 through the chip on film 150; a common voltage signal is applied to the third test pad 163, so that the common voltage signal is transmitted to the common electrode 141 through the third test pad 163. The process of performing the lighting test again may check the quality of the display panel 100 to which the flip-chip film 150 is attached.

Similarly, in the manufacturing method of the display panel 100 provided in the present embodiment, the first test pad 161 and the second test pad 162 are disposed in a region between two adjacent flip chips 150. The third test pads 163 are disposed at the outer regions of the plurality of flip-chips 150. The non-display area 112 further has a waterproof adhesive layer 180. The waterproof glue layer 180 covers the surface of the third test pad 163. Since the third test pads 163 connected to the common electrode 141 are disposed at the outer regions of the plurality of flip-chips 150, when the waterproof adhesive layer 180 is coated, the waterproof adhesive layer 180 only needs to be coated on the third test pads 163 at the outer regions of the plurality of flip-chips 150. Since the area of the waterproof adhesive layer 180 to be coated is small and is located at the edge area of the array substrate 110, the coating difficulty of the waterproof adhesive layer 180 is small. Therefore, the third test pad 163 is disposed at a position that can effectively ensure the coating quality of the waterproof adhesive layer 180. In addition, since the electrical connection lines between the first test pad 161 and the second test pad 162 and the plurality of data lines 120 are cut off during the use of the subsequent display panel 100, even if the surfaces of the first test pad 161 and the second test pad 162 are not coated with the waterproof glue layer 180 or the coating quality of the waterproof glue layer 180 is poor, when the first test pad 161 or the second test pad 162 is corroded by moisture, the moisture is not diffused into the display panel 100 along the electrical connection lines between the first test pad 161 or the second test pad 162 and the plurality of data lines 120, thereby affecting the performance of the display panel.

The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents of the technical solutions that can be directly or indirectly applied to other related fields without departing from the spirit of the present application are intended to be included in the scope of the present application.

Claims

1. A display panel comprises an array substrate, a color film substrate and a liquid crystal layer arranged between the array substrate and the color film substrate, wherein the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with a plurality of chip on films, the plurality of chip on films are in one-to-one correspondence with the plurality of data wires of the display area to form electric connection, and the non-display area is characterized in that:

the non-display area still has first test pad, second test pad and third test pad, the third test pad with common electrode electricity is connected, first test pad with the second test pad sets up the region between two adjacent flip chip films, and follows the extending direction interval arrangement on array substrate's first limit, the third test pad sets up a plurality of flip chip films with interval region between array substrate's the second limit, the non-display area still has the waterproof glue layer, the waterproof glue layer covers the surface of third test pad.

2. The display panel of claim 1, wherein the first test pad and the second test pad are further disposed at a spaced area between the flip-chip film and the second edge of the array substrate, the first test pad and the second test pad disposed between the flip-chip film and the second edge of the array substrate being located between the flip-chip film and the third test pad.

3. The display panel of claim 1,

in the testing process of the display panel, the first testing pad is electrically connected with the even-numbered row data lines through a first testing lead, and the second testing pad is electrically connected with the odd-numbered row data lines through a second testing lead;

4. The display panel of claim 1, wherein a first group of the first test pads and the second test pads is arranged in a region between two adjacent flip chips, and a second group of the first test pads, the second test pads and the third test pads is arranged in a region between the flip chips and the second edge of the array substrate, the first group of the first test pads and the second group of the second test pads being arranged in a row.

5. The display panel of claim 1, wherein the waterproof adhesive layer is in a strip shape, and the waterproof adhesive layer covers surfaces of the first test pad, the second test pad, and the third test pad at the same time.

6. The display panel of claim 5, wherein the waterproof glue layer comprises a first glue layer located between two adjacent flip chips and a second glue layer located in a spacing area between the flip chips and the second edge of the array substrate, the first glue layer covers the surfaces of the first test pad and the second test pad, the second glue layer covers the surfaces of the first test pad, the second test pad and the third test pad, and the coating width of the second glue layer is greater than the coating width of the first glue layer, or the coating thickness of the second glue layer is greater than the coating thickness of the first glue layer.

7. A method for manufacturing a display panel, for manufacturing the display panel according to any one of claims 1 to 6, comprising the steps of:

s101: providing a display panel, which comprises an array substrate, wherein the array substrate is provided with a display area and a non-display area adjacent to the display area; the display area is provided with a plurality of data lines and a common electrode; the non-display area is provided with first test pads, second test pads and third test pads, the first test pads and the second test pads are arranged at intervals along the extending direction of the first edge of the array substrate, the first test pads are electrically connected with even-numbered rows of data lines through first test leads, the second test pads are electrically connected with odd-numbered rows of data lines through second test leads, and the third test pads are electrically connected with the common electrode;

s102: performing lighting test on the display panel;

s104: attaching a plurality of chip on films to the display panel, enabling the chip on films and the data lines to be in one-to-one correspondence to form electric connection, enabling the first test pad and the second test pad to be arranged in an area between two adjacent chip on films, and enabling the third test pad to be arranged in an interval area between the chip on films and the second edge of the array substrate;

8. The method for manufacturing a display panel according to claim 7, wherein in step S105, the waterproof adhesive layer is in a strip shape, and the waterproof adhesive layer covers the surfaces of the first test pad, the second test pad, and the third test pad at the same time.

9. The method for manufacturing the display panel according to claim 8, wherein in step S105, the waterproof glue layer includes a first glue layer located between two adjacent flip chips and a second glue layer located outside the plurality of flip chips, the first glue layer covers surfaces of the first test pad and the second test pad, the second glue layer covers surfaces of the first test pad, the second test pad and the third test pad, and a coating width of the second glue layer is greater than a coating width of the first glue layer, or a coating thickness of the second glue layer is greater than a coating thickness of the first glue layer.

10. The method for manufacturing a display panel according to claim 7,

the process of the lighting test comprises the following steps: filling even-numbered rows of data driving signals into the first test pad, filling odd-numbered rows of data driving signals into the second test pad, wherein the even-numbered rows of data driving signals are transmitted to even-numbered rows of data lines through the first test lead, and the odd-numbered rows of data driving signals are transmitted to odd-numbered rows of data lines through the second test lead; perfusing a common voltage signal at the third test pad, the common voltage signal being transmitted to the common electrode through the third test pad;