CN114756814B - A variable resistor array construction method and analog matrix calculation circuit based on the same - Google Patents

Abstract

The present invention provides a variable resistor array formation method and an analog matrix calculation circuit based on the method, and belongs to the fields of semiconductors, analog calculations and integrated circuits. Each row vector of the matrix of the present invention is mapped to the difference in conductance between two rows of devices in a variable resistor array, and the corresponding two rows of devices are connected to the positive and negative input terminals of an operational amplifier (OA). The positive and negative input terminals of each OA in the circuit are respectively connected to a compensation resistor, so that the sum of the conductance values of the resistor devices connected to the two input terminals is equal. The present invention realizes efficient analog calculation of matrix inversion, eigenvector, and matrix pseudo-inverse, reduces the delay and hardware overhead of matrix operations containing negative elements, and can effectively overcome the influence of array line resistance and device differences, and has broad application prospects in signal processing, wireless communication, machine learning and other fields.

Description

A method for constructing a variable resistor array and a simulation matrix calculation circuit based on the method

Technical Field

The present invention provides an analog matrix computing circuit based on a variable resistor array, which is used to calculate matrix inversion, eigenvectors and pseudo-inverse (including left inverse and right inverse) problems. It specifically relates to the design of analog computing circuits based on variable resistor devices (such as resistive memory, phase change memory, magnetic memory, ferroelectric memory, etc.), including its working principle and parameter design method, and belongs to the fields of semiconductors, analog computing and integrated circuits.

Background technique

Matrix operations exist in almost all fields of science and engineering, such as scientific computing, machine learning, and wireless communications. In traditional digital computing, matrix operations generally have relatively high computational complexity, especially the more complex matrix equation solutions, such as matrix inversion, eigenvector, and pseudo-inverse calculations, whose time complexity is generally O(n ³ ) (n is the matrix size). In the era of big data, the scale of matrix operations in computing tasks has increased dramatically, and a strong demand for computing power has been placed on computing systems. Analog computing technology based on variable resistor arrays is expected to provide efficient solutions for some basic matrix operations. On the one hand, due to the spatial parallel architecture of variable resistor arrays, analog computing using the physical laws in array circuits has a high degree of computational parallelism; on the other hand, thanks to the non-volatility of variable resistor memory devices, analog computing based on variable resistor arrays realizes in-situ computing inside the memory, that is, in-memory computing, which overcomes the limitations of the separation of storage and computing in traditional computing architectures and further improves the computing power and energy efficiency of matrix operations.

Summary of the invention

In order to achieve efficient inversion, eigenvector, and pseudo-inverse (left inverse and right inverse) operations for matrices containing negative elements, the present invention provides a new analog matrix calculation circuit based on a variable resistor array, which can perform efficient matrix inversion, eigenvector and pseudo-inverse operations, and is particularly suitable for operations on matrices containing negative elements.

The specific technical solutions of the present invention are as follows:

A method for constructing a variable resistor array for analog matrix calculation, characterized in that each row vector or column vector of the matrix is mapped to the difference in conductance of two rows or two columns of variable resistor devices in the variable resistor array, the corresponding two rows or two columns of variable resistor devices are connected to the positive and negative input terminals of an operational amplifier OA, and a compensation resistor is respectively connected to the positive and negative input terminals of each OA, so that the sum of the conductance values of the variable resistor devices connected to the two input terminals is equal.

The variable resistor device of the present invention is a resistive memory, a phase change memory, a magnetic memory, a ferroelectric memory, etc.

The analog calculation matrix inversion circuit uses a group of OAs to construct global feedback and read out the inversion calculation results. Each row vector of the matrix is mapped to the difference between the conductance values of two rows of devices in the array, and the two row lines are respectively connected to the positive and negative input terminals of an OA, and the output terminal of each OA is fed back to the column line of the variable resistor array one by one. When the circuit is working, a group of voltages are applied to the row lines of the variable resistor array to represent the input vector, and the output voltage of the OA represents the calculation result of the matrix inversion, that is, the result of multiplying the inverse matrix with the input vector. The conductance values of the variable resistor devices connected to the positive and negative input terminals of all OAs constitute two non-negative matrices. In addition to the variable resistor devices that map the matrix elements, there is also a column of variable resistor devices as compensation resistors, which make the conductance values of the resistor devices connected to the positive and negative input terminals of each OA equal. One end of the compensation resistor is connected to the positive or negative input terminal of the OA, and the other end is grounded. Their conductance values are calculated based on the row sum of the two non-negative matrices and the input conductance.

The analog calculation eigenvector circuit is implemented based on a variable resistor device array. A group of OAs are used to construct global feedback and read out the eigenvector calculation results. Each row vector of the matrix is mapped to the difference in the conductance values of two rows of devices in the array. The two row lines are respectively connected to the positive and negative input terminals of an OA. At the same time, the output terminal of each OA is fed back to the column line of the variable resistor array, and the negative input terminal is connected to a feedback resistor mapping the eigenvalue (or its absolute value) to the output terminal. In addition to the variable resistor devices that map the matrix elements and map the eigenvalues, there is also a column of variable resistor devices as compensation resistors, which make the conductance values of the resistor devices (including feedback resistor devices) connected to the positive and negative input terminals of each OA equal. One end of the compensation resistor is connected to the positive or negative input terminal of the OA, and the other end is grounded. Their conductance values are calculated based on the row sum of two non-negative matrices and the eigenvalue feedback conductance.

In the analog calculation eigenvector circuit, the feedback conductance of the mapped eigenvalue λ is slightly smaller than its nominal value, that is, the conductance value can be determined according to |λ|(1-δ), where δ is a positive number much smaller than 1, to ensure that one output voltage reaches the maximum allowable value, and all output voltages constitute the calculation result of the eigenvector.

The analog calculation matrix left inverse circuit is implemented based on a variable resistor device array, and two groups of OAs are used to form a feedback loop to complete the calculation. Each row vector of the matrix is mapped to the difference in the conductance values of two rows (or two columns) of devices in the two arrays. The two row lines of the first array are respectively connected to the positive and negative input terminals of an OA, and the negative input terminal is connected to a feedback resistor to the output terminal, and the output terminal is connected to the corresponding row line of the second array; the two column lines of the second array are respectively connected to the positive and negative input terminals of an OA, and the output terminal is feedback connected to the corresponding column line of the first array. The input vector of the left inverse operation is mapped to a set of voltages applied to the row lines in the first array. In addition to the variable resistor devices that map the matrix elements, there is also a column (or a row) of variable resistor devices as compensation resistors, which make the conductance values of the variable resistor devices connected to the positive and negative input terminals of each OA equal. One end of the compensation resistor is connected to the positive or negative input terminal of the OA, and the other end is grounded. Their conductance values are calculated based on the row sum (or column sum), input conductance and feedback conductance of the two non-negative matrices.

The analog calculation matrix right inverse circuit is implemented based on a variable resistor device array, and two groups of OAs are used to form a feedback loop to complete the calculation. The right inverse circuit needs to map the transposed matrix to the array. Each row vector of the transposed matrix is mapped to the difference in the conductance values of two rows (or two columns) of devices in the two arrays. The two row lines of the first array are respectively connected to the positive and negative input terminals of an OA, and the negative input terminal is connected to a feedback resistor to the output terminal, and the output terminal is connected to the corresponding row line of the second array; the two column lines of the second array are respectively connected to the positive and negative input terminals of an OA, and the output terminal is feedback connected to the corresponding column line of the first array. The input vector of the right inverse operation is mapped to a set of voltages applied to the column lines in the second array. In addition to the variable resistor devices that map the transposed matrix elements, there is also a column (or a row) of devices as compensation resistors, which make the conductance values of the resistor devices connected to the positive and negative input terminals of each OA equal. One end of the compensation resistor is connected to the positive or negative input terminal of the OA, and the other end is grounded. Their conductance values are calculated based on the row sum (or column sum), input conductance and feedback conductance of the two non-negative matrices.

The difference between the right inverse circuit body and the left inverse circuit is that: first, the right inverse circuit maps the transpose of the matrix to two variable resistor arrays; second, the voltage representing the input vector is applied to the input resistor on the column line of the second array; third, the output voltage of the first group of OAs represents the result vector of the right inverse calculation, that is, the result of multiplying the right inverse matrix by the input vector.

The matrix inversion, eigenvector and pseudo-inverse calculation circuits of the present invention are particularly suitable for the operation of matrices containing negative elements, and they can also be used for the operation of non-negative matrices. Since the line resistance effects on the row lines or column lines connected to the positive and negative input terminals of the OA cancel each other out, the series of circuits can effectively overcome the influence of the array line resistance on the calculation results.

The beneficial effects of the present invention are as follows:

The present invention provides analog computing circuits for basic matrix operations based on variable resistor arrays, which can perform efficient matrix inversion, eigenvector and pseudo-inverse operations, and are particularly suitable for operations on matrices containing negative elements. Compared with other analog computing circuits for related operations on matrices containing negative elements, this circuit has higher circuit area efficiency, lower computing delay and lower energy consumption. In addition, since the parallel input line resistance effects cancel each other out, the matrix multiplication circuit can effectively alleviate the influence of line resistance and device non-ideal factors on the calculation results.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a structural diagram of the kth row of the analog calculation matrix inversion circuit of the present invention.

FIG. 2 is a structural diagram of a simulation calculation matrix inversion circuit of the present invention.

FIG3 is an example of a negative element matrix decomposition method and a compensated conductance calculation method according to the present invention.

FIG. 4 is a circuit diagram of a simulation calculation matrix eigenvector according to the present invention.

FIG5 is a circuit diagram of the present invention for simulating the calculation of matrix pseudo-inverse (left inverse).

FIG6 is a circuit diagram of the present invention for simulating the calculation of matrix pseudo-inverse (right inverse).

Detailed ways

In order to more clearly illustrate the purpose, technical solutions and advantages of the present invention, the following is a further detailed description in conjunction with the accompanying drawings. The description herein is only used to explain the present invention and is not intended to limit the present invention.

The present invention provides analog calculation matrix inversion, eigenvector, pseudo-inversion (left inversion and right inversion) circuits based on variable resistor arrays. This series of circuits is particularly suitable for related operations of matrices containing negative elements. They are implemented based on the principle of feedback loop and conductance compensation of OA positive and negative input terminals.

FIG1 is a circuit structure diagram of the kth row of the analog calculation matrix inversion circuit based on the variable resistor array. The kth row vector _Ak of the matrix is mapped to the difference in conductance between two rows of variable resistor devices. The relationship between the row vector _Ak and the vectors _Bk and _Ck represented by the conductance of the two rows of devices is _Ak = _Bk - _Ck . The two rows of devices are respectively connected to the negative and positive input terminals of an OA. The output terminal of the OA is fed back to the kth column and serves as the kth element of the output vector. In order to ensure the correct sign of the calculation result, the input vector is reversed in advance in the present invention, that is, the input -y is represented by the voltage ( _-yk ) applied to the negative input terminal of each row of OA. The input vector is converted into a current value through the input resistor to participate in the calculation. The output voltages of n OAs constitute the column vector x. In the present invention, the input conductance is agreed to be the unit conductance, that is, _g0 = 1, and the conductance values of other resistor devices are the ratio divided by the input conductance.

In Figure 1, according to Kirchhoff's current law, the potentials at the positive and negative input terminals of the OA are and Where Δs _bk and Δs _ck are the compensation conductances of the conductance row vectors B _k and C _k respectively. Due to the "virtual short" nature of OA, the potentials of the positive and negative input terminals are equal, that is,/> By choosing appropriate Δs _bk , Δs _ck so that they satisfy ∑ _j B _kj + Δs _bk + 1 = ∑ _j C _kj + Δs _ck , we can obtain -y _k + B _k x = C _k x, and obtain formula (1) in Figure 1, that is, the circuit must satisfy

y _k =(B _k -C _k )x =A _k x. (1)

In actual circuits, the sum of the compensated conductances is difficult to be exactly equal. Considering approximate equality, that is, ∑ _j B _kj + Δs _bk + 1 ≈ ∑ _j C _kj + Δs _ck , then formula (1) is approximately true.

For an n×n real number matrix A, it can be decomposed using two non-negative matrices B and C, that is, A=BC. After performing row-sum conductance compensation on the variable resistor devices mapped by B and C, the corresponding variable resistor array circuit can calculate any matrix inversion operation. In Figure 2, the potential of any OA positive and negative input terminals satisfies Combining n equations, we get the matrix form/> Wherein _UB and _UC are both diagonal matrices, namely _UB = _diag (∑ _j B _1j + Δsb ₁ +1, ∑ _j B _2j + Δs _b2 +1, …, ∑ _j B _nj + Δs _bn +1) and _UC = _diag (∑ _j C _1j + Δs _c1 , ∑ _j C _2j + Δs _c2 , …, ∑ _j C _nj + Δs _cn ), respectively. By selecting appropriate compensation conductances Δs _bk and Δs _ck to make _UB = _UC , we have -y + Bx = Cx, that is, y = (BC) x = Ax. In order to satisfy this formula, the output vector x must satisfy formula (2) in Figure 2, that is,

x＝(BC) ^-1 y＝A ^-1 y. (2)

Where A ^-1 is the inverse matrix of matrix A. Therefore, the circuit in Figure 2 can realize the matrix inversion calculation function. If the sum of the compensated conductances is approximately equal, that is, ∑ _j B _kj +Δs _bk +1≈∑ _j C _kj +Δs _ck , then formula (2) is approximately established.

Figure 3 shows an example of decomposing a real matrix A into two non-negative matrices B and C, assuming that A contains negative elements. The decomposition method keeps the non-negative elements of A in B one by one, and the elements in other positions of B are 0; the negative elements of A are inverted and kept in C one by one, and the elements in other positions of C are 0. The mathematical expression of this method is Where |A| means taking the absolute value of the elements of matrix A. After obtaining the non-negative matrices B and C, calculate the row sums s _B and s _C of the two, as well as the difference between them. Since the negative input of OA is also connected to the input resistor, its conductance value is unity, and the difference between the sums of conductances is Δs = s _C -1-s _B . Finally, the compensation conductance is calculated based on the result of Δs. One way to obtain its value is/>

FIG4 is a structural diagram of a matrix eigenvector circuit for analog calculation based on a variable resistor array. The size of the matrix A is n×n, and each of its row vectors is mapped to the difference in conductance between two rows of variable resistor devices. The two rows of devices are connected to the positive and negative input terminals of an OA respectively, and the output terminals of the OA are fed back to the column lines of the variable resistor array one by one, that is, the OA on the kth row of the matrix A is connected to the kth column. The conductance values of the variable resistor devices connected to the positive and negative input terminals of all OAs constitute non-negative matrices B and C respectively, satisfying A=BC. In addition, a feedback resistor (whose conductance is g _λ ) that maps the eigenvalue is connected from the negative input terminal to the output terminal of each OA, and a compensation resistor is connected to the positive and negative input terminals of each OA. According to Kirchhoff's current law and the "virtual short" property of the OA, the potential of the positive and negative input terminals of any OA satisfies Where x is the column vector composed of the output voltages of n OAs, Δs _bk and Δs _ck are the compensation conductances of the conductance row vectors B _k and C _k , respectively, and k = 1, 2, ..., n. Combining n equations, we get the matrix form/> Wherein _UB and _UC are both diagonal matrices, namely _UB = diag(∑ _j B _1j + Δs _b1 , ∑ _j B _2j + Δs _b2 , …, ∑ _j B _nj + Δs _bn ) and _UC = diag(∑ _j C _1j + Δs _c1 + g _λ , ∑ _j C _2j + Δs _c2 + g _λ , …, ∑ _j C _nj + Δs _cn + g _λ ). By selecting appropriate compensation conductances Δs _bk and Δs _ck to make _UB = _UC , we have Bx = λx + Cx, and we get formula (3) in Figure 4, that is,

λx＝(B-C)x＝Ax. (3)

In order to satisfy formula (3), the output voltage vector must be the eigenvector of λ. Therefore, the circuit of Figure 4 can realize the matrix eigenvector calculation function. If the sum of the compensated conductances is approximately equal, that is, ∑ _j B _kj +Δs _bk ≈∑ _j C _kj +Δs _ck +g _λ , then formula (3) is approximately true.

FIG5 is a circuit diagram of the pseudo-inverse (left inverse) of the analog calculation matrix based on the variable resistor array. The size of the matrix A is n×m (n＞m). It is mapped in two variable resistor arrays, and two groups of OAs are used to form a feedback loop. In the first variable resistor array (the variable resistor array on the left in the figure), each row vector of the matrix A is mapped to the difference in conductance of two rows of variable resistor devices. The two rows of devices are connected to the positive and negative input terminals of an OA respectively. The negative input terminal of the OA is connected to a feedback resistor (conductance is g ₀ ) to the output terminal, and the positive and negative input terminals are each connected to a compensation resistor. The conductance values of the variable resistor devices connected to the positive and negative input terminals of all OAs constitute non-negative matrices B and C respectively, satisfying A＝BC. The input vector y is represented by the voltage applied to the negative input terminal of each row of OA, which is converted into a current value through the input resistor to participate in the operation. The output voltages of n OAs constitute a column vector r, which is applied to the row lines of the second variable resistor array as input.

In the second variable resistor array (the variable resistor array on the right in the figure), each column vector of the matrix A is mapped to the difference in conductance between two columns of variable resistor devices, which are connected to the positive and negative input terminals of an OA respectively, and are also connected to a compensation resistor. The conductance values of the variable resistor devices connected to the positive and negative input terminals of all OAs respectively form the same non-negative matrices C and B as in the first variable resistor array. The output voltages of the m OAs form a column vector x, which is applied to the column lines of the first variable resistor array as input.

In the first variable resistor array, according to Kirchhoff's current law and the "virtual short" property of OA, the potential at the positive and negative input terminals of any OA satisfies Where Δs _b1k and Δs _c1k are the compensation conductances of the conductance row vectors B _k and C _k , respectively, and k = 1, 2, ..., n. Combining n equations, we get the matrix form/> Wherein U _B1 and U _C1 are both diagonal matrices, namely U _B1 = diag(∑ _j B _1j + Δs _b11 , ∑ _j B _2j + Δs _b12 , …, ∑ _j B _nj + Δs _b1n ) and U _C1 = _diag (∑ _j C _1j + Δs _c11 +2, ∑ _j C _2j + Δs _c12 +2, …, ∑ _j C _nj + Δs _c1n +2). By selecting appropriate compensation conductances Δs _b1k and Δs _c1k to make U _B1 = U _C1 , we have Bx = r + y + Cx, and we get formula (4) in Figure 5, that is,

r＝(B-C)x-y＝Ax-y. (4)

In the second variable resistor array, the potential at the positive and negative input terminals of any OA satisfies Where Δs _b2l and Δs _c2l are the conductance column vectors respectively/> The compensation conductance, l = 1, 2, ..., m. Combining m equations, we get the matrix form/> Wherein U _B2 and U _C2 are both diagonal matrices, namely U _B2 =diag(∑ _j B _j1 +Δs _b21 ,∑ _j B _j2 +Δs _b22 , …,∑ _j B _jm +Δs _b2m ) and U _C2 =diag(∑ _j C _j1 +Δs _c21 ,∑ _j C _j2 +Δs _c22 , …,∑ _j C _jm +Δs _c2m ). By selecting appropriate Δs _b2l and Δs _c2l to make U _B2 =U _C2 , we can obtain B ^T r =C ^T r, which is formula (5) in Figure 5:

(B ^T -C ^T )r = A ^T r = 0. (5)

Combining formula (4) and (5), we can get A ^T ·Ax = A ^T y. In order to satisfy this formula, the output vector x must satisfy formula (6) in Figure 5, that is,

x＝( ^AT ·A) ^-1 · ^ATy . (6)

Where ( ^AT ·A) ^-1 · ^AT is the left inverse of the matrix A. Therefore, the circuit of Figure 5 can realize the matrix left inverse calculation function. If the sum of the compensated conductances is approximately equal, that is, ∑ _j B _kj +Δs _b1k ≈∑ _j C _kj +Δs _c1k +2, ∑ _j B _jl +Δs _b2l ≈∑ _j C _jl +Δs _c2l , then formula (6) is approximately established.

FIG6 is a circuit diagram of a right inverse matrix simulation calculation based on a variable resistor array. Its main body is the same as the left inverse matrix circuit of FIG5 , that is, two variable resistor arrays form a feedback loop through two groups of OAs. Different from the left inverse circuit, the two variable resistor arrays in this circuit reflect the transpose of the matrix A, that is, ^AT . The size of the original matrix A is m×n (n＞m). In addition, in the present invention, the input vector is reversed in advance, that is, the input -y is expressed as a voltage applied to the column line of the second variable resistor array, which is converted into a current value through the input resistor to participate in the operation. The output vector r of the second variable resistor array is applied to the column line of the first variable resistor array as input. The output voltage of the OA on the row line of the first variable resistor array constitutes a vector x.

In the first variable resistor array, the potential at the positive and negative input terminals of any OA satisfies Where Δs _b1l and Δs _c1l are the conductance row vectors respectively/> The compensation conductance, l = 1, 2, ..., m. Combining m equations, we get the matrix form/> Wherein U _B1 and U _C1 are both diagonal matrices, namely U _B1 =diag(∑ _j B _j1 +Δs _b11 ,∑ _j B _j2 +Δs _b12 ,…,∑ _j B _jm +Δs _b1m ) and U _C1 =diag(∑ _j C _j1 +Δs _c11 +1,∑ _j C _j2 +Δs _c12 +1,…,∑ _j C _jm +Δs _c1m +1). By selecting appropriate compensation conductances Δs _b1l and Δs _c1l to make U _B1 =U _C1 , we have B ^T r =y+C ^T r, and we get formula (7) in Figure 6, that is,

x＝( ^BT - ^CT )r＝ ^ATr (7)

In the second variable resistor array, the potential of any OA positive and negative input terminals satisfies Combining n equations, we get the matrix form/> Wherein U _B2 and U _C2 are both diagonal matrices, namely, U _B2 = diag(∑ _j B _1j + Δs _b21 +1, ∑ _j B _2j + Δs _b22 +1, …, ∑ _j B _nj + Δs _b2n +1) and U C2 = diag(∑ _j C _1j + Δs _c21 , ∑ _j C _2j + Δs _c22 , …, ∑ _j C _nj + Δs _c2n ). By selecting appropriate compensation conductances Δs _b2k and Δs _c2k to make U _B2 = U _C2 , formula (8) in Figure 6 can be _obtained , that is,

y＝(B-C)x＝Ax (8)

Combining formulas (7) and (8), we can obtain y = A· ^ATr . To satisfy this formula, r must satisfy r = (A· ^AT ) ^-1y , so the output vector x must satisfy formula (9) in Figure 6, that is,

x＝ ^AT ·(A· ^AT ) ^-1y . (9)

Wherein ^AT ·(A· ^AT ) ^-1 is the right inverse of the matrix A. Therefore, the circuit of FIG6 can realize the matrix right inverse calculation function. If the sum of the compensated conductances is approximately equal, that is, ∑ _j B _jl + Δs _b1l ≈ ∑ _j C _jl + Δs _c1l + 1, ∑ _j B _kj + Δs _b2k + 1 ≈ ∑ _j C _kj + Δs _c2k , then formula (9) is approximately established.

Finally, it should be noted that the purpose of publishing the embodiments is to help further understand the present invention, but those skilled in the art can understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the contents disclosed in the embodiments, and the scope of protection claimed by the present invention shall be subject to the scope defined in the claims.

Claims (6)

1. A method for forming a variable resistor array used for analog matrix calculation is characterized in that each row vector or column vector of the matrix is mapped into the difference of the conductivities of two rows or two columns of variable resistor devices in the variable resistor array, the corresponding two rows or two columns of variable resistor devices are connected to the positive input end and the negative input end of an operational amplifier OA, and the positive input end and the negative input end of each OA are respectively connected with a compensation resistor so that the sum of the conductivities of the variable resistor devices connected with the two input ends is equal.

2. The variable resistance array construction method according to claim 1, wherein the variable resistance device is a resistance change memory, a phase change memory, a magnetic memory, or a ferroelectric memory.

3. An analog calculation matrix inversion circuit is characterized in that each row vector of a matrix is expressed as the difference of two non-negative real row vectors, the two row vectors are respectively mapped to the conductance values of two rows of variable resistance devices in the variable resistance array according to claim 1, two row lines in the variable resistance array are respectively connected to the positive input end and the negative input end of an operational amplifier OA, the conductance values of the variable resistance devices connected with the positive input end and the negative input end of all the OAs form two non-negative matrices, and the output end of each OA is in feedback connection with the column line of the variable resistance array in a one-to-one correspondence manner; the compensation resistor is a column of variable resistor devices, one end of the compensation resistor is connected with the positive or negative input end of the OA, the other end of the compensation resistor is grounded, and the conductance value of the compensation resistor is obtained by pre-calculating the row sum of two non-negative matrixes; when the circuit works, a group of voltages are applied to the row lines of the variable resistor array to represent an input vector, and the output voltage of the OA represents the calculated result of matrix inversion, namely the result of multiplication of an inverse matrix and the input vector.

4. An analog calculation eigenvector circuit, wherein each row vector of the matrix is expressed as a difference between two non-negative real row vectors, the two row vectors are respectively mapped into conductance values of two rows of devices in the variable resistor array according to claim 1, the two row lines in the corresponding variable resistor array are respectively connected to positive and negative input ends of one OA, the conductance values of the variable resistor devices connected with the positive and negative input ends of all OAs form two non-negative matrices, and a feedback resistor for mapping eigenvalue lambda is connected from the output end to the negative input end of each OA; the compensation resistor is a column of grounded variable resistor device, and the conductance value of the compensation resistor is obtained by pre-calculating the row sum of two non-negative matrixes; in operation of the circuit, the output voltage of the OA represents the result of the feature vector calculation.

5. A left inverse circuit for analog computation matrix, wherein the matrix is mapped to two variable resistor arrays according to claim 1, two groups of OA are utilized to form a feedback loop, each row vector of the matrix is represented as a difference between two non-negative real row vectors, the two row vectors are mapped to conductance values of two rows of variable resistor devices in the variable resistor array, and the corresponding two row lines are respectively connected to positive and negative input ends of the first group of OA; in the second variable resistor array, each column vector of the matrix is expressed as a difference of two non-negative real column vectors, the two column vectors are mapped into conductance values of two columns of devices in the variable resistor array, the two column lines are respectively connected to positive and negative input ends of one of the second group of OAs, the output end to the negative input end of the first group of OAs are respectively connected with a feedback resistor, the output end of each OA is connected to a corresponding row line of the second variable resistor array, and the output end of the second group of OAs is connected to a corresponding column line of the first variable resistor array in a feedback manner; the compensation resistors are a column or a row of grounded variable resistor devices, and the conductance values of the first group of compensation resistors and the second group of compensation resistors are respectively obtained by pre-calculating row addition or column addition of two non-negative matrixes, and calculating input conductance and feedback conductance; in operation of the circuit, voltages representing input vectors are applied to the input resistors on the row lines of the first variable resistor array, and the output voltages of the second set of OA represent the resulting vectors of the left inverse calculations, i.e. the result of the multiplication of the left inverse matrix with the input vectors.

6. A right inverse circuit of an analog computation matrix, characterized in that a transpose of the matrix is mapped to two variable resistor arrays in the left inverse circuit of an analog computation matrix according to claim 5, the circuit being operative in that a voltage representing an input vector is applied to an input resistor on a column line of the second variable resistor array; the output voltages of the first set of OA represent the result vector of the right inverse calculation, i.e. the result of the multiplication of the right inverse matrix with the input vector.