CN104183635B - A kind of field-effect transistor - Google Patents
A kind of field-effect transistor Download PDFInfo
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- CN104183635B CN104183635B CN201310203111.8A CN201310203111A CN104183635B CN 104183635 B CN104183635 B CN 104183635B CN 201310203111 A CN201310203111 A CN 201310203111A CN 104183635 B CN104183635 B CN 104183635B
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- 230000005669 field effect Effects 0.000 title claims abstract description 27
- 229910052751 metal Inorganic materials 0.000 claims abstract description 33
- 239000002184 metal Substances 0.000 claims abstract description 33
- 230000004888 barrier function Effects 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000009413 insulation Methods 0.000 claims description 28
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical group O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 7
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 9
- 150000001875 compounds Chemical class 0.000 abstract description 7
- 230000015556 catabolic process Effects 0.000 description 18
- 229910002601 GaN Inorganic materials 0.000 description 16
- 229910002704 AlGaN Inorganic materials 0.000 description 7
- 230000005684 electric field Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 5
- 238000005036 potential barrier Methods 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- -1 Ni/Au Chemical class 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a kind of field-effect transistor, it is related to technical field of semiconductor device, is invented in order to make device be provided simultaneously with high-breakdown-voltage and saturation output current high.The field-effect transistor, including：Substrate, it is formed at the channel layer above the substrate, it is formed at the barrier layer above the channel layer, it is formed at source electrode, drain electrode, grid above the barrier layer, the source electrode and the drain electrode are respectively positioned at the both sides of the grid, and are formed at least one metal ohmic contact bar between the grid and the drain electrode.Present invention is mainly applied to the field-effect transistor using iii v compound semiconductor.
Description
Technical field
Imitate a kind of field the present invention relates to technical field of semiconductor device, more particularly to use iii v compound semiconductor
Answer transistor.
Background technology
Well known in the art, there is iii v compound semiconductor big energy gap, breakdown electric field high, saturation high to export
The advantages of electric current, high electron mobility speed, field-effect transistor (the Field Effect obtained as material using it
Transistor, FET) it is widely used in communication base station, Aero-Space, automotive circuit diagram and military radar, electronics pair
In the systems such as anti-, military satellite communication.Wherein, the high-breakdown-voltage of this III-V compound field-effect transistor, saturation high
Output current is that the above-mentioned each systematic function of influence improves and reduce the key factor of industrialization cost.
At present, high-breakdown-voltage and saturation output current high can be all subject in III-V compound field-effect transistor structure
Grid to drain electrode the distance between limitation, such as a kind of gallium nitride (GaN belongs to III-V compound) base high electron mobility
Rate transistor (High Electron Mobility Transistors, HEMT) device, its maximum saturation to be reached is defeated
Going out the maximum saturation leakage current of electric current and device has a direct relation, and source electrode and leakage in maximum saturation leakage current and device architecture
The distance between pole is relevant, and (wherein ordinate represents the drain saturation current of device, 2 μm, 4 μm, 6 μm ... 30 μm as shown in Figure 1
Represent the distance between source-drain electrode), drain saturation current reduces with the increase of the distance between source electrode and drain electrode, because electronics
Motion process in channels is the process that electronics constantly obtains energy and constantly accelerated from electric field, when electronics is in raceway groove
When energy obtained in motion reaches certain value, a part of electrons become thermoelectron and are dispersed into energy level higher, heat
Electronics has larger effective mass and relatively low mobility in high level, so that the device architecture maximum to be reached is full
With leakage current reduction.
For the HEMT device maximum breakdown voltage to be reached, its size can be by peak value electric field (peak value electric field
Produce side under the gate and near the edge of drain electrode) size directly determine that and grid is with the distance between drain can be with
The size of the peak value electric field is determined, grid leak distance more long can more weaken the peak value electric field, and breakdown voltage is bigger, not ugly
Go out, breakdown voltage high needs longer grid leak distance, but grid leak distance long can reduce again maximum saturation leakage current, therefore
Device is provided simultaneously with high-breakdown-voltage and saturation output current high has critically important Research Significance.
The content of the invention
The embodiment provides a kind of field-effect transistor, device can be made to be provided simultaneously with high-breakdown-voltage and height
Saturation output current.
To reach above-mentioned purpose, embodiments of the invention are adopted the following technical scheme that：
A kind of field-effect transistor is the embodiment of the invention provides, including：
Substrate；
Channel layer, is formed at the top of the substrate；
Barrier layer, is formed at the top of the channel layer；
Source electrode, drain electrode, grid, are formed at the top of the barrier layer, and the source electrode and the drain electrode are located at described respectively
The both sides of grid；
At least one metal ohmic contact bar, is formed between the grid and the drain electrode.
Preferably, the two-dimensional electron gas directly contact in the both sides of the metal ohmic contact bar and the channel layer, institute
State during two-dimensional electron gas are formed at the channel layer and be close at its upper edge with the barrier layer contact portion.
Preferably, the field-effect transistor includes two or more and the ohmic metal bar being parallel to each other.
Further, the field-effect transistor also includes：
At least one of which gate insulation layer, is formed between the grid and the barrier layer.
Preferably, the gate insulation layer covers the Zone Full between the grid and the drain electrode or subregion.
Alternatively, the field-effect transistor includes the above gate insulation layer of two-layer.
Preferably, the dielectric constant of the gate insulation layer is more than 9.
Preferably, the material of the gate insulation layer is TiO2。
Field-effect transistor provided in an embodiment of the present invention, including：Substrate, is formed at the channel layer above the substrate,
Be formed at the barrier layer above the channel layer, be formed at source electrode, drain electrode, grid above the barrier layer, the source electrode and
The drain electrode is respectively positioned at the both sides of the grid, and is formed at least one ohm between the grid and the drain electrode
Contacting metal bar, thus it can be seen that compared to same structure and with the device of identical high-breakdown-voltage, the present invention can be with
The distance between grid, drain electrode in device architecture are divided at least two segment distances, the path length of electron motion in such raceway groove
Just each section of distance is shorten to, foot is obtained in motion process because short electronics flow path can be effectively reduced electronics
Reach energy and become thermionic probability, therefore device can be made to obtain saturation output current higher；Meanwhile, due also to source,
The distance between drain electrode does not change, therefore can also be protected while can ensure that device obtains saturation output current high
Card has breakdown voltage high.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the relation schematic diagram of drain saturation current and source and drain distance in gallium nitride based high electron mobility crystal structure；
Fig. 2 is the structural representation of GaN base HEMT device provided in an embodiment of the present invention；
Fig. 3-Fig. 5 is the structural representation of the GaN base HEMT device with gate insulation layer provided in an embodiment of the present invention.
Reference：
1- substrates, 2- channel layers, 3- barrier layers, 4- grids, 5- source electrodes, 6- drain electrodes, 7- metal ohmic contact bars, 8- two dimensions
Electron gas, 9- gate insulation layers
Specific embodiment
According to the partial content of background technology, it can be appreciated that although short grid leak distance can improve device
Maximum saturation output current, but the maximum breakdown voltage of device can be reduced；Otherwise, although the maximum that can improve device is hit
Wear voltage, but the maximum saturation output current of device can be reduced, so cause device to be provided simultaneously with saturation high and export
Electric current and breakdown voltage high, therefore, the invention provides a kind of field-effect transistor, including：Substrate 1, is formed at the lining
The channel layer 2 of the top of bottom 1, is formed at the barrier layer 3 of the top of the channel layer 2, be formed at the top of the barrier layer 3 source electrode 5,
Drain electrode 6, grid 4, the source electrode 5 and the drain electrode 6 are respectively positioned at the both sides of the grid 4, and are formed at the He of the grid 4
At least one metal ohmic contact bar 7 between the drain electrode 6, it can be seen that compared to same structure and with identical height
The device of breakdown voltage, the present invention can be divided at least two segment distances with the distance between the grid in device architecture, drain electrode, so
The path length of electron motion just shorten to each section of distance in raceway groove, because short electronics flow path can effectively drop
Low electronics obtains enough energy in motion process and becomes thermionic probability, therefore device can be made to obtain saturation higher
Output current；Meanwhile, due also to the distance between source, drain electrode do not change, therefore can ensure that it is high full that device is obtained
Can also ensure with breakdown voltage high while with output current.
In order to those skilled in the art more fully understand the present invention, below in conjunction with the accompanying drawing in the embodiment of the present invention
2-5, and can realize being provided simultaneously with the gallium nitride based high electron mobility crystal of saturation output current high and high-breakdown-voltage
Pipe (being referred to as GaN base HEMT below) is clearly and completely described, it is to be understood that it may also be possible to apply the invention for
Other III-V compound field-effect transistors in addition to GaN base HEMT.
It will be apparent that the embodiments described below is only a part of embodiment of the invention, rather than whole embodiments.Base
Embodiment in the present invention, it is all that those of ordinary skill in the art are obtained on the premise of creative work is not made
Other embodiment, belongs to the scope of protection of the invention.
And, in accompanying drawing provided in an embodiment of the present invention, the profile of shown device architecture can not as ratio
Make partial enlargement method, and the schematic diagram is also merely illustrative, it should not limit the scope of protection of the invention herein.Separately
Outward, the three-dimensional space of length, width and depth should be included in actual fabrication.
Fig. 2 is the structural representation of GaN base HEMT provided in an embodiment of the present invention, and reference picture 2, GaN base HEMT includes
Substrate 1, is formed at the channel layer 2 (being referred to as GaN channel layers 2) of the top of the substrate 1, is formed at the channel layer top
Barrier layer 3 (being referred to as AlGaN potential barrier 3), be formed at source electrode 5, the drain electrode 6, grid 4, institute of the top of the barrier layer 3
Source electrode 5 and the drain electrode 6 are stated respectively positioned at the both sides of the grid 4, and is formed between the grid 4 and the drain electrode 6
At least one metal ohmic contact bar 7, wherein GaN channel layers 2, AlGaN potential barrier 3 constitute substrate 1 on heterojunction structure,
Source electrode 5, drain electrode 6 and metal ohmic contact bar 7 form ohmic contact structure, grid 4 and AlGaN with AlGaN potential barrier 3 respectively
Barrier layer 3 forms Schottky contact structure.
Wherein, substrate 1 can select sapphire (Al2O3), other thermal conductivities crystalline material higher, source electrode such as Si or SiC
5th, drain electrode 6, metal ohmic contact bar 7 can be from metal ohmic contacts, grid 4 such as Ti/Al/Ni (Pt, Mo, Ti, Ir etc.)/Au
Can be from Schottky contact metals such as Ni/Au, Pt/Au, Pt/Ti/Au, Ni/Pt/Au.
Compared to same structure and with the device of identical high-breakdown-voltage, when one ohm of setting between grid, drain electrode
During contacting metal bar 7 (not shown), the electron movement path in raceway groove arrives distance and the Europe of metal ohmic contact bar 7 for grid 4
Nurse contacting metal bar 7 is connected to the distance of drain electrode 6 equivalent to this two sections of short-range electron movement paths, due to
This two sections distance is respectively less than the distance between grid, drain electrode, and so relatively short electronics flow path just can effectively drop
Low electronics obtains enough energy in motion process and becomes thermionic probability, therefore device can be made to obtain saturation higher
Output current；Meanwhile, due also to the distance between source, drain electrode do not change, therefore can ensure that it is high full that device is obtained
Can also ensure with breakdown voltage high while with output current.
When the metal ohmic contact bar 7 for two or more being set between grid, drain electrode and being parallel to each other, as shown in Fig. 2 raceway groove
Interior electron movement path is 4 to the first distance of metal ohmic contact bar 7 of grid, multiple adjacent metal ohmic contact bars 7
The distance between and last ohmic metal bar 7 to drain electrode 6 distance, also equivalent to the short distance to this multistage
Connected from electron movement path, because each section of distance is respectively less than the distance between grid, drain electrode, and compared to setting
A metal ohmic contact bar 7 is put, more than two metal ohmic contact bars 7 can further shorten electron movement path, this
The shorter electronics flow path of sample can more effectively reduce electronics and enough energy be obtained in motion process and becomes thermoelectron
Probability, therefore device can be made to obtain saturation output current higher；Meanwhile, due also to the distance between source, drain electrode do not have
Change, therefore can also ensure with breakdown potential high while can ensure that device obtains saturation output current high
Pressure.
The length 7 (parallel to the length of channel direction) of the metal ohmic contact bar it is sufficiently narrow (such as 20nm~
1000nm), the distance between limited grid, drain electrode is so conducive to arrange more metal ohmic contact bars 7, and then can be with
Advantageously in reduce raceway groove in electronics motion path, maximize device maximum saturation leakage current.
By the above, the present invention can be with setting two or more between grid, drain electrode and the Ohmic contact being parallel to each other
Bonding jumper is used as a kind of preferred embodiment.It should be noted that the metal ohmic contact bar that two or more is parallel to each other can
Being to be uniformly distributed, it is also possible to be not uniformly distributed, and distribution situation is depended on the circumstances, therefore the present invention is not carried out specifically to this
Limit.
From the above, it may be appreciated that metal ohmic contact bar 7 contacts to form ohmic contact structure with AlGaN potential barrier 3, its
In, for same device architecture, ohmic contact resistance rate is lower, and resistance is lower, the maximum saturation leakage current that device to be reached
It is bigger, to make device that there is relatively low ohmic contact resistance rate, shape between metal ohmic contact bar 7 and semi-conducting material can be made
Into good Ohmic contact, and shorten the distance between two-dimensional electron gas 8 and metal ohmic contact bar in GaN channel layers 3, i.e.,
The both sides directly contacts two-dimensional electron gas 8 of metal ohmic contact bar 7 shown in Fig. 2 simultaneously can be with the electric communication of two-dimensional electron gas 8.
Certainly, the maximum saturation leakage current for improving device is not limited solely to above two mode, for example, can also select contact resistance
The relatively low metal ohmic contact of rate, the doping concentration of raising channel layer, the width of increase barrier layer when semi-conducting material is made
Deng, the combination of any two or more modes is can also be, bigger maximum saturation leakage current is reached with device.
In addition, it is necessary to explanation, in embodiments of the present invention, relative to the device of same structure, even if increase grid,
The distance between drain electrode, when there is multiple metal ohmic contact bars 7 to be arranged between grid, drain electrode, electron motion in its channel layer 2
Active path can also still can still less than the grid leak distance in original structure device, therefore the maximum saturation leakage current of device
Improve, and due to the increase of grid leak distance so that the maximum breakdown voltage of device is also improved simultaneously, is further better described
The field-effect transistor that the present invention is provided can be provided simultaneously with saturation output current and breakdown voltage high high.
In order to the maximum breakdown voltage of further increase device, the embodiment of the present invention additionally provides another structure
GaN base HEMT, as shown in Fig. 3, Fig. 4 and Fig. 5, the difference with above-mentioned GaN base HEMT-structure is, the GaN base shown in figure
HEMT is additionally included at least one of which gate insulation layer 9, and at least one of which gate insulation layer 9 is formed at the grid 4 and the AlGaN gesture
Between barrier layer 3, wherein, grid 4, gate insulation layer 9 and AlGaN potential barrier 3 form MOS (Metal-Oxide-
Semiconductor, metal-oxide semiconductor (MOS)) structure.
When grid 4 in device architecture and constant drain electrode the distance between 6, gate insulation layer 7 can be to the edge place of grid 4
The highfield of generation is redistributed, and is weakened the peak value electric field of the edge, and then can be increased the maximum of device and punctures
Voltage, and when the gate insulation layer 7 is thicker, can also further increase the maximum breakdown voltage of device.
For the maximum breakdown voltage that can increase device, can be had using the gate insulation layer with high-k
More preferable effect.
The insulating barrier of above-mentioned gate insulation layer or high-k can not only improve the maximum breakdown voltage of device, can be with
The maximum saturation output current of device is improved, specifically, (grid-control ability can be reacted more direct in device holding grid-control ability
Index be mutual conductance gm) it is constant in the case of, due to mutual conductance gmWith unit gate capacitance Cox(Cox=ε/t, ε represent gate dielectric layer
Dielectric constant, t represents the thickness of gate dielectric layer) it is related, therefore the dielectric constant of gate insulation layer 7 is higher, its thickness also can be on year-on-year basis
Example increase, so further reduces grid leakage current, and then improve the maximum saturation leakage current of device.
Wherein, the dielectric constant and thickness of gate insulation layer 7 are not unlimited increase, generally are defined by practical situations
It is determined that rational dielectric constant and thickness.
It is understood that the high-k of gate insulation layer 7 is comparatively, gate insulation layer 7 is selected in the embodiment of the present invention
Relative dielectric constant is more than 9, such as Al2O3、ZrO2、HfO2, and in order to enable the device to enhancing be hereinbefore previously mentioned it is beneficial
Effect, relative dielectric constant can also be more than 30, such as TiO2, its relative dielectric constant is typically larger than 80, under certain conditions,
More than 130 even can be reached.Can use in embodiments of the present invention with gate insulation material as TiO2A kind of preferred scheme.
The embodiment of the present invention can set one layer of gate insulation layer 7 to reach the maximum breakdown voltage and maximum of increase device
Saturation output current, when the thickness of dielectric is thicker or very thick, it is also possible to by setting gate insulation more than two-layer
Layer 7 realizes the purpose.
After it increased gate insulation layer 7, the coverage between the gate and the drain of gate insulation layer 7 may decide that grid leak
Between capacitance size, and the size of gate leakage capacitance can produce influence to the high frequency characteristics of device, thus can be according to device should
Such as with frequency, by adjusting the coverage of gate medium come the cut-off frequency of adjusting means, the gate insulation layer 7 shown in Fig. 5 covers
Subregion between Zone Full between lid grid 4 and drain electrode 6 or the covering grid 4 shown in Fig. 3 or Fig. 4 and drain electrode 6.But
Specific coverage can also optionally set, and the present invention is also not especially limited herein.
The above, specific embodiment only of the invention, but protection scope of the present invention is not limited thereto, and it is any
Those familiar with the art the invention discloses technical scope in, change or replacement can be readily occurred in, should all contain
Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (7)
1. a kind of field-effect transistor, it is characterised in that including：
Substrate；
Channel layer, is formed at the top of the substrate；
Barrier layer, is formed at the top of the channel layer；
Source electrode, drain electrode, grid, are formed at the top of the barrier layer, and the source electrode and the drain electrode are located at the grid respectively
Both sides；
At least one metal ohmic contact bar, is formed between the grid and the drain electrode；
Two-dimensional electron gas directly contact in the both sides of the metal ohmic contact bar and the channel layer, the two-dimensional electron gas
It is formed in the channel layer at its upper edge with the barrier layer contact portion.
2. field-effect transistor according to claim 1, it is characterised in that the field-effect transistor includes two or more
And the metal ohmic contact bar being parallel to each other.
3. the field-effect transistor according to claim any one of 1-2, it is characterised in that also include：
At least one of which gate insulation layer, is formed between the grid and the barrier layer.
4. field-effect transistor according to claim 3, it is characterised in that the gate insulation layer covers the grid and institute
State the Zone Full between drain electrode or subregion.
5. field-effect transistor according to claim 3, it is characterised in that the field-effect transistor is included more than two-layer
The gate insulation layer.
6. field-effect transistor according to claim 3, it is characterised in that the dielectric constant of the gate insulation layer is more than 9.
7. field-effect transistor according to claim 6, it is characterised in that the material of the gate insulation layer is TiO2.
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| WO2012063329A1 (en) * | 2010-11-10 | 2012-05-18 | 三菱電機株式会社 | Semiconductor device, and method for producing semiconductor device |
| CN102592999A (en) * | 2012-03-19 | 2012-07-18 | 中国科学院上海技术物理研究所 | Method for optimizing thickness of channel layer of quantum well high electron mobility transistor (HEMT) appliance |
| CN103000516A (en) * | 2011-09-15 | 2013-03-27 | 台湾积体电路制造股份有限公司 | Method of forming a semiconductor structure |
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| KR20120120826A (en) * | 2011-04-25 | 2012-11-02 | 삼성전기주식회사 | Nitride semiconductor device and manufacturing method thereof |
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| WO2012063329A1 (en) * | 2010-11-10 | 2012-05-18 | 三菱電機株式会社 | Semiconductor device, and method for producing semiconductor device |
| CN103000516A (en) * | 2011-09-15 | 2013-03-27 | 台湾积体电路制造股份有限公司 | Method of forming a semiconductor structure |
| CN102592999A (en) * | 2012-03-19 | 2012-07-18 | 中国科学院上海技术物理研究所 | Method for optimizing thickness of channel layer of quantum well high electron mobility transistor (HEMT) appliance |
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