RISC-V Atom is an open-source soft-core processor platform targeted for FPGAs. It is complete hardware prototyping and software development environment based around Atom, which is a 32-bit embedded-class processor based on the RISC-V Instruction Set Architecture (ISA).

Key highlights of the RISC-V Atom projects are are listed below:

• Atom processor implements RV32IC_Zicsr ISA as defined in the RISC-V unprivileged ISA manual.
• Simple 2-stage pipelined architecture, ideal for smaller FPGAs.
• Wishbone ready CPU interface.
• Support for RISC-V interrupts and exceptions.
• Interactive RTL simulator - AtomSim.
• In-house verification framework - SCAR.
• FPGA-ready SoC implementation - HydrogenSoC.
• Tiny libc like standard library - libcatom.
• Wide range of example programs.
• Open source under MIT License.

To checkout this project, Please refer to the Getting Started Guide. Use the dev branch, if you like to see the latest additions to the project

1. Project Website
2. Project Documentation
   • Getting Started Guide
   • Examples Guide

This project is open-source under MIT license!