Article

Microarchitectural exploration with Liberty

Authors:

Manish Vachharajani,

Neil Vachharajani,

David A. Penry,

Jason A. Blome,

David I. AugustAuthors Info & Claims

MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture

Pages 271 - 282

Published: 18 November 2002 Publication History

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Abstract

To find the best designs, architects must rapidly simulate many design alternatives and have confidence in the results. Unfortunately, the most prevalent simulator construction methodology, hand-writing monolithic simulators in sequential programming languages, yields simulators that are hard to retarget, limiting the number of designs explored, and hard to understand, instilling little confidence in the model. Simulator construction tools have been developed to address these problems, but analysis reveals that they do not address the root cause, the error-prone mapping between the concurrent, structural hardware domain and the sequential, functional software domain. This paper presents an analysis of these problems and their solution, the Liberty Simulation Environment (LSE). LSE automatically constructs a simulator from a machine description that closely resembles the hardware, ensuring fidelity in the model. Furthermore, through a strict but general component communication contract, LSE enables the creation of highly reusable component libraries, easing the task of rapidly exploring ever more exotic designs.

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Cited By

Lockhart DZibrat GBatten CFlautner KWenisch TOzer EFerdman M(2014)PyMTLProceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2014.50(280-292)Online publication date: 13-Dec-2014
https://dl.acm.org/doi/10.1109/MICRO.2014.50
Altevogt PKiss TKistler MRangan R(2013)Mesoscale performance simulation of multicore processor systemsSoftware and Systems Modeling (SoSyM)10.1007/s10270-012-0231-612:4(731-744)Online publication date: 1-Oct-2013
https://dl.acm.org/doi/10.1007/s10270-012-0231-6
Chen XAamodt T(2011)Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRsACM Transactions on Architecture and Code Optimization10.1145/2019608.20196098:3(1-28)Online publication date: 18-Oct-2011
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Index Terms

Microarchitectural exploration with Liberty

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Information & Contributors

Information

Published In

cover image ACM Conferences

MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture

November 2002

442 pages

ISBN:0769518591

Conference Chair:
Erik Altman
IBM
,
General Chair:
Kemal Ebcioǧlu
IBM
,
Program Chairs:
Scott Mahlke
University of Michigan
,
B. Ramakrishna Rau
Hewlett-Packard Laboratories
,
Publications Chair:
Sanjay Patel
University of Illinois

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 18 November 2002

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Micro-35

Sponsor:

SIGMICRO

Micro-35: 35th Annual International Symposium on Microarchitecture

November 18 - 22, 2002

Istanbul, Turkey

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Overall Acceptance Rate 484 of 2,242 submissions, 22%

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Cited By

Lockhart DZibrat GBatten CFlautner KWenisch TOzer EFerdman M(2014)PyMTLProceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2014.50(280-292)Online publication date: 13-Dec-2014
https://dl.acm.org/doi/10.1109/MICRO.2014.50
Altevogt PKiss TKistler MRangan R(2013)Mesoscale performance simulation of multicore processor systemsSoftware and Systems Modeling (SoSyM)10.1007/s10270-012-0231-612:4(731-744)Online publication date: 1-Oct-2013
https://dl.acm.org/doi/10.1007/s10270-012-0231-6
Chen XAamodt T(2011)Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRsACM Transactions on Architecture and Code Optimization10.1145/2019608.20196098:3(1-28)Online publication date: 18-Oct-2011
https://dl.acm.org/doi/10.1145/2019608.2019609
Brogioli MCavallaro J(2009)Compiler driven architecture design space exploration for DSP workloadsProceedings of the 43rd Asilomar conference on Signals, systems and computers10.5555/1843565.1843615(221-225)Online publication date: 1-Nov-2009
https://dl.acm.org/doi/10.5555/1843565.1843615
Cao ZXu JChen MZheng GLv HSun NWainer GShaffer CMcGraw RChinni M(2009)HPPNetSimProceedings of the 2009 Spring Simulation Multiconference10.5555/1639809.1639843(1-8)Online publication date: 22-Mar-2009
https://dl.acm.org/doi/10.5555/1639809.1639843
Cong JGururaj KHan GKaplan ANaik MReinman GNassif SRoychowdhury J(2008)MC-SimProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509541(364-371)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509541
Rangan RVachharajani NOttoni GAugust D(2008)Performance scalability of decoupled software pipeliningACM Transactions on Architecture and Code Optimization10.1145/1400112.14001135:2(1-25)Online publication date: 3-Sep-2008
https://dl.acm.org/doi/10.1145/1400112.1400113
Mathaikutty DShukla S(2008)MCFIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200034416:7(792-805)Online publication date: 1-Jul-2008
https://dl.acm.org/doi/10.1109/TVLSI.2008.2000344
Chen XAamodt T(2008)Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRsProceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2008.4771779(59-70)Online publication date: 8-Nov-2008
https://dl.acm.org/doi/10.1109/MICRO.2008.4771779
Stanley-Marbell PMarculescu D(2007)SunflowerProceedings of the 2nd international conference on High performance embedded architectures and compilers10.5555/1762146.1762163(168-182)Online publication date: 28-Jan-2007
https://dl.acm.org/doi/10.5555/1762146.1762163
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