research-article

Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash Memory

Authors:

Zili ShaoAuthors Info & Claims

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 41, Issue 10

Pages 3276 - 3289

https://doi.org/10.1109/TCAD.2021.3123177

Published: 01 October 2022 Publication History

Abstract

The lifetime of NAND flash cells significantly degrades with feature-size reductions and multilevel cell technology. On the other hand, we have more and more approximate data, such as images and videos that are more error tolerant than regular data like text. In this article, we propose Rebirth-FTL, which reuses faulty blocks that contain uncorrectable errors to store approximate data for lifetime optimization. Rebirth-FTL effectively manages two spaces, namely, the approximate space and the normal space, with an efficient address translator, a coordinated garbage collection, and a differential wear leveler. In addition, we develop an migration times restriction (MTR) policy to restrict the movement of the approximate data in the approximate space. We also develop a scheme to pass approximate information from userland to kernel space in Linux. Finally, a lifetime model is presented for lifetime analysis. Our experimental results show that Rebirth-FTL can extend the lifetime by 41.63% on average.

References

[1]

L. Han, Z. Shao, H. Amrouch, and J. Henkel, “Rebirth-FTL: Lifetime optimization via approximate storage for NAND flash,” in Proc. Non-Volatile Memory Syst. Appl. Symp., 2019, pp. 1–6.

[2]

X. Xie, T. Yang, Q. Li, D. Wei, and L. Xiao, “Duchy: Achieving both SSD durability and controllable SMR cleaning overhead in hybrid storage systems,” in Proc. Int. Conf. Parallel Process., 2018, pp. 1–9.

[3]

M. Shoushtari, A. BanaiyanMofrad, and N. Dutt, “Exploiting partially-forgetful memories for approximate computing,” IEEE Embedded Syst. Lett., vol. 7, no. 1, pp. 19–22, Mar. 2015.

Digital Library

[4]

“2GB MLC NAND flash datasheet,” Data Sheet K9G4G08U0F, Samsung Corp., Suwon-si, South Korea, 2011. [Online]. Available: https://datasheetspdf.com/pdf/776555/Samsung/K9GAG08U0F/6

[5]

A. Sampson, J. Nelson, K. Strauss, and L. Ceze, “Approximate storage in solid-state memories,” ACM Trans. Comput. Syst., vol. 32, no. 3, pp. 1–23, 2014.

Digital Library

[6]

J. Cui, Y. Zhang, L. Shi, C. J. Xue, W. Wu, and J. Yang, “ApproxFTL: On the performance and lifetime improvement of 3-D NAND flash-based SSDs,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 37, no. 10, pp. 1957–1970, Oct. 2018.

Digital Library

[7]

R. Azevedo, J. D. Davis, K. Strauss, P. Gopalan, M. Manasse, and S. Yekhanin, “Zombie memory: Extending memory lifetime by reviving dead blocks,” SIGARCH Comput. Archit. News, vol. 41, no. 3, pp. 452–463, 2013.

Digital Library

[8]

Q. Guo, K. Strauss, L. Ceze, and H. S. Malvar, “High-density image storage using approximate memory cells,” ACM SIGPLAN Notices, vol. 51, no. 4, pp. 413–426, 2016.

Digital Library

[9]

D. Jevdjic, K. Strauss, L. Ceze, and H. S. Malvar, “Approximate storage of compressed and encrypted videos,” SIGARCH Comput. Archit. News, vol. 45, no. 1, pp. 361–373, 2017.

Digital Library

[10]

A. Birrell, M. Isard, C. Thacker, and T. Wobber, “A design for high-performance flash disks,” ACM SIGOPS Oper. Syst. Rev., vol. 41, no. 2, pp. 88–93, 2007.

Digital Library

[11]

J. Cui, Y. Zhang, J. Huang, W. Wu, and J. Yang, “ShadowGC: Cooperative garbage collection with multi-level buffer for performance improvement in NAND flash-based SSDs,” in Proc. Design Autom. Test Europe Conf. Exhibition, 2018, pp. 1247–1252.

[12]

T. Garrett, J. Yang, and Y. Zhang, “Enabling intra-plane parallel block erase in NAND flash to alleviate the impact of garbage collection,” in Proc. Int. Symp. Low Power Electron. Design, 2018, pp. 1–6.

[13]

H. A. Khouzani, C. Liu, and C. Yang, “Architecting data placement in SSDS for efficient secure deletion implementation,” in Proc. Int. Conf. Comput. Aided Design, 2018, pp. 1–6.

[14]

P. Olivier, J. Boukhobza, E. Senn, and H. Ouarnoughi, “A methodology for estimating performance and power consumption of embedded flash file systems,” ACM Trans. Embedded Comput. Syst., vol. 15, no. 4, pp. 79–103, 2016.

[15]

P. Olivier, J. Boukhobza, and E. Senn, “Revisiting read-ahead efficiency for raw NAND flash storage in embedded linux,” ACM SIGBED Rev., vol. 11, no. 4, pp. 43–48, 2015.

Digital Library

[16]

J. Boukhobza and P. Olivier, “C-Lash: A cache system for optimizing NAND flash memory performance and lifetime,” in Proc. Int. Conf. Digit. Inf. Commun. Technol. Appl., 2011, pp. 599–613.

[17]

P. Olivier, J. Boukhobza, and E. Senn, “Flashmon V2: Monitoring raw NAND flash memory I/O requests on embedded linux,” ACM SIGBED Rev., vol. 11, no. 1, pp. 38–43, 2014.

Digital Library

[18]

L. Juet al., “NVM-based FPGA block RAM with adaptive SLC-MLC conversion,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 37, no. 11, pp. 2661–2672, Nov. 2018.

[19]

M. Zhao, Y. Xue, C. Yang, and C. J. Xue, “Minimizing MLC PCM write energy for free through profiling-based state remapping,” in Proc. Asia South Pac. Design Autom. Conf., 2015, pp. 502–507.

[20]

C. Pan, M. Xie, J. Hu, Y. Chen, and C. Yang, “3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems,” in Proc. Int. Conf. Hardw. Softw. Codesign Syst. Synth., 2014, pp. 1–10.

[21]

Y. Ni, Z. Gong, W. Chen, C. Yang, and K. Qiu, “State-transition-aware spilling heuristic for MLC STT-RAM-based registers,” VLSI Design, vol. 2017, pp. 1–10, Nov. 2017.

Digital Library

[22]

J. Boukhobza, P. Olivier, and S. Rubini, “A scalable and highly configurable cache-aware hybrid flash translation layer,” Computers, vol. 3, no. 1, pp. 36–57, 2014.

[23]

S. Wang, F. Wu, C. Yang, J. Zhou, C. Xie, and J. Wan, “Was: Wear aware superblock management for prolonging SSD lifetime,” in Proc. Design Autom. Conf., 2019, pp. 1–6.

[24]

C. Pan, S. Gu, M. Xie, Y. Liu, C. J. Xue, and J. Hu, “Wear-leveling aware page management for non-volatile main memory on embedded systems,” IEEE Trans. Multi-Scale Comput. Syst., vol. 2, no. 2, pp. 129–142, Apr./Jun. 2016.

[25]

J. Hu, M. Xie, C. Pan, C. J. Xue, Q. Zhuge, and E. H.-M. Sha, “Low overhead software wear leveling for hybrid PCM+ DRAM main memory on embedded systems,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 23, no. 4, pp. 654–663, Apr. 2015.

Digital Library

[26]

M.-C. Yang, Y.-M. Chang, C.-W. Tsao, P.-C. Huang, Y.-H. Chang, and T.-W. Kuo, “Garbage collection and wear leveling for flash memory: Past and future,” in Proc. Int. Conf. Smart Comput., 2014, pp. 66–73.

[27]

L. Han, Z. Shen, Z. Shao, and T. Li, “Optimizing RAID/SSD controllers with lifetime extension for flash-based SSD array,” in Proc. Int. Conf. Lang. Compilers Tools Embedded Syst., 2018, pp. 44–54.

[28]

J. Kim, J. Lee, J. Choi, D. Lee, and S. H. Noh, “Improving SSD reliability with RAID via elastic striping and anywhere parity,” in Proc. Int. Conf. Dependable Syst. Netw., 2013, pp. 1–12.

[29]

X.-Y. Hu, E. Eleftheriou, R. Haas, I. Iliadis, and R. Pletka, “Write amplification analysis in flash-based solid state drives,” in Proc. Int. Syst. Storage Conf., 2009, pp. 1–9.

[30]

W.-L. Wang, T.-Y. Chen, Y.-H. Chang, H.-W. Wei, and W.-K. Shih, “Minimizing write amplification to enhance lifetime of large-page flash-memory storage devices,” in Proc. Design Autom. Conf., 2018, pp. 1–6.

[31]

“Tiny210v2 with S5PV210 ARM Cortex-A8 Board.” FriendlyArm. 2019. [Online]. Available: http://www.friendlyarm.net/products/smart210

[32]

“SNIA IOTTA Repository.” Storage Networking Industry Association. 2011. [Online]. Available: http://iotta.snia.org/tracetypes/3

[33]

B. Li, P. Gu, Y. Wang, and H. Yang, “Exploring the precision limitation for RRAM-based analog approximate computing,” IEEE Design Test, vol. 33, no. 1, pp. 51–58, Feb. 2016.

[34]

Y. Wang, B. Li, L. Xia, T. Tang, and H. Yang, “Energy efficient RRAM crossbar-based approximate computing for smart cameras,” in Smart Sensors and Systems. Cham, Switzerland: Springer, 2017, pp. 109–133.

[35]

K. Maet al., “IAA: Incidental approximate architectures for extremely energy-constrained energy harvesting scenarios using IoT nonvolatile processors,” IEEE Micro, vol. 38, no. 4, pp. 11–19, Jun./Aug. 2018.

Digital Library

[36]

X. Zhang, Y. Zhang, B. R. Childers, and J. Yang, “DrMP: Mixed precision-aware DRAM for high performance approximate and precise computing,” in Proc. Int. Conf. Parallel Archit. Compilation Techn., 2017, pp. 53–63.

[37]

X. Zhang, Y. Zhang, B. Childers, and J. Yang, “AWARD: Approximation-aware restore in further scaling DRAM,” in Proc. Int. Symp. Memory Syst., 2016, pp. 322–324.

[38]

Y. Li, Y. Sun, G. Dai, Q. Xu, Y. Wang, and H. Yang, “Approximate frequent itemset mining for streaming data on FPGA,” in Proc. Int. Conf. Field Programmable Logic Appl., 2016, pp. 1–4.

[39]

B. Li, Y. Shan, M. Hu, Y. Wang, Y. Chen, and H. Yang, “Memristor-based approximated computation,” in Proc. Int. Symp. Low Power Electron. Design, 2013, pp. 242–247.

[40]

V. Vassiliadiset al., “A programming model and runtime system for significance-aware energy-efficient computing,” ACM SIGPLAN Notices, vol. 50, no. 8, pp. 275–276, 2015.

Digital Library

[41]

A. Ranjan, A. Raha, V. Raghunathan, and A. Raghunathan, “Approximate memory compression for energy-efficiency,” in Proc. Int. Symp. Low Power Electron. Design, 2017, pp. 1–6.

[42]

G. Tagliavini, D. Rossi, A. Marongiu, and L. Benini, “Synergistic HW/SW approximation techniques for ultralow-power parallel computing,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 37, no. 5, pp. 982–995, May 2018.

[43]

A. Teman, G. Karakonstantis, R. Giterman, P. Meinerzhagen, and A. Burg, “Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories,” in Proc. Design Autom. Test Europe Conf. Exhibition, 2015, pp. 489–494.

[44]

A. Ranjan, S. Venkataramani, X. Fong, K. Roy, and A. Raghunathan, “Approximate storage for energy efficient spintronic memories,” in Proc. Design Autom. Conf., 2015, pp. 1–6.

[45]

I. Goiri, R. Bianchini, S. Nagarakatte, and T. D. Nguyen, “ApproxHadoop: Bringing approximations to mapreduce frameworks,” SIGARCH Comput. Archit. News, vol. 43, no. 1, pp. 383–397, 2015.

Digital Library

[46]

X. Xu and H. H. Huang, “Exploring data-level error tolerance in high-performance solid-state drives,” IEEE Trans. Rel., vol. 64, no. 1, pp. 15–30, Mar. 2015.

[47]

F. Li, Y. Lu, Z. Wu, and J. Shu, “ASCache: An approximate SSD cache for error-tolerant applications,” in Proc. Design Autom. Conf., 2019, pp. 1–6.

[48]

B. Li, P. Gu, Y. Shan, Y. Wang, Y. Chen, and H. Yang, “RRAM-based analog approximate computing,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 34, no. 12, pp. 1905–1917, Dec. 2015.

Digital Library

[49]

Q. Li, L. Shi, J. Yang, Y. Zhang, and C. J. Xue, “Leveraging approximate data for robust flash storage,” in Proc. Design Autom. Conf., 2019, pp. 1–6.

[50]

Y. Fang, H. Li, and X. Li, “SoftPCM: Enhancing energy efficiency and lifetime of phase change memory in video applications via approximate write,” in Proc. Asian Test Symp., 2012, pp. 131–136.

[51]

A. Rahmati, M. Hicks, and A. Prakash, “Approximate flash storage: A feasibility study,” in Proc. Workshop Approx. Comput. Across Stack, 2016, pp. 1–3.

Cited By

Hu HHan GWu WZhou YLiu C(2024)ECCPM: An Efficient Internal Data Migration Scheme for Flash Memory SystemsIEEE Transactions on Consumer Electronics10.1109/TCE.2024.345989270:4(6519-6532)Online publication date: 1-Nov-2024
https://dl.acm.org/doi/10.1109/TCE.2024.3459892
Li JShen ZLiu DChen XZhong KZeng ZTan Y(2024)LightFS: A Lightweight Host-CSD Coordinated File System Optimizing for Heavy Small File AccessesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.344301043:11(3527-3538)Online publication date: 1-Nov-2024
https://dl.acm.org/doi/10.1109/TCAD.2024.3443010
Wu CLiu CYu P(2024)A Hash-Based Clustering System Software for Intermittent Computing Devices With NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.338055343:9(2565-2577)Online publication date: 21-Mar-2024
https://dl.acm.org/doi/10.1109/TCAD.2024.3380553
Show More Cited By

Index Terms

Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash Memory

Index terms have been assigned to the content through auto-classification.

Recommendations

Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
SIGMETRICS '18: Abstracts of the 2018 ACM International Conference on Measurement and Modeling of Computer Systems

Compared to planar NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. This allows 3D NAND flash memory to increase storage density using a much less aggressive ...
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
SIGMETRICS '18

Compared to planar NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. This allows 3D NAND flash memory to increase storage density using a much less aggressive ...
Subpage programming for extending the lifetime of NAND flash memory
DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition

During the past decade, the density of NAND flash memory has been increased in many folds. The increase has been driven by storing multiple bits in a cell and scaling down the fabrication process. Such advance in manufacturing technology, however, has ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 41, Issue 10

Oct. 2022

401 pages

ISSN:0278-0070

Issue’s Table of Contents

1937-4151 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See https://www.ieee.org/publications/rights/index.html for more information.

Publisher

IEEE Press

Publication History

Published: 01 October 2022

Qualifiers

Research-article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

5
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 05 Mar 2025

Other Metrics

View Author Metrics

Citations

Cited By

Hu HHan GWu WZhou YLiu C(2024)ECCPM: An Efficient Internal Data Migration Scheme for Flash Memory SystemsIEEE Transactions on Consumer Electronics10.1109/TCE.2024.345989270:4(6519-6532)Online publication date: 1-Nov-2024
https://dl.acm.org/doi/10.1109/TCE.2024.3459892
Li JShen ZLiu DChen XZhong KZeng ZTan Y(2024)LightFS: A Lightweight Host-CSD Coordinated File System Optimizing for Heavy Small File AccessesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.344301043:11(3527-3538)Online publication date: 1-Nov-2024
https://dl.acm.org/doi/10.1109/TCAD.2024.3443010
Wu CLiu CYu P(2024)A Hash-Based Clustering System Software for Intermittent Computing Devices With NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.338055343:9(2565-2577)Online publication date: 21-Mar-2024
https://dl.acm.org/doi/10.1109/TCAD.2024.3380553
Lee DLee JSong M(2023)Video File Allocation for Wear-Leveling in Distributed Storage Systems With Heterogeneous Solid-State-Disks (SSDs)IEEE Transactions on Circuits and Systems for Video Technology10.1109/TCSVT.2022.322247333:5(2477-2490)Online publication date: 1-May-2023
https://dl.acm.org/doi/10.1109/TCSVT.2022.3222473
Yu XHe JLi QZhang BWang XWang QHuo Z(2023)DMMC: A Polar Code Construction Method for Improving Performance in TLC NAND FlashIEEE Embedded Systems Letters10.1109/LES.2023.327072716:2(146-149)Online publication date: 26-Apr-2023
https://dl.acm.org/doi/10.1109/LES.2023.3270727

View Options

View options

Figures

Tables

Media

View Issue’s Table of Contents