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Multiprocessor hardware: An architectural overview

Published: 01 January 1980 Publication History

Abstract

The subject of multiprocessor computer systems has been discussed almost since the inception of the modern digital computer in its uniprocessor form. The motivation for multiprocessor system research and development activity arises from a consideration of one or more of the following factors:
throughput
flexibility
extendability
price/performance
availability
reliability
fault tolerance.
While any one of these factors may be the central issue, it should not be construed that these factors are disjoint. Quite the contrary, each may have a subtle, nonobvious effect on any multiprocessor system design.

References

[1]
Ahuja, S. R. and Roberts, C. S. "An Associative/Parallel Processor for Partial Match Retrieval Using Superimposed Codes", Proceedings 7th Annual Symposium on Computer Architecture, May 1980, La Baule, France, pp.218-227.
[2]
Amdahl, G. M., Blaauw, G. A., and Brooks, F. P., Jr. "Architecture of the IBM System/360", IBM Journal of Research and Development, April 1974. pp.87-101.
[3]
Amdahl, G. M. "Validity of the Single Processor Approach to Achieving Large Scale Computing Capabilities", Proceedings AFIPS Spring Joint Computer Conference, Vol. 30, 1967, pp.483.
[4]
Anderson, D. W., Sparacio, F. J., and Tomasulo, R. M. "The IBM System/360 Model 91: Machine Philosophy and Instruction Handling", IBM Journal of Research and Development, Vol. 11, No. 1, Jan. 1967, pp.8-24.
[5]
Anderson, G. A. "Interconnecting a Distributed Processor System for Avionics", Proceedings 1st Annual Symposium on Computer Architecture, Dec. 1973, Gainesville, FL, pp.11-16.
[6]
Anderson, G. A. "Multiple Match Resolvers: A New Design Method", IEEE Transactions on Computers, Dec. 1974, pp.1317-1320.
[7]
Anderson, G. A., and Jensen, E. D. "Computer Interconnection Structures: Taxonomy, Characteristics and Examples", ACM Computing Surveys, Vol. 7, No. 4, Dec. 1975, pp.197-213.
[8]
Auerbach, Associative Memory Investigations Substructuring, Searching and Data Organizations, Final Report, Air Force Contract AF 30 (602)4309, May 15, 1968.
[9]
Auerbach, Guide to International Computer Systems Architecture, Auerbach, Philadelphia, PA, 1976.
[10]
Avizienis, A. "Architecture of Fault-Tolerant Computing Systems", 1975 International Symposium on Fault-Tolerant Computing, Jan. 1975.
[11]
Avizienis A., (Ed.) "Fault Tolerant Digital Systems", IEEE Proceedings, Vol. 66, No. 10, Oct. 1978, pp.1107-1268.
[12]
Baer, J. L. "Large Scale Systems", Computer Science, A. F. Cardenor, L. Presser, and M. A. Marin (Eds.), Wiley-Interscience. New York, 1972, Chapter 5.
[13]
Baer, J. L. "A Survey of Some Theoretical Aspects of Multiprocessing", ACM Computing Surveys, Vol. 5, No. I, March 1973 pp.31-80.
[14]
Barnes, G. H., Brown, R ., Kalo, M., Kuck, D., Slotnick, D., and Stokes, R. "The ILLIAC IV Computer", IEEE Transactions on Computers, Vol. C-17 1968, pp.746-757.
[15]
Baskin, H. B., Borgerson, B. R., and Roberts, R. "PRIME A Modular Architecture for Terminal-Oriented Systems", Proceedings AFIPS Spring Joint Computer Conference, 1972, pp.431-437.
[16]
Batcher, K. E. "STARAN Parallel Processor System Hardware", Proceedings AFIPS National Computer Conference, 1974, pp.405-410.
[17]
Batcher, K. E. "STARAN Series E", Parallel Processing Symposium, Aug. 1977.
[18]
Batcher, K. E. "Architecture of a Massively Parallel Processor", Proceedings 7th Annual Symposium on Computer Architecture, May 1980, La Baule, France, pp.168-173.
[19]
Beizer, B. The Architecture and Engineering of Digital Computer Complexes, Vols. 1 and 2, Plenum Press, New York, 1971.
[20]
Bell, C. G., and Newell, A. Computer Structures: Readings and Examples, McGraw-Hill, New York, 1971.
[21]
Bell, C. G., Kotok, A., Hastings, T. N. and Hill, R. "The Evolution of the DECSYSTEM 10", Communications of the ACM, Jan. 1978, Vol. 21, No. 1, pp.44-63.
[22]
Berg, R. O., and Thurber, K. J. "A Multiplexed I/O System for Real Time Computers", Computer Design, May 1971, pp.99-103.
[23]
Berg, R. O., et a l . "PEPE - An Overview of Architecture, Operation and Implementation", Proceedings IEEE National Electronics Conference, New York, 1972, pp.312-317.
[24]
Berg, R. O ., and Kinney, L. L. "A Digital Signal Processor", IEEE Computer Society International Conference, Sept. 1972, pp.45-48.
[25]
Bird, R. M., et al. "Study of Associative Processing Techniques, National Technical Information Service, AD376572, Sept. 1966.
[26]
Borck, W. C., McReynolds, R. C. and Slotnick, D. L. "The SOLOMON Computer", Proceedings AFIPS Fall Joint Computer Conference, Vol. 22, 1962, pp.97-107.
[27]
Borgerson, B. R., Hanson, M. L. and Hartley, P. A. "The Evolution of the Sperry UNIVAC 1100 Series: A History, Analysis, and Projection", Communications of the ACM, Jan. 1978, Vol. 21, No. 1, pp.25-43.
[28]
Borgerson, B. R., Godfrey, M. D., Hagerty, P. E. and Rykken, T. R. "The Architecture of the Sperry UNIVAC 1100 Series Systems", Proceedings 6th Annual Symposium on Computer Architecture, April 1979, Philadelphia, PA, pp.137-146.
[29]
Bouknight, W. J., et al. "The ILLIAC IV System", IEEE Proceedings, Vol. 60, No. 4, April 1972, pp.369-388.
[30]
Bressler, R. D., Kraley, M. F. and Michel, A. "PLURIBUS: A Multiprocessor for Communications Networks", 14th Annual ACM/NBS Technical Symposium Computing in the Mid-70's: An Assessment, June 1975, pp.13-19.
[31]
Brooks, F. P., Jr. "Recent Developments in Computer Organization", Advances in Electronic and Electron Physics, Vol. 18, Academic Press, New York, 1963, pp.45-65.
[32]
Brooks, F. P., dr. "The Future of Computer Architecture", Proceedings AFIPS Congress 65, Vol. 1, Washington, DC, 1965, pp.87-91.
[33]
Burroughs, Burroughs B6700 Information Processing Systems Reference Manual, Burroughs Corp., Detroit, MI, 1972.
[34]
Bush, V. "As We May Think", Atlantic Monthly, Vol. 176, July 1945, pp.101-108.
[35]
Cannel, M. H., et al. "Concepts and Applications of Computerized Associative Processing, Including an Associative Processing Bibliography", National Technical Information Service, AD879281, Dec. 1970.
[36]
Case, R. P., and Padegs, A. "Architecture of the IBM System/370", Communications of the ACM, Jan. 1978, Vol. 21, No. 1, pp.73-96.
[37]
Caspe, R. A. "Array Processors", Mini-Micro Systems, July 1978, pp.54-63.
[38]
Chen, R. C. Bus Communication Systems, University Microfilms Dissertation 74-20493, 1974.
[39]
Chen, T. C. "Parallelism, Pipelining, and Computer Efficiency", Computer Design, Vol. 10, 1971, pp.69-74.
[40]
Chen, T. C. "Unconventional Superspeed Computer Systems", Proceedings AFIPS Spring Joint Computer Conference, 1971, pp.365-371.
[41]
Coker, C. H. "An Experimental Interconnection of Computers Through a Loop Transmission System", Bell System Technical Journal, July/August 1972.
[42]
Conway, M. "A Multiprocessor System Design", Proceedings AFIPS Fall Joint Computer Conference, 1963, pp.139-146.
[43]
Cooper, A. E. and Chow, W. T. "Development of On-Board Space Computer Systems", IBM Journal of Research and Development, Vol. 20, No. 1, Jan. 1976, pp.5-19.
[44]
Cornell, J. A. "Parallel Processing of Ballistic Missile Defense Radar Data With PEPE", IEEE Computer Society International Conference, Sept. 1972, pp.69-72.
[45]
Covo, A. A. "Analysis of Multiprocessor Control Organizations with Partial Program Memory Replication", IEEE Transactions on Computers, Vol. C-23, No. 2, Feb. 1974, pp.113-120.
[46]
Crane, B. A., and Githens, J. A. "Bulk Processing in Distributed Logic Memory", IEEE Transactions on Electronic Computers, April 1965, pp.186-196.
[47]
Cray Research, CRAY-1 Computer System Reference Manual, Cray Research, Inc., Minneapolis, MN, 1976.
[48]
Davidson, E. S. "A Multiple Stream Microprocessor Prototype System: AMP-1", Proceedings 7th Annual Symposium on Computer Architecture, May 1980 La Baule, France, pp.9-16.
[49]
Davis, R. L., Zucker, S., and Campbell, C. M. "The Building Block Approach to Multiprocessing", AFIPS Spring Joint Computer Conference, 1972, pp.685-703.
[50]
Denning, P. J. "Virtual Memory", ACM Computing Surveys, Vol. 2, No. 3, Sept. 1970, pp.153-189.
[51]
Derickson, R. B. "A Proposed Associative Push Down Memory", Computer Design, March 1968, pp.60-66.
[52]
Despain, A. M. and Patterson, D. A. "X-TREE: A Tree Structured Multiprocessor Computer Architecture", Proceedings 5th Annual Symposium on Computer Architecture, April 1978, Palo Alto, CA, pp.144-151.
[53]
Elmquist, K. A. "Architectural and Design Perspectives in a Modular Multi-Microprocessor, the DPS-1", Proceedings AFIPS National Computer Conference, June 1979, New York, pp.587-593.
[54]
England, D. M. "Critical Requirements for Multiprocessor System Design", INFO Software, Infotech, Maidenhead, Berkshire, England, 1974.
[55]
Enslow, P. H. (Ed.) "Multiprocessors and Parallel Processing", John Wiley and Sons, New York, 1974.
[56]
Enslow, P. H., (Ed.) Proceedings 1976 International Conference on Parallel Processing, Wayne State University, Detroit, MI, August 1976, 325 pp.
[57]
Enslow, P. H. "Multiprocessor Organization - A Survey", ACM Computing Surveys, Vol. 9, No. 1, March 1977, pp. 103-129.
[58]
Erwin, J. D., and Jensen, E. D. "Interrupt Processing with Queued Content Addressable Memories" Proceedings AFIPS Fall Joint Computer Conference, 1972, pp.621-627.
[59]
Farber, D. J., and Larson, K. C. "The System Architecture of the Distributed Computer System - The Communications System", Proceedings Symposium on Computer-Communications Networks and Teletraffic, April 1972,
[60]
Farmer, W. O., and Newhall, E. E. "An Experimental Distributed Switching System to Handle Bursty Computer Traffic ", Proceedings ACM Symposium on Problems in the Optimization of Data Communications, October 1969.
[61]
Farrell, E. P., Ghani, N. and Treleaven, P. C. "A Concurrent Computer Architecture and a Ring Based Implementation", Proceedings 6th Annual Symposium on Computer Architecture, April, 1979, Philadelphia, PA, pp.1-11.
[62]
Feng, T. Y., (Ed.) Proceedings 1972 Sagamore Computer Conference on RADCAP and its Applications, August 23-25, 1972, 226 pp.
[63]
Feng, T. Y., (Ed.) Proceedings 1973 Sagamore Computer Conference on Parallel Processing, August 22-24, 1973, 190 pp.
[64]
Feng, T. Y., (Ed.) Proceedings 1974 Sagamore Computer Conference on Parallel Processing, August 20-23, 1974, 433 pp.
[65]
Feng, T. Y., (Ed.) Proceedings 1975 Sagamore Computer Conference on Parallel Processing, August 19-22, 1975.
[66]
Feng, T. Y. "Search Algorithms for Associative Memories", Proceedings Fourth Annual Princeton Conference on Information Sciences and Systems, Princeton University, Princeton, NJ, March 1970, pp.442-446.
[67]
Flynn, M. J. "Very High-Speed Computing Systems", IEEE Proceedings, Vol. 54, Dec. 1966, pp.1901-1909.
[68]
Flynn, M. J. "Shared Internal Resources in a Multiprocessor", Information Processing 71, Proceedings IFIP Congress 1971, pp.565-569.
[69]
Flynn, M. J. and Podvin, A. "Shared Resource Multiprocessing", IEEE Computer, Vol. 5, No. 2, March/April 1972, pp.20-28.
[70]
Flynn, M. J. "Some Computer Organizations and Their Effectiveness", IEEE Transactions on Computers, Vol. C-21, No. 9, Sept. 1972, pp.948-960.
[71]
Foster, C. C. Computer Architecture, Van Nostrand Reinhold Co., 1970.
[72]
Freeman, D. N. "IBM and Multiprocessing", Datamation, March 1976, pp.92-109.
[73]
Fuller, R. H., and Bird, R. M. "An Associative Parallel Processor with Application to Picture Processing", Proceedings AFIPS Fall Joint Computer Conference, 1965, pp.105-116.
[74]
Fuller, R. H. "Associative Parallel Processing", Proceedings AFIPS Spring Joint Computer Conference, 1967, pp.471-475.
[75]
Fuller, S. H., Siewiorek, D. P., and Swan, R. J. "Computer Modules: An Architecture for Large Digital Modules", Proceedings 1st Annual Symposium on Computer Architecture, Dec. 1973, Gainesville, FL, pp.231-237.
[76]
Fuller, S. H. and Olenick, P. N. "Initial Measurements of Parallel Programs on Multi-Miniprocessor", 13th IEEE Computing Society International Conference, Washington, DC, Sept. 1976.
[77]
Fuller, S. H., Jones, A. K. and Durham, L., (Eds.) "CM* Review, June 1977", Technical Report, Department of Computing Science, Carnegie-Mellon University, Pittsburg, PA, June 1977.
[78]
Fuller, S. H., Ousterhout, J. K., Raskin, L., Rubinfeld, P. I ., Sindhu, P. J. and Swan, R. J. "Multi-Microprocessors: An Overview and Working Example", IEEE Proceedings, Vol. 66, No. 2, Feb. 1978, pp.216-228.
[79]
Fulmer, L. C., and Meilander, W. C. "A Modular Plated-Wire Associative Processor", Proceedings IEEE International Computer Group Conference, 1970, pp. 325-335.
[80]
Gaines, R. S., and Lee, C. Y. "An Improved Cell Memory", IEEE Transactions on Electronic Computers, Feb. 1965, pp.72-75.
[81]
Goldberg, J. "New Problems in Fault-Tolerant Computing", International Symposium Fault-Tolerant Computing, Jan. 1975, pp.29-34.
[82]
Gonzalez, M. J. "SIMDA Overview", Proceedings 1972 Sagamore Computer Conference on RADCAP and its Applications, August 23-25, 1972, pp.17-28.
[83]
Goodwin, R. J. "A Design for Distributed-Control Multiple Processor Computer System", National Technical Information Service, AD772883, Dec. 1973.
[84]
Gurd, J. and Watson, I. "Data Driven System for High Speed Parallel Computing Part 1: Structuring Software for Parallel Execution", Computer Design, June 1980, pp.91-100.
[85]
Gurd, J. and Watson, I. "Data Driven System for High Speed Parallel Computing - Part 2: Hardware Design", Computer Design, July 1980, pp.97-106.
[86]
Hagiwara, H., Tomita, S., Oyanagi, S. and Shibayama, K. "A Dynamically Microprogrammable Computer with Low Level Parallellism", IEEE Transactions on Computers, Vol. C-29, No. 7, July 1980, pp.577-595.
[87]
Handler, W. "The Impact of Classification Schemes on Computer Architecture", Parallel Processing Symposium, Aug. 1977.
[88]
Hanlon, A. C. "Content-Addressable and Associative Memory Systems: A Survey", IEEE Transactions on Electronic Computers, Aug. 1966, pp.509-521.
[89]
Harris, J. A. and Smith, D. R. "Hierarchical Multiprocessor Organizations", Proceedings 4th Annual Symposium on Computer Architecture, College Park, MD, March 1977, pp.41-48.
[90]
Hauck, E. A., and Dent, B. A. "Burroughs' B6500/B7500 Stack Mechanism", Proceedings AFIPS Spring Joint Computer Conference, 1968, pp.245-251.
[91]
Hawkins, J. K., and Munsey, C. A. "A Parallel Computer Organization and Mechanizations", IEEE Transactions on Electronic Computers, June 1963, pp. 251-262.
[92]
Healy, L. D., et al. "The Architecture of a Context Addressed Segment-Sequential Storage", Proceedings AFIPS Fall Joint Computer Conference, 1972, pp.691-701.
[93]
Heart, F. E., Ornstein, S. M., Crowther, W. R., and Barker, W. B. "A New Minicomputer/Multiprocessor for the ARPA Network", Proceedings AFIPS National Computer Conference, Vol. 42, June 1973, pp.529-537.
[94]
Heart, F. E., Kahn, R. E., Ornstein, S. M., Crowther, W. R., and Walden, D. C. "The Interface Message Processor for the ARPA Computer Network", Proceedings AFIPS Fall Joint Computer Conference, 1970, pp.551-567.
[95]
Heart, F. E., Ornstein, S. M., Crowther, W. R., Barker, W. B., Kraley, M. F., Bressler, R. D. and Michel, A. "The PLURIBUS Multiprocessor System", Multiprocessor Systems, Infotech, Maidenhead, Berkshire, England, 1976, pp.307-330.
[96]
Higbie, L. C. "The OMEN Computers: Associative Array Processors", IEEE Computer Society International Conference, 1972, pp.287-290.
[97]
Higbie, L. C. "Supercomputer Architecture", IEEE Computer, Dec. 1973, pp.48-58.
[98]
Hintz, R. G., and Tate, D. P. "Control Data STAR-100 Processor Design", Digest of Papers, 6th Annual IEEE Computer Society International Conference, 1972, pp.1-7.
[99]
Hirschman, A. D., Ali, G. and Swan, R. "Standard Modules Offer Flexible Multiprocessor System Design", Computer Design, May 1979, pp.181-189.
[100]
Hobbs, L. C.; and Theis, D. J. "Survey of Parallel Processor Approaches and Techniques", Parallel Processor Systems, Technologies, and Applications, L. C. Hobbs, et al. (Eds.) Spartan Books, New York, 1970, pp.3-20.
[101]
Holland, J. H. "A Universal Computer Capable of Executing an Arbitrary Number of Sub-Programs Simultaneously", Proceedings AFIPS Fall Joint Computer Conference, 1959, pp.108-113.
[102]
Hollander, G. L. "Architecture for Large Computing Systems", Proceedings AFIPS Spring Joint Computer Conference, 1967, pp.463-466.
[103]
Hufnagel, S. P. "Comparison of Selected Array Processor Architectures", Computer Design, March 1979, pp.151-158.
[104]
IBM, "IBM System/360 and System/370 Attached Support Processor Version 3 Asymmetical Multiprocessor System: General Information Manual", GH20-1173.
[105]
Ibbett, R. N. "The MU5 Instruction Pipeline ", The Computer Journal, Vol. 15, No. 1, Feb. 1972, pp.42-50.
[106]
Ibbett, R. N. and Capon, P. C. "The Development of the MU5 Computer System,", Communications of the ACM, Jan. 1978, Vol. 21, No. 1, pp.13-24.
[107]
Jensen, E. D. "Mixed-Mode and Multidimensional Memories", IEEE Computer Society International Conference, 1972, pp.287-290.
[108]
Jensen, E. D. "A Distributed Function Computer for Real-Time Control" Proceedings 2nd Annual Symposium on Computer Architecture, Jan. 1975, Houston, TX, pp.176-182.
[109]
Jensen, E. D., Thurber, K. J., and Schneider, G. M. "A Review of Systematic Methods in Distributed Processor Interconnection", IEEE International Conference on Communications, 1976.
[110]
Jensen, E. D., and Anderson, G. A. "Computer Interconnection Structures: Taxonomy, Characteristics, and Examples", ACM Computing Surveys, Vol. 7, No. 4, Dec. 1977, pp.197-213.
[111]
Jensen, J. E., and Baer, J. L. "A Model of Interference in a Shared Resource Multiprocessor", Proceedings 3rd Annual Symposium on Computer Architecture, Jan. 1976, Clearwater, FL, pp.52-57.
[112]
Johnson, P. M. "An Introduction to Vector Processing", Computer Design, Feb. 1978, pp.89-97.
[113]
Jones, A. K., Chansler, R., Jr., Durham, I ., Feiler, P. and Schwans, K. "Software Management of CM* - A Distributed Multiprocessor", Proceedings AFIPS National Computer Conference Vol. 46, 1977, pp.657-663.
[114]
Jones, A. K., Chansler, R., I . Durham, Feiler, P., Scelza, D., Schwans, K. and Vegdahl, S. "Programming Issues Raised by a Multi-Miniprocessor," IEEE Proceedings, Feb. 1978, pp. 229-237.
[115]
Jones, A. K. and Schwarz, P. "Experience Using Multiprocessor Systems - A Status Report", ACM Computing Surveys, Vol. 12, No. 2, June 1980, pp.121-165.
[116]
Juliussen, J. E. and Mowle, F. J. "Multiple Microprocessors with Common Main and Control Memories", IEEE Transactions on Computers, Vol. C-22, No. 11, Nov. 1973, pp.999-1007.
[117]
Katsuki, D., Elsam, E. S., Mann, W. F., Roberts, E. S., Robinson, J. G., Skowronski, F. S., and Wolf, E. W. "PLURIBUS An Operational Fault-Tolerant Multiprocessor", IEEE Proceedings Vol. 66, No. 10, Oct. 1978, pp.1146-1159.
[118]
Katzan, H., Jr. Computer Organization and the System/370, Von Nostrand Reinhold Co., New York, 1971.
[119]
Kautz, W. H. "An Augmented Content-Addressed Memory Array for Implementation with Large-Scale Integration", ACM Journal, Jan. 1971, pp.19-33.
[120]
Kautz, W. H., and Pease, M. C. "Cellular Logic-in-Memory Arrays", National Technical Information Service, AD763701 Nov. 1971.
[121]
Keller, R. M., Lindstrom, G. and Patil, S. "A Loosely Coupled Applicative Multi-Processing System", Proceedings AFIPS National Computer Conference, 1979, pp. 613-622.
[122]
King, W. K. "Design of an Associative Memory", IEEE Transactions on Computers, June 1971, pp.671-674.
[123]
Koczela, L. J. "Study of Spaceborne Multiprocessing", Final Report Phase II, Vol. II, C6-1476.22/23, North American Rockwell Corp., Autonetics Division, Anaheim, CA., May 1968.
[124]
Koczela, L. J. "The Distributed Processor Organization", in Advances in Computers, F. L. Alt and M. Rubinoff (Eds.), Vol. 9, 1968, Academic Press, pp.285-353.
[125]
Kressler, R. R., et al. "Development of an LS Associative Processor", National Technical Information Service, Air Force Report No. AFAL-TR-70-142, Aug. 1970.
[126]
Kropfl, W. J. "An Experimental Data Block Switching, System", Bell System Technical Journal, July/August 1972.
[127]
Lee, C. Y. "Intercommunicating Cells Basis for a Distributed Logic Computer", Proceedings AFIPS Fall Joint Computer Conference, 1962, pp.130-136.
[128]
Lee, C. Y., and Paull, M. C. "A Content-Addressable Distributed Logic Memory with Application to Information Retrieval", IEEE Proceedings, June 1963, pp.924-932.
[129]
Lehman, A. "A Survey of Problems and Preliminary Results Concerning Parallel Processing and Parallel Processors", IEEE Proceedings, Vol. 54, No. 12, Dec. 1966, pp.1889-1901.
[130]
Lewis, G. R., Henry, J. S. and McCune, B. P. "The BTI 8000-Homogeneous, General-Purpose Multiprocessing", Proceedings AFIPS National Computer Conference, 1979, pp.513-528
[131]
Lipovski, G. J. "The Architecture of a Large Distributed Logic Associative Memory", National Technical Information Service AD692195, July 1969.
[132]
Lipovski, G. J. "The Architecture of a Large Associative Processor", Proceedings AFIPS Spring Joint Computer Conference, 1970, pp.385-396.
[133]
Liptay, J. S. "Structural Aspects of the System/360 Model 85-11: The Cache", IBM Systems Journal, Vol. 7, No. 1, 1968, pp.15-21.
[134]
Lorin, H. Parallelism in Hardware and Software: Real and Apparent Concurrency, Prentice -Hall, Englewood Cliffs, NJ, 1972.
[135]
Lougheed, R. M. and McCubbrey, D. L. "The Cytocomputer: A Practical Pipelined Image Processor", Proceedings 7th Annual Symposium on Computer Architecture, May, 1980, La Baule, France, pp.271-277.
[136]
Love, H. H., and Savitt, D. A. "An Iterative-Cell Processor for the ASP Language", Associative Information Techniques, E. L. Jacks (Ed.), American Elsevier, New York, 1971, pp.147-172.
[137]
Maekawa, M., Yamazaki, I ., Maeda, A., Miyata, M., Kamiya, S., Kasai, H. "Experimental Polyprocessor System (EPOS)- Architecture ", Proceedings 6th Annual Symposium on Computer Architecture, April, 1979, Philadelphia, PA, pp.188-195.
[138]
Maekawa, M., Yamazaki, I ., Tanaka, A., Nakamura, A., Ishida, K. "Experimental Polyprocessor System (EPOS) Operating System", Proceedings 6th Annual Symposium on Computer Architecture, April 1979, Philadelphia, PA, pp.196-201.
[139]
McCormick, B. H. "The Illinois Pattern Recognition Computer ILLIAC III ", IEEE Transactions on Computers, Dec. 1963, pp.791-813.
[140]
McCormick, B. H., and Divilbiss, J. L. Tentative Logical Realization of a Pattern Recognition Computer, Report No.4031, Digital Computer Lab, University of Illinois, 1969.
[141]
McKay, D. B., and Karp, D. P. "IBM Computer Network/440", Computer Networks - Proceedings Courant Institute Symposium, Nov. 1970.
[142]
McKenzie, A. A., Cosell, B. P., McQuillan, J. M. and Thorpe, M. J. "The Network Control Center for the ARPA Network", Proceedings 1st International Conference Computer Communication, Washington, DC, Oct. 1972, pp.185-191.
[143]
McMillen, R. J. and Siegel, H. J. "MIMD Machine Communication Using the Augmented Data Manipulator Network", Proceedings 7th Annual Symposium on Computer Architecture, May, 1980, May 6-8, 1980, La Baule, France, pp.51-60.
[144]
Miller, J. S., Lickly, D. J., Kosmala, A. L., and Saponaro, J. A. "Multiprocessor Computer System Study", National Technical Information Service, N70-41238, March 1970.
[145]
Minker, J. "An Overview of Associative Memory or Content-Addressable Memory Systems and a KWIC Index to the Literature : 1956-1970", ACM Computing Reviews, Oct. 1971, pp.453-504.
[146]
MinKer, J. "Associative Memories and Processors: A Description and Appraisal", Technical Report TR-195, University of Maryland, July 1972.
[147]
Minsky, M., and Papert, S. "On Some Associative, Parallel and Analog Computations", Associative Information Techniques, E. J. Jacks (Ed.), American Elsevier, New York, 1971.
[148]
MinsKy, N. "Rotating Storage Devices as Partially Associative Memories", Proceedings AFIPS Fall Joint Computer Conference, 1972, pp.587-595.
[149]
Mukhopadhyay, A. "Survey on Macrocellular Research", Technical Report on NSF Grant GJ-723, University of Iowa, Dec. 1972.
[150]
Murtha, J. C., and Beadles, R. L. Survey of the Highly Parallel Information Processing Systems, Office of Naval Research Report No. 4755, Nov. 1964.
[151]
Murtha, J. C. "Highly Parallel Information Processing Systems", Advances in Computers, Academic Press, New York, 1966.
[152]
Nishikawa, S., Sato, M. and Murakami, K. "Interconnection Unit for Poly-Processor System: Analysis and Design", Proceedings 5th Annual Symposium on Computer Architecture, April 1978, Palo Alto, CA, pp.216-222.
[153]
Noguchi, K., Ohnishi, I ., and Morita, H. "Design Considerations for a Heterogeneous Tightly-Coupled Multiprocessor System", Proceedings AFIPS National Computer Conference, 1975, pp.561-565.
[154]
Nuspl, S. J., and dohnson, M. O. "The Effect of I/O Characteristics on the Performance of a Parallel Processor", IEEE International Computer Society Conference Digest, Sept. 22-24, 1971, pp.127-128.
[155]
Organick, E. I. Computer System Organization, the B5700/B6700 Series, Academic Press, New York, 1974.
[156]
Ornstein, S. M., Heart, F. E., Crowther, W. R., Russell, S. B., Rising, H. K. and Michel, A. "The Terminal IMP for the ARPA Computer Network", Proceedings AFIPS Spring Joint Computer Conference, May 1972, pp.243-254.
[157]
Ornstein, S. M., Crowther, W. R., Kraley, M. F., Bressler, R. D., Michel, A. and Heart, F. E. "PLURIBUS A Reliable Multiprocessor", Proceedings AFIPS National Computer Conference, Vol. 44, May 1975, pp.551-559.
[158]
Ornstein, S. M. and Walden, D. C. "The Evolution of a High Performance Modular Packet-Switch", International Conference on Communications, Vol. 1, June 1975, pp.6-17 to 6-21.
[159]
Parhami, B. "Associative Memories and Processors: An Overview and Selected Bibliography", IEEE Proceedings, June 1973, pp.722-730.
[160]
Pierce, J. R. "Network for Block Switching of Data", Bell System Technical Journal, July/August 1972.
[161]
Ramamoorthy, C. V., and Li, H. F. "Pipeline Architecture", ACM Computing Surveys, March 1977, pp.61-102.
[162]
Ramseyer, R. R. and van Dam, A. "A Multi-Microprocessor Implementation of a General Purpose Pipelined CPU", Proceedings 4th Annual Symposium on Computer Architecture, College Park, MD, March 1977, pp.29-34.
[163]
Reigel. E. W. Faber. I. and Fisher, D. "The Interpreter A Micro-programmable Building Block System", Proceedings AFIPS Spring Joint Computer Conference, 1972, pp.705-723.
[164]
Rein, T. "Computers in the 1980's Trends in Hardware Technology", Information Processing 74, Proceedings IFIP Congress, 1974, pp.137-140.
[165]
Rohrbacher, D. L. "Advanced Computer Organization Study", National Technical Information Service, AD631870 and AD6313871, April 1966.
[166]
Russell, R. M. "The CRAY-1 Computer System", Communications of the ACM, Jan. 1978, Vol. 21, No. 1, pp.63-72.
[167]
Rustin, R., (Ed.) Computer Networks - Proceedings Courant Institute Symposium, Nov. 1970, Prentice-Hall, Englewood Cliffs, N.J., 1972.
[168]
Savit, D. A., et al. "Association-Storing Processor Study", National Technical Information Service, AD488538, June 1966.
[169]
Scelza, D. The CM* Host User Manual, Department of Computer Science, Carnegie-Mellon University, Pittsburgh, PA, July 1977.
[170]
Seeber, R. R., and Lindquist, A. B. "Associative Logic for Highly Parallel Systems", Proceedings AFIP Fall Joint Computer Conference, 1963, pp.489-493.
[171]
Shooman, W. "Parallel Computing with Vertical Data", 1960 Eastern Joint Computer Conference, pp.111-115.
[172]
Shore, J. E. "Second Thoughts on Parallel Processing", Computing and Electrical Engineering, Vol. 1, Pergamon Press, Oxford, England, June 1973, pp.95-109.
[173]
Siegel, H. J. "The Universality of Various Types of SIMD Machine Interconnection Networks", Proceedings 4th Annual Symposium on Computer Architecture, College Park, MD, March 1977, pp.70-79.
[174]
Siewiorek, D. P. "Modularity and Multi-Microprocessor Structures", Proceedings Seventh Annual Workshop on Microprogramming, Oct. 1974, pp.186-193.
[175]
Slade, A. E., and McMahon, H. O. "A Cryotron Catalog Memory System", 1956 Eastern Joint Computer Conference, pp.115-120.
[176]
Slotnick, D. L., et al. "The SOLOMON Computer", Proceedings AFIPS Fall Joint Computer Conference, Dec. 1962, pp.97-107.
[177]
Slotnick, D. L. "Unconventional Systems", Proceedings AFIPS Spring Joint Computer Conference, 1967, pp.477-481.
[178]
Squire, J. S., and Paleis, S.M. "Programming and Design Considerations of a Highly Parallel Computer", Proceedings AFIPS Spring Joint Computer Conference, 1963, pp.395-400.
[179]
Stone, H. S. "Associative Processing for General Purpose Computers Through the Use of Modified Memories", Proceedings AFIPS Fall Joint Computer Conference, 1968, pp.949-955.
[180]
Stone, H. S. "Parallel Processing with the Perfect Shuffle", IEEE Transactions on Computers, Vol. C-20, Feb. 1971, pp.153-161.
[181]
Sturman, J. N. "Alteratively Structured General-Purpose Digital Computer", IEEE Transactions on Computers, Jan. 1968, pp.2-9.
[182]
Sullivan, H. and Bashkow, T. R. "A Large Scale Homogeneous, Fully Distributed Parallel Machine, I", Proceedings 4th Annual Symposium on Computer Architecture, College Park, MD, March 1977 pp.105-117.
[183]
Sullivan, H., Bashkow, T. R. and Klappholz, D. "A Large Scale Homogeneous, Fully Distributed Parallel Machine, II", Proceedings 4th Annual Symposium on Computer Architecture, College Park, MD, March 1977, pp.118-124.
[184]
Swan, R. J., Fuller, S. H. and Siewiorek, D. P. "CM* - A Modular, Multi-Microprocessor", Proceedings AFIPS National Computer Conference Vol. 46, 1977, pp.637-644.
[185]
Swan, R. J., Bechtolsheim, A., Lai, K. W. and Ousterhout, J. K. "The Implementation of the CM* Multiprocessor" Proceedings AFIPS National Computer Conference, Vol. 46, 1977, pp.645-655.
[186]
Syre, J. C., (Ed.) Proceedings 1st European Conference on Parallel and Distributed Processing, Toulouse, France, Feb. 1979, 266 pp.
[187]
TANDEM 16 System Introduction, Tandem Computers, Cupertino, CA, 95014, 1977.
[188]
Texas Instruments Inc. A Description of the Advanced Scientific Computer System, Equipment Group, Texas Instruments, Inc., Austin, TX, 1973.
[189]
Thornton, J. E. Design of a Computer: The CDC 6600, Scott, Foresman & Co., Glenview, IL, 1970.
[190]
Thurber, K. J., and Berg, R. O. "Applications of Associative Processors", Computer Design, Nov. 1971, pp. 103-110.
[191]
Thurber, K. J., and Patton, P. C. "Hardware Floating Point Arithmetic on an Associative Processor" IEEE Computer Society International Conference, 1972, pp.275-278.
[192]
Thurber, K. J., densen, E. D., Jack, L. A., Kinney, L. L., Patton, P. E., and Anderson, L. C. "A Systematic Approach to the Design of Digital Bussing Structures", Proceedings AFIPS Fall Joint Computer Conference, 1972, pp.719-740.
[193]
Thurber, K. J., and Patton, P. C. "The Future of Parallel Processing", IEEE Transactions on Computers, Dec. 1973, pp.1140-1143.
[194]
Thurber, K. J. "Interconnection Networks - A Survey and Assessment", Proceedings AFIPS National Computer Conference, 1974, pp.909-919.
[195]
Thurber, K. J. "Parallel Processor Architectures Part I: General Purpose Systems", Computer Design, Jan. 1979, pp.89-97.
[196]
Tokoro, M., Tamaru, K. Mizuno, M. and Hori, M. "A High Level Multi-Lingual Multiprocessor KMP/II", Proceedings 7th Annual Symposium on Computer Architecture, La Baule, France, May, 1980, pp.325-333.
[197]
Unger, S. H. "A Computer Oriented Toward Spatial Problems", IRE Proceedings, Oct. 1958, pp. 1744-1750.
[198]
Wald, L. D., and Anderson, G.A. "Associative Memory for Multiprocessor Control", Final Report NAS 12-2087, Sept. 1971.
[199]
Wald, L. D. "An Associative Memory Using Large-Scale Integration", NAECON '70, IEEE, New York, 1970. pp.277-281.
[200]
Watson, W. J., and Carr, H. J. "Experiences with the TI Advanced Scientific Computer", Proceedings AFIPS National Computer Conference, 1974, pp.389-392.
[201]
West, L. P. "Loop-Transmission Control Structures", IEEE Transactions on Communications, June 1972.
[202]
Westinghouse. "Multiple Processing Techniques", National Technical Information Service, AD602693, June 1964.
[203]
Withington, F. G. "Beyond 1984: A Technology Forecast", Datamation, Jan. 1975, pp.54-73.
[204]
Wulf, W. A., and Bell, C. G. "C.mmp - A Multi-Mini-Processor", Proceedings AFIPS Fall Joint Computer Conference, 1972, pp.765-777.

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cover image ACM Conferences
ACM '80: Proceedings of the ACM 1980 annual conference
January 1980
539 pages
ISBN:0897910281
DOI:10.1145/800176
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