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Coarse grain reconfigurable architecture (embedded tutorial)

Author:

Reiner HartensteinAuthors Info & Claims

ASP-DAC '01: Proceedings of the 2001 Asia and South Pacific Design Automation Conference

Pages 564 - 570

https://doi.org/10.1145/370155.370535

Published: 30 January 2001 Publication History

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Abstract

The paper gives a brief survey over a decade of R&D on coarse grain reconfigurable hardware and related compilation techniques and points out its significance to the emerging discipline of reconfigurable computing.

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ASP-DAC '01: Proceedings of the 2001 Asia and South Pacific Design Automation Conference

January 2001

662 pages

ISBN:0780366344

DOI:10.1145/370155

Chairman:
Satoshi Goto
NEC Corp., Kawasaki, Japan

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 30 January 2001

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Lu LLiang Y(2022)Morphling: A Reconfigurable Architecture for Tensor ComputationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.313532241:11(4733-4746)Online publication date: Nov-2022
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