research-article

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore

ACM Transactions on Embedded Computing Systems (TECS), Volume 15, Issue 3

Article No.: 53, Pages 1 - 27

https://doi.org/10.1145/2910589

Published: 23 May 2016 Publication History

Abstract

The EC project parMERASA (Multicore Execution of Parallelized Hard Real-Time Applications Supporting Analyzability) investigated timing-analyzable parallel hard real-time applications running on a predictable multicore processor. A pattern-supported parallelization approach was developed to ease sequential to parallel program transformation based on parallel design patterns that are timing analyzable. The parallelization approach was applied to parallelize the following industrial hard real-time programs: 3D path planning and stereo navigation algorithms (Honeywell International s.r.o.), control algorithm for a dynamic compaction machine (BAUER Maschinen GmbH), and a diesel engine management system (DENSO AUTOMOTIVE Deutschland GmbH). This article focuses on the parallelization approach, experiences during parallelization with the applications, and quantitative results reached by simulation, by static WCET analysis with the OTAWA tool, and by measurement-based WCET analysis with the RapiTime tool.

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Cited By

Pujol RJorba JTabani HKosmidis LMezzetti EAbella JCazorla F(2023)Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time SystemsACM Transactions on Embedded Computing Systems10.1145/356105422:2(1-26)Online publication date: 24-Jan-2023
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Hapka RChristmann AErnst RKuzolap AHecker PRockschies MHalle MThielecke F(2023)Safe Usage of Multi-Cores in Neural Network Avionics Applications2023 IEEE/AIAA 42nd Digital Avionics Systems Conference (DASC)10.1109/DASC58513.2023.10311131(1-9)Online publication date: 1-Oct-2023
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Index Terms

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore
1. Computer systems organization
2. Hardware
  1. Electronic design automation
    1. Timing analysis
      1. Static timing analysis

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 15, Issue 3

July 2016

520 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2899033

Editor:
Sandeep K. Shukla
Indian Institute of Technology, India

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Copyright © 2016 ACM.

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Publication History

Published: 23 May 2016

Accepted: 01 January 2016

Revised: 01 January 2016

Received: 01 January 2015

Published in TECS Volume 15, Issue 3

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Pujol RJorba JTabani HKosmidis LMezzetti EAbella JCazorla F(2023)Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time SystemsACM Transactions on Embedded Computing Systems10.1145/356105422:2(1-26)Online publication date: 24-Jan-2023
https://dl.acm.org/doi/10.1145/3561054
Pujol RHassan MTabani HAbella JCazorla FHong JLanperne MPark JCerny TShahriar H(2023)Tracking Coherence-Related Contention Delays in Real-Time Multicore SystemsProceedings of the 38th ACM/SIGAPP Symposium on Applied Computing10.1145/3555776.3577631(461-470)Online publication date: 27-Mar-2023
https://dl.acm.org/doi/10.1145/3555776.3577631
Hapka RChristmann AErnst RKuzolap AHecker PRockschies MHalle MThielecke F(2023)Safe Usage of Multi-Cores in Neural Network Avionics Applications2023 IEEE/AIAA 42nd Digital Avionics Systems Conference (DASC)10.1109/DASC58513.2023.10311131(1-9)Online publication date: 1-Oct-2023
https://doi.org/10.1109/DASC58513.2023.10311131
Hapka RChristmann AErnst R(2022)Controlling High-Performance Platform Uncertainties with Timing Diversity2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)10.1109/RTCSA55878.2022.00029(212-219)Online publication date: Aug-2022
https://doi.org/10.1109/RTCSA55878.2022.00029
Joshi ARamasubramanian N(2021)Performance improvement and analysis of snoopy cache coherence based multicore architecturesInternational Journal of System Assurance Engineering and Management10.1007/s13198-021-01177-w14:S3(848-864)Online publication date: 24-Jun-2021
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Cerrolaza JObermaisser RAbella JCazorla FGrüttner KAgirre IAhmadian HAllende I(2020)Multi-core Devices for Safety-critical SystemsACM Computing Surveys10.1145/339866553:4(1-38)Online publication date: 3-Aug-2020
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Metzger PCole MFensch CAldinucci MBini E(2020)Enforcing Deadlines for Skeleton-based Parallel Programming2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)10.1109/RTAS48715.2020.000-7(188-199)Online publication date: Apr-2020
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Bonci ALonghi SNabissi GScala G(2020)Execution Time of Optimal Controls in Hard Real Time, a Minimal Execution Time Solution for Nonlinear SDREIEEE Access10.1109/ACCESS.2020.30197768(158008-158025)Online publication date: 2020
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Hahn SReineke J(2020)Design and analysis of SIC: a provably timing-predictable pipelined processor coreReal-Time Systems10.1007/s11241-019-09341-z56:2(207-245)Online publication date: 1-Apr-2020
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Jahić JAli KChatrangoon MJahani N(2019)(Dis)Advantages of Lock-free Synchronization Mechanisms for Multicore Embedded SystemsWorkshop Proceedings of the 48th International Conference on Parallel Processing10.1145/3339186.3339191(1-8)Online publication date: 5-Aug-2019
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Affiliations

Theo Ungerer

University of Augsburg, Augsburg, Germany

Christian Bradatsch

University of Augsburg, Augsburg, Germany

Martin Frieb

University of Augsburg, Augsburg, Germany

Florian Kluge

University of Augsburg, Augsburg, Germany

Jörg Mische

University of Augsburg, Augsburg, Germany

Alexander Stegmeier

University of Augsburg, Augsburg, Germany

Ralf Jahr

University of Augsburg, Augsburg, Germany

Mike Gerdes

University of Augsburg

Pavel Zaykov

Honeywell International s.r.o., Brno, Czech Republic

Lucie Matusova

Honeywell International s.r.o., Brno, Czech Republic

Zai Jian Jia Li

Honeywell International s.r.o., Brno, Czech Republic

Zlatko Petrov

Honeywell EOOD, Sofia, Bulgaria

Bert Böddeker

DENSO AUTOMOTIVE Deutschland GmbH, Eching, Germany

Sebastian Kehr

DENSO AUTOMOTIVE Deutschland GmbH, Eching, Germany

Hans Regler

BAUER Maschinen GmbH, Schrobenhausen, Germany

Andreas Hugl

BAUER Maschinen GmbH, Schrobenhausen, Germany

Christine Rochange

Université Paul Sabatier, Toulouse, France

Haluk Ozaktas

Université Paul Sabatier, Toulouse, France

Hugues Cassé

Université Paul Sabatier, Toulouse, France

Armelle Bonenfant

Université Paul Sabatier, Toulouse, France

Pascal Sainrat

Université Paul Sabatier, Toulouse, France

Nick Lay

Rapita Systems Ltd, York, UK

David George

Rapita Systems Ltd, York, UK

Ian Broster

Rapita Systems Ltd, York, UK

Eduardo Quiñones

Barcelona Supercomputing Center, Barcelona, Spain

Milos Panic

Barcelona Supercomputing Center, Barcelona, Spain

Jaume Abella

Barcelona Supercomputing Center, Barcelona, Spain

Carles Hernandez

Barcelona Supercomputing Center, Barcelona, Spain

Francisco Cazorla

Barcelona Supercomputing Center, Barcelona, Spain

Sascha Uhrig

Technical University of Dortmund, Dortmund, Germany

Mathias Rohde

Technical University of Dortmund, Dortmund, Germany

Arthur Pyka

Technical University of Dortmund, Dortmund, Germany

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