Nothing Special   »   [go: up one dir, main page]

skip to main content
research-article

The structural simulation toolkit

Published: 29 March 2011 Publication History

Abstract

As supercomputers grow, understanding their behavior and performance has become increasingly challenging. New hurdles in scalability, programmability, power consumption, reliability, cost, and cooling are emerging, along with new technologies such as 3D integration, GP-GPUs, silicon-photonics, and other "game changers". Currently, they HPC community lacks a unified toolset to evaluate these technologies and design for these challenges.
To address this problem, a number of institutions have joined together to create the Structural Simulation Toolkit (SST), an open, modular, parallel, multi-criteria, multi-scale simulation framework. The SST includes a number of processor, memory, and network models. The SST has been used in a variety of network, memory, and application studies and aims to become the standard simulation framework for designing and procuring HPC systems.

References

[1]
BOOST C++ Libraries. http://www.boost.org.
[2]
Mantevo Project Home Page. https://software.sandia.gov/mantevo/.
[3]
Annual energy review 2007. DOE/EIA-0384(2007).
[4]
HPC challenge awards competition. April 2010.
[5]
W. Alkohlani et al. Extending the Monte Carlo Processor Modeling Technique: Statistical Performance Models of the Niagara 2 Processor. ICPP, 2010.
[6]
L.-S. P. Andrew Kahng, Bin Li and K. Samadi. Orion 2.0: A fast and accurate noc power and area model for early-stage design space exploration. DATE, 2009.
[7]
F. Bellard. Qemu, a fast and portable dynamic translator. USENIX Ann. Tech. Conf., 41--41, 2005.
[8]
N. L. Binkert et al. The m5 simulator: Modeling networked systems. IEEE Micro, 26:52--60, 2006.
[9]
D. Brooks et al. Wattch: A framework for architectural-level power analysis and optimizations. 27th Ann. Int. Sym. Computer Architecture, 2000.
[10]
J. S. Bucy, J. Schindler, S. W. Schlosser, and G. R. Ganger. The disksim simulation environment version 4.0 reference manual. CMU-PDL-08-101, CMU, 2008.
[11]
D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0. SimpleScalar LLC.
[12]
B. Cmelik and D. Keppel. Shade: a fast instruction-set simulator for execution profiling. ACM SIGMETRICS, 128--137, 1994.
[13]
Department of Energy. Advanced architectures and critical technologies for exascale computing. Funding Opp. DE-FOA-0000255, 2010.
[14]
K. Devine, et al. Zoltan data management services for parallel dynamic applications. Computing in Science and Engineering, 4(2):90--97, 2002.
[15]
Systems Resiliance at Extreme Scale. DARPA, 2009.
[16]
R. Fujimoto. Parallel discrete event simulation. 21st Conf. on Winter simulation, 19--28, 1989.
[17]
T. Henderson et al. ns-3 project goals.
[18]
W. Huang et al. Differentiating the roles of ir measurement and simulation for power and temperature-aware design. IEEE Int. Symp. Performance Analysis of Systems and Software, 2009.
[19]
M. T. Inc. Calculating memory system power for ddr2. Technical Report TN-47-04, 2005.
[20]
D. Jensen and A. Rodrigues. Embedded systems and exascale computing. Computing in Science And Engineering, 2010. Accepted for Publication.
[21]
P. M. E. Kogge. ExaScale Computing Study: Technology Challenges in Achieving Exascale Systems. TR-2008-13 U. Notre Dame CSE, September, 2008.
[22]
N. B. Lakshminarayana and H. Kim. Effect of instruction fetch and memory scheduling on gpu performance. HPCA/PPoPP, 2010.
[23]
S. Li et al. McPAT: An Integrated Power, Area, and Timing Modeling Framework for Multicore and Manycore Architectures. 42nd Ann. IEEE/ACM Int. Sym. Microarchitecture, 469--480, 2009.
[24]
G. Loh, et al. ISPASS, 53--64, 2009.
[25]
G. H. Loh, et al. Zesto: A cycle-level simulator for highly detailed microarchitecture exploration. Int. Sym. Perf. Analysis of Systems and Software, 2009.
[26]
Motorola mpc7400 powerpc microprocessors. 2005.
[27]
D. Nellans, V. K. Kadaru, and E. Brunv. Asiman asynchronous architectural level simulator abstract.
[28]
D. A. Patterson et al. A case for redundant arrays of inexpensive disks (raid). ACM SIGMOD Int. Conf. Management of Data, 109--116, 1988.
[29]
A. Rodrigues. Gossamer simulator design document. T2005-10, U. Notre Dame, CSE, 2005.
[30]
P. Rosenfeld et al. Dramsim2. http://www.ece.umd.edu/dramsim/, July 2010.
[31]
Sandia National Laboratories. MultiThreaded Graph Library. https://software.sandia.gov/trac/mtgl.
[32]
V. E. Sarkar. Exascale Software Study. DARPA, 2009.
[33]
J. Schindler and G. Ganger. Automated disk drive characterization. CMU-CS-99-176, CS, CMU, 1999.
[34]
R. Srinivasan, J. Cook, and O. Lubeck. Performance Modeling Using Monte Carlo Simulation. IEEE Computer Architecture Letters, 5(1), 2006.
[35]
R. Srinivasan, J. Cook, and O. Lubeck. Ultra-fast cpu performance prediction: Extending the monte carlo approach. IEEE Int. Sym. Computer Architecture and High Performance Computing, 2006.
[36]
N. Talagala, R. H. Dusseau, and D. Patterson. Microbenchmark-based extraction of local and global disk characteristics. CSD-99-1063, UC Berkeley, 2000.
[37]
D. T. S. Thoziyoor, D. Tarjan, and S. Thoziyoor. Cacti 4.0. Technical report, 2006.
[38]
K. Underwood et al. Simulating red storm: Challenges and successes in building a system simulation. IPDPS, 2007.
[39]
U. Michigan. The SimpleScalar-Arm Power Modeling Project. http://www.eecs.umich.edu/ panalyzer/.

Cited By

View all
  • (2025)Survey of CPU and memory simulators in computer architecture: A comprehensive analysis including compiler integration and emerging technology applicationsSimulation Modelling Practice and Theory10.1016/j.simpat.2024.103032138(103032)Online publication date: Jan-2025
  • (2024)A Hybrid Machine Learning Method for Cross-Platform Performance Prediction of Parallel ApplicationsProceedings of the 53rd International Conference on Parallel Processing10.1145/3673038.3673059(669-678)Online publication date: 12-Aug-2024
  • (2024)Scaling SST for Extreme Scale System SimulationProceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions10.1145/3637543.3654616(87-93)Online publication date: 7-May-2024
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM SIGMETRICS Performance Evaluation Review
ACM SIGMETRICS Performance Evaluation Review  Volume 38, Issue 4
Special issue on the 1st international workshop on performance modeling, benchmarking and simulation of high performance computing systems (PMBS 10)
March 2011
93 pages
ISSN:0163-5999
DOI:10.1145/1964218
Issue’s Table of Contents

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 March 2011
Published in SIGMETRICS Volume 38, Issue 4

Check for updates

Author Tags

  1. SST
  2. architecture
  3. performance analysis
  4. simulation

Qualifiers

  • Research-article

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)177
  • Downloads (Last 6 weeks)9
Reflects downloads up to 21 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2025)Survey of CPU and memory simulators in computer architecture: A comprehensive analysis including compiler integration and emerging technology applicationsSimulation Modelling Practice and Theory10.1016/j.simpat.2024.103032138(103032)Online publication date: Jan-2025
  • (2024)A Hybrid Machine Learning Method for Cross-Platform Performance Prediction of Parallel ApplicationsProceedings of the 53rd International Conference on Parallel Processing10.1145/3673038.3673059(669-678)Online publication date: 12-Aug-2024
  • (2024)Scaling SST for Extreme Scale System SimulationProceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions10.1145/3637543.3654616(87-93)Online publication date: 7-May-2024
  • (2024)PolarStar: Expanding the Horizon of Diameter-3 NetworksProceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3626183.3659975(345-357)Online publication date: 17-Jun-2024
  • (2024)Devastator: A Scalable Parallel Discrete Event Simulation Framework for Modern C++Proceedings of the 38th ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3615979.3656061(35-46)Online publication date: 24-Jun-2024
  • (2024)Learning Generalizable Program and Architecture Representations for Performance ModelingProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC41406.2024.00072(1-15)Online publication date: 17-Nov-2024
  • (2024)LLAMP: Assessing Network Latency Tolerance of HPC Applications with Linear ProgrammingProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC41406.2024.00070(1-18)Online publication date: 17-Nov-2024
  • (2024)MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS61541.2024.00015(48-60)Online publication date: 5-May-2024
  • (2024)NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00073(946-960)Online publication date: 29-Jun-2024
  • (2024)HADES: Hardware-Assisted Distributed Transactions in the Age of Fast Networks and SmartNICs2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00062(785-800)Online publication date: 29-Jun-2024
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media