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VIS Speeds New Media Processing

Published: 01 August 1996 Publication History

Abstract

The Visual Instruction Set (VIS), first introduced with the UltraSPARC-I microprocessor, is described from an Instruction Set Architecture (ISA) standpoint. Besides covering the functionality of each instruction individually, we look at a few widely used algorithms that can be sped up significantly (2-7X) by using VIS. The software environment surrounding VIS is also described.

References

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Published In

cover image IEEE Micro
IEEE Micro  Volume 16, Issue 4
August 1996
75 pages

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 August 1996

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  • (2012)Algorithms and architectures for 2D discrete wavelet transformThe Journal of Supercomputing10.1007/s11227-012-0790-x62:2(1045-1064)Online publication date: 1-Nov-2012
  • (2011)Using Amdahl's law for performance analysis of many-core SoC architectures based on functionally asymmetric processorsProceedings of the 24th international conference on Architecture of computing systems10.5555/1966221.1966227(38-49)Online publication date: 24-Feb-2011
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