Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1109/VLSID.2007.41guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
Article

Architecting Microprocessor Components in 3D Design Space

Published: 06 January 2007 Publication History

Abstract

Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional (3D) chip architectures, with its intrinsic capability to reduce the wire length, is one of the promising solutions to mitigate the interconnect related issues. In this paper we implement a few components of a microprocessor using custom design to show the potential performance and power benefits achievable through 3D integration under thermal constraints. We also introduce a standard cell based 3D design flow which leverages the commercial 2D design tools. Using this design flow we provide performance results of wide range of arithmetic units in 3D, thus introducing a fast method to analyze the performance benefits of 3D designs. In contrast to prior work, which mostly investigates single components of a processor, our work takes multiple components into consideration and the experimental results are promising in terms of delay and power reductions. Complex designs in 3D that have equivalent performance compared to a simple 2D designs is taken for IPC improvement analysis. An IPC improvement of 11% shown for a microprocessor implemented in 2-strata 3D technology.

Cited By

View all
  • (2021)Pioneering chiplet technology and design for the AMD EPYC™ and Ryzen™ processor familiesProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00014(57-70)Online publication date: 14-Jun-2021
  • (2017)Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add UnitsACM SIGARCH Computer Architecture News10.1145/3039902.303991444:4(62-67)Online publication date: 11-Jan-2017
  • (2016)High-performance processor design based on 3D on-chip cacheMicroprocessors & Microsystems10.1016/j.micpro.2016.07.00947:PB(486-490)Online publication date: 1-Nov-2016
  • Show More Cited By

Index Terms

  1. Architecting Microprocessor Components in 3D Design Space

        Recommendations

        Comments

        Please enable JavaScript to view thecomments powered by Disqus.

        Information & Contributors

        Information

        Published In

        cover image Guide Proceedings
        VLSID '07: Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems
        January 2007
        922 pages
        ISBN:0769527620

        Publisher

        IEEE Computer Society

        United States

        Publication History

        Published: 06 January 2007

        Qualifiers

        • Article

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • Downloads (Last 12 months)0
        • Downloads (Last 6 weeks)0
        Reflects downloads up to 14 Dec 2024

        Other Metrics

        Citations

        Cited By

        View all
        • (2021)Pioneering chiplet technology and design for the AMD EPYC™ and Ryzen™ processor familiesProceedings of the 48th Annual International Symposium on Computer Architecture10.1109/ISCA52012.2021.00014(57-70)Online publication date: 14-Jun-2021
        • (2017)Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add UnitsACM SIGARCH Computer Architecture News10.1145/3039902.303991444:4(62-67)Online publication date: 11-Jan-2017
        • (2016)High-performance processor design based on 3D on-chip cacheMicroprocessors & Microsystems10.1016/j.micpro.2016.07.00947:PB(486-490)Online publication date: 1-Nov-2016
        • (2014)Performance evaluation of 3-D stacked 32-bit parallel multipliersACM SIGARCH Computer Architecture News10.1145/2641361.264137641:5(89-94)Online publication date: 18-Jun-2014
        • (2011)Three-dimensional Integrated CircuitsFoundations and Trends in Electronic Design Automation10.1561/10000000165:1–2(1-151)Online publication date: 1-Jan-2011
        • (2011)Layout effects in fine grain 3D integrated regular microprocessor blocksProceedings of the 48th Design Automation Conference10.1145/2024724.2024871(639-644)Online publication date: 5-Jun-2011
        • (2010)CAD reference flow for 3D via-last integrated circuitsProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899762(187-192)Online publication date: 18-Jan-2010
        • (2010)Quantifying and coping with parametric variations in 3D-stacked microarchitecturesProceedings of the 47th Design Automation Conference10.1145/1837274.1837312(144-149)Online publication date: 13-Jun-2010
        • (2010)Cost-aware three-dimensional (3D) many-core multiprocessor designProceedings of the 47th Design Automation Conference10.1145/1837274.1837308(126-131)Online publication date: 13-Jun-2010
        • (2009)Scan-chain design and optimization for three-dimensional integrated circuitsACM Journal on Emerging Technologies in Computing Systems10.1145/1543438.15434425:2(1-26)Online publication date: 16-Jul-2009
        • Show More Cited By

        View Options

        View options

        Media

        Figures

        Other

        Tables

        Share

        Share

        Share this Publication link

        Share on social media