Addressing Early Design-For-Test Synthesis in a Production Environment
Abstract
The maturity of high-level synthesis systems has enabledthe u,se of design-for-test (DFT) methods early inthe design phase. Early DFT synthesis ensures that theprocessing and transformation of multibit register variables,clock-gating, and initialization specifications areconsistent with the high-level specification. Functionaland test logic can be optimized in the same pass withoutthe need for an iterative timing closure procedure.It. allows designers to keep a single design source whilesynthesizing and mapping the logic to multiple technologylibraries. This paper addresses the implementation ofan early DFT synthesis system and presents experimentalresults to compare the early mode insertion approachwith a late-mode approach.
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Published In
November 1997
ISBN:0780342100
Copyright © Copyright (c) 1997 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Publisher
IEEE Computer Society
United States
Publication History
Published: 01 November 1997
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