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A reuse scenario for the VHDL-based hardware design flow

Published: 01 December 1995 Publication History
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References

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Dutt N. et al.: Panel: Design Reuse - Fact or Fiction, 31st Design Automation Conference, San Diego, California, June 1994.
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Findlay EA., Dickinson B., Harris M.: Production of Generic, Synthesisable ASIC Description Using VHDL, VHDL-Forum, 1993.
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Girczyc E., Carlson S.: Increasing Design Quality and Engineering Productivity through Design Reuse, Procedeedings of the 30th Design Automation Conference, Dallas, Texas, June 1993.
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W. Hack, C. Mayer, Supporting Tools for a VHDL Coding Standard; VFE Spring'94, Tremezzo Lago di Como, Italy, April 1994.
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Liggesmeyer, Peter: Modultest und Modulverifikation, (transl. title: Module Test and Module Verification) BI-Wissenschafts-Verlag, 1990, Mannheim, Germany.
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Preis V., Mfirz-R6ssel S.: Aspects of Modeling a Library of Complex and Highly Flexible Components in VHDL, Workshop on Libraries, Componente Modeling, and Quality Assurance, Nantes, France, April 1995.
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Runner J. Scott: Considerations When Implementing a Design Reuse Methodology, Synopsys Methodology Notes, March 1994.
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    cover image ACM Conferences
    EURO-DAC '95/EURO-VHDL '95: Proceedings of the conference on European design automation
    December 1995
    640 pages
    ISBN:0818671564

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    IEEE Computer Society Press

    Washington, DC, United States

    Publication History

    Published: 01 December 1995

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    EuroDAC95: European Design Automation Conference
    September 18 - 22, 1995
    Brighton, England

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    • (2001)A Survey of Digital Design ReuseIEEE Design & Test10.1109/54.92280618:3(98-107)Online publication date: 1-May-2001
    • (1999)The design space layerProceedings of the conference on Design, automation and test in Europe10.1145/307418.307587(131-es)Online publication date: 1-Jan-1999
    • (1999)An efficient reuse system for digital circuit designProceedings of the conference on Design, automation and test in Europe10.1145/307418.307444(9-es)Online publication date: 1-Jan-1999
    • (1998)An object-oriented model for specification, prototyping, implementation and reuseProceedings of the conference on Design, automation and test in Europe10.5555/368058.368157(303-311)Online publication date: 23-Feb-1998
    • (1998)A systematic analysis of reuse strategies for design of electronic circuitsProceedings of the conference on Design, automation and test in Europe10.5555/368058.368152(292-296)Online publication date: 23-Feb-1998
    • (1998)Enhanced reuse and teamwork capabilities for an object-oriented extension of VHDLProceedings of the conference on Design, automation and test in Europe10.5555/368058.368140(250-256)Online publication date: 23-Feb-1998
    • (1997)A Methodology for Hardware Architecture Trade-off at Different Levels of AbstractionProceedings of the 1997 European conference on Design and Test10.5555/787260.787717Online publication date: 17-Mar-1997
    • (1997)Basic concepts for an HDL reverse engineering tool-setProceedings of the 1996 IEEE/ACM international conference on Computer-aided design10.5555/244522.244544(134-141)Online publication date: 1-Jan-1997
    • (1996)Object-oriented hardware modelling—where to apply and what are the objects?Proceedings of the conference on European design automation10.5555/252471.252543(428-433)Online publication date: 20-Sep-1996
    • (1996)A VHDL reuse workbenchProceedings of the conference on European design automation10.5555/252471.252541(412-417)Online publication date: 20-Sep-1996

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