Nothing Special   »   [go: up one dir, main page]

skip to main content
10.5555/2492708.2492848acmconferencesArticle/Chapter ViewAbstractPublication PagesdateConference Proceedingsconference-collections
research-article

FAST-GP: an RTL functional verification framework based on fault simulation on GP-GPUs

Published: 12 March 2012 Publication History

Abstract

This paper presents FAST-GP, a framework for functional verification of RTL designs, which is based on fault injection and parallel simulation on GP-GPUs. Given a fault model, the framework translates the RTL code into an injected C code targeting NVIDIA GPUs, thus allowing a very fast parallel automatic test pattern generation and fault simulation. The paper compares different configurations of the framework to better exploit the architectural characteristics of such GP-GPUs (such as thread synchronization, branch divergence, etc.) by considering the architectural characteristics of the RTL design under verification (i.e., complexity, size, number of injected faults, etc.). Experimental results have been conducted by applying the framework to different designs, in order to prove the methodology effectiveness.

References

[1]
L. Dongwoo and N. Jongwhoa, "A novel simulation fault injection method for dependability analysis," IEEE Design and Test of Computer, vol. 26, no. 6, pp. 50--61, 2009.
[2]
N. Bombieri, F. Fummi, and V. Guarnieri, "Accelerating RTL fault simulation through RTL-to-TLM abstraction," in Proc. of IEEE ETS, 2011, pp. 117--122.
[3]
S. Park, L. Chen, P. K. Parvathala, S. Patil, and I. Pomeranz, "A functional coverage metric for estimating the gate-level fault coverage of functional tests," in Proc. of IEEE ITC, 2006, pp. 1--10.
[4]
Z. Liang, I. Ghosh, and M. Hsiao, "A framework for automatic design validation of RTL circuits using ATPG and observability-enhanced tag coverage," IEEE Trans. on CAD, vol. 25, no. 11, pp. 2526--2538, 2006.
[5]
P. Thaker, V. Agrawal, and M. Zaghloul, "A test evaluation technique for VLSI circuits using register-transfer level fault modeling," IEEE Trans. on CAD, vol. 22, no. 8, pp. 1104--1113, 2003.
[6]
K. Gulati and S. P. Khatri, "Towards acceleration of fault simulation using graphics processing units," in Proc. of ACM/IEEE DAC, 2008, pp. 822--827.
[7]
K. Gulati and S. P. Khatri, "Fault table computation on GPUs," J. Electron. Test., vol. 26, pp. 195--209, April 2010.
[8]
D. Chatterjee, A. DeOrio, and V. Bertacco, "Event-driven gate-level simulation with GP-GPUs," in Proc. of ACM/IEEE DAC, 2009, pp. 557--562.
[9]
NVIDIA, "Cuda home page," http://www.nvidia.com/object/cuda_home_new.html.
[10]
D. Chatterjee, A. DeOrio, and V. Bertacco, "GCS: high-performance gate-level simulation with GP-GPUs," in Proc. of ACM/IEEE DATE, 2009, pp. 1332--1337.
[11]
A. Sen, B. Aksanli, M. Bozkurt, and M. Mert, "Parallel cycle based logic simulation using graphics processing units," in Proc. of IEEE ISPDC, 2010, pp. 71--78.
[12]
M. A. Kochte, M. Schaal, H.-J. Wunderlich, and C. G. Zoellin, "Efficient fault simulation on many-core processors," in Proc. of ACM/IEEE DAC, 2010, pp. 380--385.
[13]
H. Li, D. Xu, Y. Han, K. Cheng, and X. Li, "nGFSIM: A GPU-based fault simulator for 1-to-n detection and its applications," in Proc. of IEEE ITC, 2010, pp. 1--10.
[14]
N. Bombieri, F. Fummi, and G. Pravadelli, "Abstraction of RTL IPs into embedded software," in Proc. of ACM/IEEE DAC, 2010, pp. 24--29.
[15]
M. Nanjundappa, H. D. Patel, B. A. Jose, and S. K. Shukla, "SCGPSim: a fast SystemC simulator on GPUs," in Proc. of ACM/IEEE DAC, 2010, pp. 149--154.
[16]
W. Ecker, V. Esen, L. Schonberg, T. Steininger, M. Velten, and M. Hull, "Impact of description languages, abstraction layer, and value representation on simulation performance," in Proc. of ACM/IEEE DATE, 2007, pp. 767--772.
[17]
CUDA C Programming Guide, NVIDIA, http://developer.download.nvidia.com/compute/cuda/4_0/toolkit/docs/CUDA_C_Programming_Guide.pdf.

Cited By

View all
  • (2014)Safety Evaluation of Automotive Electronics Using Virtual PrototypesProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2602976(1-6)Online publication date: 1-Jun-2014
  • (2013)On the automatic generation of GPU-oriented software applications from RTL IPsProceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis10.5555/2555692.2555704(1-10)Online publication date: 29-Sep-2013
  • (2013)On the use of GP-GPUs for accelerating compute-intensive EDA applicationsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485613(1357-1366)Online publication date: 18-Mar-2013
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences
DATE '12: Proceedings of the Conference on Design, Automation and Test in Europe
March 2012
1690 pages
ISBN:9783981080186

Sponsors

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 12 March 2012

Check for updates

Qualifiers

  • Research-article

Conference

DATE '12
Sponsor:
  • EDAA
  • EDAC
  • SIGDA
  • The Russian Academy of Sciences
DATE '12: Design, Automation and Test in Europe
March 12 - 16, 2012
Dresden, Germany

Acceptance Rates

Overall Acceptance Rate 518 of 1,794 submissions, 29%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)4
  • Downloads (Last 6 weeks)0
Reflects downloads up to 26 Sep 2024

Other Metrics

Citations

Cited By

View all
  • (2014)Safety Evaluation of Automotive Electronics Using Virtual PrototypesProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2602976(1-6)Online publication date: 1-Jun-2014
  • (2013)On the automatic generation of GPU-oriented software applications from RTL IPsProceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis10.5555/2555692.2555704(1-10)Online publication date: 29-Sep-2013
  • (2013)On the use of GP-GPUs for accelerating compute-intensive EDA applicationsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485613(1357-1366)Online publication date: 18-Mar-2013
  • (2012)SystemC simulation on GP-GPUsProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2380445.2380500(343-352)Online publication date: 7-Oct-2012

View Options

Get Access

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media