Article

Accurate layout area and delay modeling for system level design

Authors:

V. ChaiyakulAuthors Info & Claims

ICCAD '92: 1992 IEEE/ACM international conference proceedings on Computer-aided design

Pages 355 - 361

Published: 01 December 1992 Publication History

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Xu MKurdahi F(1996)Layout-driven RTL binding techniques for high-level synthesisProceedings of the 9th international symposium on System synthesis10.5555/524431.857928Online publication date: 6-Nov-1996
https://dl.acm.org/doi/10.5555/524431.857928
Ohm SKurdahi FDutt NXu MPaulin PMavaddat F(1995)A comprehensive estimation technique for high-level synthesisProceedings of the 8th international symposium on System synthesis10.1145/224486.224528(122-127)Online publication date: 13-Sep-1995
https://dl.acm.org/doi/10.1145/224486.224528
Ohm SKurdahi FDutt NJess JRudell R(1994)Comprehensive lower bound estimation from behavioral descriptionsProceedings of the 1994 IEEE/ACM international conference on Computer-aided design10.5555/191326.191401(182-187)Online publication date: 6-Nov-1994
https://dl.acm.org/doi/10.5555/191326.191401

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Accurate layout area and delay modeling for system level design

Recommendations

High-Level System Modeling: Specification and Design Methodologies
Modeling layout tools to derive forward estimates of area and delay at the RTL level

Forward estimates of area and delay facilitate effective decision-making when searching the solution space of digital designs. Current estimation techniques focus on modeling the layout result and fail to deliver timely or accurate estimates. This paper ...
Accurate layout area and delay modeling for system level design
ICCAD '92: Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

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ICCAD '92: 1992 IEEE/ACM international conference proceedings on Computer-aided design

December 1992

664 pages

ISBN:0818630108

Chairman:
Louise Trevillyan
IBM Corp., Yorktown Heights, NY

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 December 1992

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Xu MKurdahi F(1996)Layout-driven RTL binding techniques for high-level synthesisProceedings of the 9th international symposium on System synthesis10.5555/524431.857928Online publication date: 6-Nov-1996
https://dl.acm.org/doi/10.5555/524431.857928
Ohm SKurdahi FDutt NXu MPaulin PMavaddat F(1995)A comprehensive estimation technique for high-level synthesisProceedings of the 8th international symposium on System synthesis10.1145/224486.224528(122-127)Online publication date: 13-Sep-1995
https://dl.acm.org/doi/10.1145/224486.224528
Ohm SKurdahi FDutt NJess JRudell R(1994)Comprehensive lower bound estimation from behavioral descriptionsProceedings of the 1994 IEEE/ACM international conference on Computer-aided design10.5555/191326.191401(182-187)Online publication date: 6-Nov-1994
https://dl.acm.org/doi/10.5555/191326.191401

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High-Level System Modeling: Specification and Design Methodologies

Modeling layout tools to derive forward estimates of area and delay at the RTL level

Accurate layout area and delay modeling for system level design

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