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Architectural support for performance tuning: a case study on the SPARCcenter 2000

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A. J. GoldbergAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 22, Issue 2

Pages 48 - 59

https://doi.org/10.1145/192007.192016

Published: 01 April 1994 Publication History

Abstract

Latency hiding techniques such as multilevel cache hierarchies yield high performance when applications map well onto hierarchy implementations, but performance can suffer drastically when they do not. Identifying and reducing mismatches between an application and the memory hierarchy is difficult without insight into the actual behavior of the hardware implementation. We advocate the use of hardware event counters, as a cheap, effective and practical way to tune applications for a given hardware platform. We take a case study approach, focussing on the counters available on the SPARCcenter 2000, a 20 processor, shared-bus based multiprocessor. We describe the tools we built to relate hardware event counts to user applications and give examples to illustrate how these tools are useful in practice. We conclude with a critique of the current hardware counters, offering a user's perspective on how they could be redesigned to be more effective.

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Cited By

Simon JVieth MWeicker R(2005)Workload analysis of computation intensive tasks: Case study on SPEC CPU95 benchmarksEuro-Par'97 Parallel Processing10.1007/BFb0002841(971-984)Online publication date: 26-Sep-2005
https://doi.org/10.1007/BFb0002841
Zagha MLarson BTurner SItzkowitz MClayton B(1996)Performance analysis using the MIPS R10000 performance countersProceedings of the 1996 ACM/IEEE conference on Supercomputing10.1145/369028.369059(16-es)Online publication date: 17-Nov-1996
https://dl.acm.org/doi/10.1145/369028.369059
Horowitz MMartonosi MMowry TSmith M(1996)Informing memory operationsACM SIGARCH Computer Architecture News10.1145/232974.23300024:2(260-270)Online publication date: 1-May-1996
https://dl.acm.org/doi/10.1145/232974.233000
Show More Cited By

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Architectural support for performance tuning: a case study on the SPARCcenter 2000

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Information & Contributors

Information

Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 22, Issue 2

Special Issue: Proceedings of the 21st annual international symposium on Computer architecture (ISCA '94)

April 1994

386 pages

ISSN:0163-5964

DOI:10.1145/192007

Editor:
Doug DeGroot
Dallas, TX

Issue’s Table of Contents

ISCA '94: Proceedings of the 21st annual international symposium on Computer architecture
April 1994
394 pages
ISBN:0818655100
Chairman:
David A. Patterson
Univ. of California, Berkeley, CA

Copyright © 1994 Copyright is held by the owner/author(s).

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 April 1994

Published in SIGARCH Volume 22, Issue 2

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Cited By

Simon JVieth MWeicker R(2005)Workload analysis of computation intensive tasks: Case study on SPEC CPU95 benchmarksEuro-Par'97 Parallel Processing10.1007/BFb0002841(971-984)Online publication date: 26-Sep-2005
https://doi.org/10.1007/BFb0002841
Zagha MLarson BTurner SItzkowitz MClayton B(1996)Performance analysis using the MIPS R10000 performance countersProceedings of the 1996 ACM/IEEE conference on Supercomputing10.1145/369028.369059(16-es)Online publication date: 17-Nov-1996
https://dl.acm.org/doi/10.1145/369028.369059
Horowitz MMartonosi MMowry TSmith M(1996)Informing memory operationsACM SIGARCH Computer Architecture News10.1145/232974.23300024:2(260-270)Online publication date: 1-May-1996
https://dl.acm.org/doi/10.1145/232974.233000
Horowitz MMartonosi MMowry TSmith MBaer J(1996)Informing memory operationsProceedings of the 23rd annual international symposium on Computer architecture10.1145/232973.233000(260-270)Online publication date: 15-May-1996
https://dl.acm.org/doi/10.1145/232973.233000
Chapin JHerrod ARosenblum MGupta A(1995)Memory system performance of UNIX on CC-NUMA multiprocessorsProceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems10.1145/223587.223588(1-13)Online publication date: 1-May-1995
https://dl.acm.org/doi/10.1145/223587.223588
Chapin JHerrod ARosenblum MGupta A(1995)Memory system performance of UNIX on CC-NUMA multiprocessorsACM SIGMETRICS Performance Evaluation Review10.1145/223586.22358823:1(1-13)Online publication date: 1-May-1995
https://dl.acm.org/doi/10.1145/223586.223588

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