Article

On-chip digital power supply control for system-on-chip applications

Authors:

Maurice Meijer,

José Pineda de Gyvez,

Ralph OttenAuthors Info & Claims

ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and design

Pages 311 - 314

https://doi.org/10.1145/1077603.1077677

Published: 08 August 2005 Publication History

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Abstract

We present an on-chip, fully-digital, power-supply control system. The scheme consists of two independent control loops that regulate power supply variations due to semiconductor process spread, temperature, and chip's workload. Smart power-switches working as linear voltage regulators are used to adjust the local power supply. The smart power-switch allows us to keep the global power network unchanged. It offers an integrated standby mode and has a fast dynamic response, i.e. low transition times between voltage steps at the cost of the reduced power conversion efficiency when compared to complex DC-DC converters

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Cited By

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Beg A(2018)Automating the sizing of transistors in CMOS gates for low-power and high-noise margin operationInternational Journal of Circuit Theory and Applications10.1002/cta.203143:11(1637-1654)Online publication date: 27-Dec-2018
https://dl.acm.org/doi/10.1002/cta.2031
Goossens KAzevedo AChandrasekar KGomony MGoossens SKoedam MLi YMirzoyan DMolnos ANejad ANelson ASinha S(2013)Virtual execution platforms for mixed-time-criticality systemsACM SIGBED Review10.1145/2544350.254435310:3(23-34)Online publication date: 1-Oct-2013
https://dl.acm.org/doi/10.1145/2544350.2544353
Wei-Chih Hsieh Wei Hwang (2011)Adaptive Power Control Technique on Power-Gated CircuitriesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2010.204858719:7(1167-1180)Online publication date: 1-Jul-2011
https://dl.acm.org/doi/10.1109/TVLSI.2010.2048587
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Index Terms

On-chip digital power supply control for system-on-chip applications
1. Hardware
  1. Emerging technologies
  2. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors

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Published In

ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and design

August 2005

400 pages

ISBN:1595931376

DOI:10.1145/1077603

General Chairs:
Kaushik Roy
Purdue University
,
Vivek Tiwari
Intel

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 08 August 2005

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ISLPED05: International Symposium on Low Power Electronics and Design

August 8 - 10, 2005

CA, San Diego, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Beg A(2018)Automating the sizing of transistors in CMOS gates for low-power and high-noise margin operationInternational Journal of Circuit Theory and Applications10.1002/cta.203143:11(1637-1654)Online publication date: 27-Dec-2018
https://dl.acm.org/doi/10.1002/cta.2031
Goossens KAzevedo AChandrasekar KGomony MGoossens SKoedam MLi YMirzoyan DMolnos ANejad ANelson ASinha S(2013)Virtual execution platforms for mixed-time-criticality systemsACM SIGBED Review10.1145/2544350.254435310:3(23-34)Online publication date: 1-Oct-2013
https://dl.acm.org/doi/10.1145/2544350.2544353
Wei-Chih Hsieh Wei Hwang (2011)Adaptive Power Control Technique on Power-Gated CircuitriesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2010.204858719:7(1167-1180)Online publication date: 1-Jul-2011
https://dl.acm.org/doi/10.1109/TVLSI.2010.2048587
Nelson AMoreira OMolnos AStuijk SNguyen BGoossens K(2011)Power Minimisation for Real-Time Dataflow ApplicationsProceedings of the 2011 14th Euromicro Conference on Digital System Design10.1109/DSD.2011.19(117-124)Online publication date: 31-Aug-2011
https://dl.acm.org/doi/10.1109/DSD.2011.19
Ryu JKim K(2011)Adaptive Power Management for Nanoscale SoC DesignCommunication and Networking10.1007/978-3-642-27201-1_49(437-446)Online publication date: 2011
https://doi.org/10.1007/978-3-642-27201-1_49
Tao JGeng ZFan Q(2010)A Digitized Water Display System Based on RS-422 BusProceedings of the 2010 International Conference on Electrical and Control Engineering10.1109/iCECE.2010.18(39-43)Online publication date: 25-Jun-2010
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Goossens KShe DMilutinovic AMolnos A(2010)Composable Dynamic Voltage and Frequency Scaling and Power Management for Dataflow ApplicationsProceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools10.1109/DSD.2010.61(107-114)Online publication date: 1-Sep-2010
https://dl.acm.org/doi/10.1109/DSD.2010.61
Kim KKim Y(2009)A novel adaptive design methodology for minimum leakage power considering PVT variations on nanoscale VLSI systemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200795817:4(517-528)Online publication date: 1-Apr-2009
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Milutinovic AGoossens KSmit G(2009)Dynamic workload peak detection for slack management2009 International Symposium on System-on-Chip10.1109/SOCC.2009.5335679(042-047)Online publication date: Oct-2009
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Bergveld HKaradi RNowak K(2008)An inductive down converter system-in-package for integrated power management in battery-powered applications2008 IEEE Power Electronics Specialists Conference10.1109/PESC.2008.4592470(3335-3341)Online publication date: Jun-2008
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Abstract

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Recommendations

Technology exploration for adaptive power and frequency scaling in 90nm CMOS

A wide supply voltage range and low-power all-digital clock generator

Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor

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