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Simone Erba
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2020 – today
- 2024
- [j6]Lorenzo Piotto
, Guglielmo De Filippi
A 14-32 GHz SiGe-BiCMOS Gilbert-Cell Frequency Doubler With Self-Adjusted Reduced Duty-Cycle Performance Enhancement. IEEE J. Solid State Circuits 59(3): 878-888 (2024) - 2022
- [c12]Lorenzo Piotto
A K-band Gilbert-Cell Frequency Doubler with Self-Adjusted 25% LO Duty-Cycle in SiGe BiCMOS Technology. ESSCIRC 2022: 389-392
2010 – 2019
- 2019
- [j5]Emanuele Depaoli
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS. IEEE J. Solid State Circuits 54(1): 6-17 (2019) - 2018
- [c11]Emanuele Depaoli, Enrico Monaco, Giovanni Steffan, Marco Mazzini, Hongyang Zhang, Walter Audoglio, Oscar Belotti, Augusto Andrea Rossi, Guido Albasini, Massimo Pozzoni, Simone Erba, Andrea Mazzanti:
A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS. ISSCC 2018: 112-114 - [c10]Bo Zhang, Frederic Gianesello, Simone Erba, Mounir Meghelli, Azita Emami, Takayuki Shibasaki:
F5: Advanced optical communication: From devices, circuits, and architectures to algorithms. ISSCC 2018: 514-516 - 2017
- [j4]Enrico Monaco, Gabriele Anzalone, Guido Albasini, Simone Erba, Matteo Bassi
A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI. IEEE J. Solid State Circuits 52(7): 1739-1752 (2017) - [j3]Fabrizio Loi, Enrico Mammei, Simone Erba, Matteo Bassi
A 25mW Highly Linear Continuous-Time FIR Equalizer for 25Gb/s Serial Links in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1903-1913 (2017) - [c9]Simone Erba, Takayuki Shibasaki, Frank O'Mahony:
Session 6 overview: Ultra-high-speed wireline. ISSCC 2017: 108-109 - [c8]Giovanni Steffan, Emanuele Depaoli, Enrico Monaco, Nicolo Sabatino, Walter Audoglio, Augusto Andrea Rossi, Simone Erba, Matteo Bassi, Andrea Mazzanti:
6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI. ISSCC 2017: 116-117 - [c7]Yohan Frans, Ichiro Fujimori, Seung-Jun Bae, Samuel Palermo, Hideyuki Nosaka, Simone Erba:
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond. ISSCC 2017: 512-514 - 2016
- [j2]Matteo Bassi
A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI. IEEE J. Solid State Circuits 51(11): 2702-2715 (2016) - [c6]Gabriele Anzalone, Enrico Monaco, Guido Albasini, Simone Erba, Andrea Mazzanti:
A 0.2-11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS. ESSCIRC 2016: 335-338 - [c5]Matteo Bassi
3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI. ISSCC 2016: 66-67 - [c4]Frank O'Mahony, Simone Erba:
Session 23 overview: Electrical and optical link innovations. ISSCC 2016: 396-397 - 2011
- [c3]Marcello Ganzerli, Luca Larcher
An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation. ISCAS 2011: 189-192 - 2010
- [c2]Massimo Pozzoni, Simone Erba, Davide Sanzogni, Marcello Ganzerli, Paolo Viola, Daniele Baldi, Matteo Repossi
A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization. ISSCC 2010: 164-165
2000 – 2009
- 2009
- [j1]Massimo Pozzoni, Simone Erba, Paolo Viola, Matteo Pisati, Emanuele Depaoli, Davide Sanzogni, Riccardo Brama, Daniele Baldi, Matteo Repossi
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication. IEEE J. Solid State Circuits 44(4): 1306-1315 (2009) - 2008
- [c1]Simone Erba, Massimo Pozzoni, Matteo Pisati, Riccardo Brama
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR. CICC 2008: 559-562
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