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Meng Wu 0005
Person information
- affiliation: Peking University, School of Integrated Circuits, Institute of Microelectronics, Beijing, China
Other persons with the same name
- Meng Wu — disambiguation page
- Meng Wu 0001 — Virginia Tech, Blacksburg, VA, USA
- Meng Wu 0002
— University of Bremen, Department of Communications Engineering, Germany
- Meng Wu 0003 — Nanjing University of Posts and Telecommunications, NUPT, Department of Cyberspace Security, School of Internet of Things, China (and 1 more)
- Meng Wu 0004
- Meng Wu 0006
- Meng Wu 0007
- Meng Wu 0008
- Meng Wu 0009
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2020 – today
- 2024
- [j3]Yufei Ma
DCIM-GCN: Digital Computing-in-Memory Accelerator for Graph Convolutional Network. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2735-2748 (2024) - [c12]Yikan Qiu, Yufei Ma, Meng Wu
Quartet: A 22nm 0.09mJ/lnference Digital Compute-in-Memory Versatile AI Accelerator with Heterogeneous Tensor Engines and Off-Chip-Less Dataflow. CICC 2024: 1-2 - [c11]Meng Wu
S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications. CICC 2024: 1-2 - [c10]Yiqi Jing, Meng Wu, Jiaqi Zhou, Yiyang Sun, Yufei Ma, Ru Huang, Tianyu Jia, Le Ye:
AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration. DAC 2024: 145:1-145:6 - [c9]Zhiyuan Chen, Yufei Ma, Keyi Li, Yifan Jia, Guoxiang Li, Meng Wu, Tianyu Jia, Le Ye, Ru Huang:
An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid Topology. DAC 2024: 245:1-245:6 - [c8]Ying Liu, Yufei Ma, Ninghui Shang, Tianhao Zhao, Peiyu Chen
30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory Computing. ISSCC 2024: 484-486 - [c7]Yanchi Dong, Xueping Liu, Kangbo Bai, Guoxiang Li, Meng Wu, Yiqi Jing, Yihan Zhang, Pixian Zhan, Yadong Zhang, Yufei Ma, Ru Huang, Le Ye, Tianyu Jia:
A Heterogeneous TinyML SoC with Energy-Event-Performance-Aware Management and Compute-in-Memory Two-Stage Event-Driven Wakeup. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j2]Le Ye, Zhixuan Wang
Research progress on low-power artificial intelligence of things (AIoT) chip design. Sci. China Inf. Sci. 66(10) (2023) - [c6]Peiyu Chen, Meng Wu, Yufei Ma, Le Ye, Ru Huang:
RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation. ASP-DAC 2023: 228-233 - [c5]Yiqi Jing, Yiyang Sun, Xiao Wang, Wentao Zhao, Meng Wu
DCIM-3DRec: A 3D Reconstruction Accelerator with Digital Computing-in-Memory and Octree-Based Scheduler. ISLPED 2023: 1-6 - [c4]Peiyu Chen
A 22nm Delta-Sigma Computing-In-Memory (Δ∑CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing. ISSCC 2023: 140-141 - 2022
- [c3]Yikan Qiu, Yufei Ma, Wentao Zhao, Meng Wu, Le Ye, Ru Huang:
DCIM-GCN: Digital Computing-in-Memory to Efficiently Accelerate Graph Convolutional Networks. ICCAD 2022: 46:1-46:9 - [c2]Chang Xue, Yihan Zhang, Peiyu Chen
Reliability-Improved Read Circuit and Self-Terminating Write Circuit for STT-MRAM in 16 nm FinFET. ISCAS 2022: 595-599 - [c1]Ying Liu, Zhixuan Wang
An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique. ISSCC 2022: 372-374 - 2021
- [j1]Le Ye
The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 4821-4834 (2021)
Coauthor Index
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