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CICC 2018: San Diego, CA, USA
- 2018 IEEE Custom Integrated Circuits Conference, CICC 2018, San Diego, CA, USA, April 8-11, 2018. IEEE 2018, ISBN 978-1-5386-2483-8
- Mark Pinto, Mihai Banu:
Keynote speaker: Massive MIMO active antenna arrays for advanced wireless communications. 1 - Chintan Thakkar, James E. Jaussi, Bryan Casper:
High-speed contactless I/O for computing devices. 1-8 - Kadaba Lakshmikumar, Alexander Kurylak, Manohar Nagaraju, Richard Booth, Joe Pampanin:
A process and temperature insensitive CMOS linear TIA for 100 Gbps/λ PAM-4 optical links. 1-4 - Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo:
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE. 1-4 - Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan
, Ankur Kumar
A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS. 1-4 - Kun-Da Chu, Mohamad Katanbaf, Chenxin Su, Tong Zhang, Jacques Christophe Rudell:
Integrated CMOS transceivers design towards flexible full duplex (FD) and frequency division duplex (FDD) systems. 1-11 - Zhenqi Chen, Dongyi Liao, Fa Foster Dai:
A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection. 1-4 - Yiting Zhu, Liang Xiong, Yun Yin, Wei Luo, Bowen Chen, Tong Li, Hongtao Xu:
A compact 2.4GHz polar/quadrature reconfigurable digital power amplifier in 28nm logic LP CMOS. 1-4 - Zhonghong Jiang, David A. Johns, Antonio Liscidini
A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance. 1-4 - Davide Ghisu, Andrea Gambero, Marco Terenzi, Giulio Ricotti, Anna Moroni, Sandro Rossi:
180Vpp output voltage, 24MHz bandwidth, low power class AB current-feedback high voltage amplifier for ultrasound transmitters. 1-4 - Tao He, Gabor C. Temes:
System-level noise filtering and linearization. 1-8 - Alfio Zanchi:
A diode-less compact voltage/frequency reference-in-one. 1-4 - Jason T. Stauth
Pathways to mm-scale DC-DC converters: Trends, opportunities, and limitations. 1-8 - Tim Thielemans
A capacitive DC-DC converter for stacked loads with wide range DVS achieving 98.2% peak efficiency in 40nm CMOS. 1-4 - Sally Safwat Amin, Patrick P. Mercier
A 78%-efficiency li-ion-compatible fully-integrated modified 4-level converter with 0.01-40mW DCM-operation in 28nm FDSOI. 1-4 - Yongjun Li
An AC-coupled stacked dual active bridge hybrid DC-DC converter for battery-to-processor power delivery with 87.2% peak efficiency and high accuracy loadline regulation. 1-4 - Sudhir S. Kudva, Sanquan Song, John W. Poulton, John M. Wilson, Wenxu Zhao, C. Thomas Gray:
A switching linear regulator based on a fast-self-clocked comparator with very low probability of meta-stability and a parallel analog ripple control module. 1-4 - Hesam Sadeghi Gougheri, Mehdi Kiani:
A self-regulated voltage/current-mode integrated power management with seamless mode transition and extended input-voltage range. 1-3 - Zhongming Xue, Shiquan Fan, Lina Zhang, Zhuoqi Guo, Li Dong, Dan Li, Li Geng:
Single-stage dual-output AC-DC converter for wireless power transmission. 1-4 - Jong-Beom Baek, Ji-Hun Lee, Se-Un Shin, Min-Yong Jung, Gyu-Hyeong Cho:
Switched inductor capacitor buck converter with >85% power efficiency in 100uA-to-300mA loads using a bang-bang zero-current detector. 1-4 - Jiawei Xu, Qiuyang Lin, Ming Ding, Yao Li, Chris Van Hoof
A 0.6V 3.8μW ECG/bio-impedance monitoring IC for disposable health patch in 40nm CMOS. 1-4 - Deng Luo, Milin Zhang, Zhihua Wang:
Design of a 3.24μW, 39nV/√Hz chopper amplifier with 5.5Hz noise corner frequency for invasive neural signal acquisition. 1-4 - Hui Jiang
Energy-efficient bridge-to-digital converters. 1-7 - Tobias Funk, Bernhard Wicht:
A fully integrated DC to 75 MHz current sensing circuit with on-chip Rogowski coil. 1-4 - Federica Barbieri, Andrea Barbieri, Germano Nicollini:
Pseudo-differential analog readout circuit for MEMS microphones performing 135dBSPL AOP and 66dBA SNR at 1Pa. 1-4 - Teruki Someya, Islam A. K. M. Mahfuzul
A 13nW temperature-to-digital converter utilizing sub-threshold MOSFET operation at sub-thermal drain voltage. 1-4 - Murat Ozatay
Artificial intelligence meets large-scale sensing: Using Large-Area Electronics (LAE) to enable intelligent spaces. 1-8 - Jaemyung Lim, Coskun Tekes, Ahmad Rezvanitabar, Evren F. Arkan
Highly-integrated guidewire vascular ultrasound imaging system-on-a-chip. 1-4 - Shovan Maity, Baibhab Chatterjee
A 6.3pJ/b 30Mbps -30dB SIR-tolerant broadband interference-robust human body communication transceiver using time domain signal-interference separation. 1-4 - Mao-Cheng Lee, Alireza Karimi-Bidhendi
A CMOS inductorless MedRadio OOK transceiver with a 42 μW event-driven supply-modulated RX and a 14% efficiency TX for medical implants. 1-4 - Hyeongseok Kim, Nikolaos Chiotellis, Elnaz Ansari, Muhammad Faisal, Tae-Kwang Jang
A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm3 GPS logger. 1-4 - Jiheon Park
Adiabatically driven touch controller analog front-end for ultra-thin displays. 1-4 - Hyunkyu Ouh, Matthew L. Johnston:
Dual-mode, in-pixel linear and single-photon avalanche diode readout for low-light dynamic range extension in photodetector arrays. 1-4 - Xinyao Tang, Haixiang Zhao, Soumyajit Mandal:
A programmable CMOS transceiver for structural health monitoring. 1-4 - Fei Wang, Hua Wang
A noise circulating cross-coupled VCO with a 195.6dBc/Hz FoM and 50kHz 1/f3 noise corner. 1-4 - Venkatraman Natarajan, Mohammad H. Naderi, José Silva-Martínez:
Low noise RF quadrature VCO using tail-switch network-based coupling in 40 nm CMOS. 1-4 - Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang
A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique. 1-4 - Ahmed Elmallah, Mostafa Gamal Ahmed, Ahmed Elkholy, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS. 1-4 - Arjang Hassibi, Nicholas Wood, Arun Manickam:
CMOS biochips: Challenges and opportunities. 1-7 - Chung-Lun Hsu, Alexander Sun, Yunting Zhao, Eliah Aronoff Spencer, Drew A. Hall
A 16×20 electrochemical CMOS biosensor array with in-pixel averaging using polar modulation. 1-4 - Haowei Jiang, Xiahan Zhou, Saurabh Kulkarni, Michael Uranian, Rajesh Seenivasan
A Sub-1 μW multiparameter injectable BioMote for continuous alcohol monitoring. 1-4 - Jeffrey Abbott, Ling Qin, Tianyang Ye, Marsela Jorgolli, Rona S. Gertner, Hongkun Park
CMOS electronics probe inside a cellular network - Invited review paper. 1-7 - Benjamin C. Johnson
StimDust: A 6.5mm3, wireless ultrasonic peripheral nerve stimulator with 82% peak chip efficiency. 1-4 - Pyungwoo Yeon, Muhannad S. Bakir, Maysam Ghovanloo:
Towards a 1.1 mm2 free-floating wireless implantable neural recording SoC. 1-4 - Abhinav Agarwal, Aubrey Shapero, Damien Rodger, Mark S. Humayun, Yu-Chong Tai, Azita Emami
A wireless, low-drift, implantable intraocular pressure sensor with parylene-on-oil encapsulation. 1-4 - Alberto Valdes-Garcia, Bodhisatwa Sadhu, Xiaoxiong Gu, Yahya M. Tousi, Duixian Liu, Scott K. Reynolds, Joakim Hallin, Stefan Sahl, Leonard Rexberg:
Circuit and antenna-in-package innovations for scaled mmWave 5G phased array modules. 1-8 - Hossein Mohammadnezhad, Razieh Abedi, Amir Esmaili, Payam Heydari:
A 64-67GHz partially-overlapped phase-amplitude-controlled 4-element beamforming-MIMO receiver. 1-4 - Dang Liu, Xiaohua Huang, Zhendong Ding, Haixin Song, Woogeun Rhee
A 26.6mW 1Gb/s dual-antenna wideband receiver with auto beam steering for secure proximity communications. 1-4 - Qian Zhong, Zhiyu Chen, Navneet Sharma, Sandeep Kshattry, Wooyeol Choi
300-GHz CMOS QPSK transmitter for 30-Gbps dielectric waveguide communication. 1-4 - Qian Zhong, Wooyeol Choi
CMOS terahertz receivers. 1-8 - Gabriele Manganaro:
Emerging data converter architectures and techniques. 1-8 - Jorge Lagos
A 1Gsps, 12-bit, single-channel pipelined ADC with dead-zone-degenerated ring amplifiers. 1-4 - Kexu Sun, Guanhua Wang, Ping Gui, Qing Zhang, Salam Elahmadi:
A 31.5-GHz BW 6.4-b ENOB 56-GS/s ADC in 28nm CMOS for 224-Gb/s DP-16QAM coherent receivers. 1-4 - Jeonggoo Song, Nan Sun:
A 10-b 600-MS/s 2-way time-interleaved SAR ADC with mean absolute deviation based background timing-skew calibration. 1-4 - Pieter Harpe:
A 0.0013mm2 10b 10MS/s SAR ADC with a 0.0048mm2 42dB-rejection passive FIR filter. 1-4 - Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary:
Analog/mixed-signal design challenges in 7-nm CMOS and beyond. 1-8 - Eric Chang, Jaeduk Han, Woo-Rham Bae, Zhongkai Wang, Nathan Narevsky, Borivoje Nikolic
BAG2: A process-portable framework for generator-based AMS circuit design. 1-8 - Stevo Bailey, John Wright, Nandish Mehta
A 28nm FDSOI 8192-point digital ASIC spectrometer from a Chisel generator. 1-4 - Devyani Patra, Jiayang Zhang, Runsheng Wang, Mehdi Katoozi, Ethan H. Cannon, Ru Huang, Yu Cao
Compact modeling and simulation of accelerated circuit aging. 1-4 - Toshiki Nakamura, Yoshiaki Deguchi
9.1x Error acceptable adaptive artificial neural network coupled LDPC ECC for charge-trap and floating-gate 3D-NAND flash memories. 1-4 - Shinichi Shibahara:
Functional safety SoC for autonomous driving. 1-8 - Mohammed Affan Zidan
RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems. 1-8 - Rajiv V. Joshi, Matthew M. Ziegler, Karthik Swaminathan, Nandhini Chandramoorthy:
Cascaded and resonant SRAM supply boosting for ultra-low voltage cognitive IoT applications. 1-4 - Francesco Conti, Lukas Cavigelli, Gianna Paulin
Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference. 1-4 - Ayten Ozge Akmandor, Hongxu Yin, Niraj K. Jha:
Simultaneously ensuring smartness, security, and energy efficiency in Internet-of-Things sensors. 1-8 - Shiming Song, Wei Tang, Thomas Chen, Zhengya Zhang
LEIA: A 2.05mm2 140mW lattice encryption instruction accelerator in 40nm CMOS. 1-4 - Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann
BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS. 1-4 - Vivienne Sze, Yu-Hsin Chen, Joel S. Emer, Amr Suleiman, Zhengdong Zhang:
Hardware for machine learning: Challenges and opportunities. 1-8 - Jong-Hyeok Yoon, Kyeongha Kwon, Hyeon-Min Bae:
A 3.125-to-28.125 Gb/s multi-standard transceiver with a fully channel-independent operation in 40nm CMOS. 1-4 - Kuan-Chang Xavier Chen, Azita Emami
A 25Gb/s APD-based burst-mode optical receiver with 2.24ns reconfiguration time in 28nm CMOS. 1-4 - Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi:
A 32-mW 40-Gb/s CMOS NRZ transmitter. 1-4 - Kevin Zheng, Yohan Frans, Ken Chang, Boris Murmann
A 56 Gb/s 6 mW 300 um2 inverter-based CTLE for short-reach PAM2 applications in 16 nm CMOS. 1-4 - Walker J. Turner, John W. Poulton, John M. Wilson, Xi Chen, Stephen G. Tell, Matthew Fojtik, Thomas H. Greer, Brian Zimmer, Sanquan Song, Nikola Nedovic, Sudhir S. Kudva, Sunil R. Sudhakaran, Rizwan Bashirullah, Wenxu Zhao, William J. Dally, C. Thomas Gray:
Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects. 1-8 - Dongwook Kim, Woo-Seok Choi, Ahmed Elkholy, Jack Kenney, Pavan Kumar Hanumolu:
A 15Gb/s 1.9pJ/bit sub-baud-rate digital CDR. 1-4 - Ujwal Radhakrishna
A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion. 1-4 - Qiping Wan, Philip K. T. Mok:
A 14 nA quiescent current inductorless dual-input-triple-output thermoelectric energy harvesting system based on a reconfigurable TEG array. 1-4 - Soumya Bose, Tejasvi Anand, Matthew L. Johnston:
Fully-integrated 57 mV cold start of a thermoelectric energy harvester using a cross-coupled complementary charge pump. 1-4 - Yiwu Tang, Chien-Heng Wong, Yuan Du, Li Du, Yilei Li, Mau-Chung Frank Chang:
A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage. 1-4 - Xingyi Hua, Ramesh Harjani:
A 5μW-5mW input power range, 0-3.5V output voltage range RF energy harvester with power-estimator-enhanced MPPT controller. 1-4 - Shanthi Pavan:
Finite-impulse-response (FIR) feedback in continuous-time delta-sigma converters. 1-8 - Hui Liu, Xinpeng Xing, Georges G. E. Gielen:
An 85MHz-BW 68.5dB-SNDR ASAR-assisted CT 4-0 MASH ΔΣ modulator with half-range dithering-based DAC calibration in 28nm CMOS. 1-4 - Sheng-Hui Liao, Jieh-Tsorng Wu:
A 1 V 175 μW 94.6 dB SNDR 25 kHz bandwidth delta-sigma modulator using segmented integration techniques. 1-4 - Changsok Han, Taewook Kim, Nima Maghari:
A continuous-time delta-sigma modulator with self-ELD compensated quantizer. 1-4 - Tzu-Fan Wu, Mike Shuo-Wei Chen:
A 200MHz-BW 0.13mm2 62dB-DR VCO-based non-uniform sampling ADC with phase-domain level crossing in 65nm CMOS. 1-4 - Saravana Manivannan, Shanthi Pavan:
A 1 MHz bandwidth, filtering continuous-time delta-sigma ADC with 36 dBFS out-of-band IIP3 and 76 dB SNDR. 1-4 - Shravan S. Nagam, Peter R. Kinget:
A 0.008mm2 2.4GHz type-I sub-sampling ring-oscillator-based phase-locked loop with a -239.7dB FoM and -64dBc reference spurs. 1-4 - Shao-Yung Lu, Yu-Te Liao
A 46μW, 8.2MHz self-threshold-tracking differential relaxation oscillator with 7.66psrms period jitter and 1.56ppm allan deviation floor. 1-4 - Atsuki Kobayashi, Yuya Nishio
A 350-mV, under-200-ppm allan deviation floor gate-leakage-based timer using an amplifier-less replica-bias switching technique in 55-nm DDC CMOS. 1-4 - Daniel de Godoy
A 78.2nW 3-channel time-delay-to-digital converter using polarity coincidence for audio-based object localization. 1-5 - Yunzhi Dong, José B. Silva, Qingdong Meng, Jialin Zhao, Wenhua Yang, Trevor C. Caldwell, Hajime Shibata, Zhao Li, Donald Paterson, Jeffrey C. Gealow:
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS. 1-4 - Max L. Wang, Spyridon Baltsavias
Wireless data links for next-generation networked micro-implantables. 1-9 - Vladimir Kopta, Christian C. Enz:
A 100kb/s, 4 GHz, 267 μW fully integrated low power FM-UWB transceiver with multiple channels. 1-4 - Mojtaba Sharifzadeh, Amir Hossein Masnadi Shirazi, Yashar Rajavi, Hossein Miri Lavasani
A fully integrated multi-mode high-efficiency transmitter for IoT applications in 40nm CMOS. 1-4 - Mohamed R. Abdelhamid, Arun Paidimarri, Anantha P. Chandrakasan:
A -80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency. 1-4 - Taiyun Chi, Hechen Wang
A bidirectional lens-free digital-bits-in/-out 0.57mm2 terahertz nano-radio in CMOS with 49.3mW Peak power consumption supporting 50cm Internet-of-Things communication. 1-4 - Shravan S. Nagam, Peter R. Kinget:
A -236.3dB FoM sub-sampling low-jitter supply-robust ring-oscillator PLL for clocking applications with feed-forward noise-cancellation. 1-4 - Yeonam Yoon, Nan Sun:
A 6-bit 0.81mW 700-MS/s SAR ADC with sparkle-code correction, resolution enhancement, and background window width calibration. 1-4 - Shanthi Pavan:
Practical design and simulation techniques for continuous-time ΔΣ converters. 1-81 - Aaron Buchwald:
Educational session 1-2: Time interleaved ADCs requirements vs. application. 1-131 - Mike Shuo-Wei Chen:
Evolutions of SAR ADC: From high resolution to high speed regime. 1-86 - Ahmed M. A. Ali
High speed pipelined ADCs: Fundamentals and variants. 1-145 - Payam Heydari:
Millimeter-wave frequency generation and synthesis in Silicon. 1-49 - Salvatore Levantino
Digital phase-locked loops. 1-79 - Daniel Friedman:
Hybrid PLL architectures and implementations. 1-89 - Fulvio Spagna:
Clock and data recovery systems. 1-120 - Samet Zihir, Gabriel M. Rebeiz:
Millimeter-wave phased array circuits and systems for 5G. 1-64 - Brian A. Floyd
High-performance millimeter-wave beamformers with built-in self-test. 1-68 - Sreekiran Samala:
Signal processing and frequency generation in FMCW RADAR. 1-73 - Erkan Alpman:
Overview of low-power wake-up radio design insights. 1-59 - Kamala Raghavan Sadagopan
Education session 4 - Low Power IoT wireless powering for ultra low power batteryless IoT sensing and communication. 1-40 - Patrick P. Mercier
Design of low-power wake-up radios for IoT applications. 1-71 - Osama Khan, Ali M. Niknejad, Kris Pister:
Ultra low-power transceiver SoC designs for IoT, NB-IoT applications. 1-77
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