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12th NEWCAS 2014: Trois-Rivieres, QC, Canada
- IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014, Trois-Rivieres, QC, Canada, June 22-25, 2014. IEEE 2014
- Douglas D. O'Shaughnessy, Géza Kolumbán, Roger Lecomte:
Keynote speakers: The challenges of pattern recognition for speech signals. 1-6 - Nevin Alex Jacob, Vikas Choudhary, Bibhudatta Sahoo:
A multi-pole single-tap IIR based DFE equalizer topology. 1-4 - Daniel Massicotte, Mohamad Sawan:
Bienvenue [in French only]. 1-2 - Chris D. Holdenried, Ryan Bespalko, Marcus van Ierssel, Mehrdad Ramezani, David Cassan, Siamak Sarvari, Saman Sadr:
Performance of edge tap decision feedback equalization methods for wireline receivers. 5-8 - Hervé Barthélemy, Stéphane Meillére, Jean Gaubert, Edith Kussener:
Transconductance CMOS inverter based AC coupling amplifier. 9-12 - Sahbi Baccar
, Timothée Levi, Dominique Dallet, François Barbara:
Modeling and simulation of an instrumentation amplifier in high temperature using a VHDL-AMS op-amp model. 13-16 - Luis Andre L. Fernandes, Mehdi Azadmehr, Erik Johannessen, Philipp Häfliger
Low power integrated electronics system for the operation of a miniaturized hydration sensor. 17-20 - Salim Lahmiri, Mounir Boukadoum, Antonio Di Ieva
Fractal-based arteriovenous malformations detection in brain magnetic resonance images. 21-24 - Dang-Kièn Germain Pham, Ghyslain Gagnon
A subsampled adaptive subband digital predistortion algorithm. 25-28 - Marzieh Amini
Image denoising in wavelet domain using the vector-based hidden Markov model. 29-32 - Muhammad Sanaullah
Neural network based classification of stressed speech using nonlinear spectral and cepstral features. 33-36 - Omid Sarbishei, Katarzyna Radecka, Zeljko Zilic:
A hybrid arithmetic transform for precision analysis of floating-point polynomial specifications. 37-40 - Anu Kalidas Muralidharan Pillai, Håkan Johansson:
Two reconstructors for m-channel time-interleaved ADCs with missing samples. 41-44 - Roi Méndez-Rial
Sensitivity of compressive sensing architectures based on time interleaved analog-to-digital converters to channel mismatches. 45-48 - Philippe Bénabès, Caroline Lelandais-Perrault, Nicolas Le Dortz:
Mismatch calibration methods for high-speed time-interleaved ADCs. 49-52 - Han Le Duc, Chadi Jabbour, Patricia Desgreys, Olivier Jamin, Van Tam Nguyen:
A fully digital background calibration of timing skew in undersampling TI-ADC. 53-56 - Xue Han, Nan Zhao, Qi Wei, Fei Qiao, Huazhong Yang, Hui Wang
A single channel, 6-bit 410-ms/s asynchronous SAR ADC based on 3bits/stage. 57-60 - Anelise Kologeski, Fernanda Lima Kastensmidt
Performance exploration of partially connected 3D NoCs under manufacturing variability. 61-64 - Matthias Beste, Saman Kiamehr, Mehdi Baradaran Tahoori:
Physical design of CNTFET-based circuits for yield improvement. 65-68 - András Horváth, Xiaobo Sharon Hu
Architectural impacts of emerging transistors. 69-72 - Xueqing Li, Unsuk Dennis Heo, Kaisheng Ma
Rf-powered systems using steep-slope devices. 73-76 - Harry Kalargaris, Vasilis F. Pavlidis:
Interconnect design tradeoffs for silicon and glass interposers. 77-80 - Jiyang Gao, Shaojie Su, Hong Chen, Hanjun Jiang, Chun Zhang, Zhihua Wang, Hao Tang, Yinxin Zhou:
Estimation of the relative pose of the femoral and acetabular components in a visual aided system for total hip replacement surgeries. 81-84 - Tan Yang, Junjie Lu, Nicholas Poore, Jeremy Holleman:
A current-reuse complementary-input chopper-stabilized amplifier for neural recording. 85-88 - Ghazal Nabovati, Ebrahim Ghafar-Zadeh, Mohamad Sawan:
Novel DC-input ΣΔ capacitance-to-digital convertor for biosensor applications. 89-92 - Matthias Lorenz, Michael Maurer, Yiannos Manoli, Maurits Ortmanns:
A spherical simplex unscented Kalman filter with smart sigma-point processing for estimations in CT ΣΔ modulators. 97-100 - Shahab Ardalan, Yu Feng:
Digital lock-detection for systematic phase noise elimination in a phase interpolator CDR. 101-104 - Imane Malass, Wilfried Uhring
10-ps Resolution hybrid time to digital converter in a 0.18 μm CMOS technology. 105-108 - Reda Mohellebi, Hervé Petit, Patrick Loumeau, Hussein Fakhoury, Baptiste Cecconi
A high dynamic range stacked ADCs receiver for long wavelength radio astronomy observations. 109-112 - Siraj Fulum Mossa, Syed Rafay Hasan, Omar Sayed Ahmed Elkeelany
Introducing redundant TSV with low inductance for 3-D IC. 117-120 - Stephane David-Grignot, Florence Azaïs, Laurent Latorre, Francois Lefevre:
Phase noise measurement on IF analog signals using standard digital ATE resources. 121-124 - Maroua Garci, Jean-Baptiste Kammerer, Luc Hébrard:
Compact modeling and electro-thermal simulation of hot carriers effect in analog circuits. 125-128 - Julian Santorelli, Frederic Nabki
Practical considerations for parameterized model order reduction of MEMS devices. 129-132 - Jung Kyu Chae, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez:
A reference-based specification tool for creating reliable library development specifications. 133-136 - Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada:
A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis. 137-140 - Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner
OxRAM-based non volatile flip-flop in 28nm FDSOI. 141-144 - Sean Whitehall, Carlos E. Saavedra
A very high-sensitivity CMOS power detector for high data rate biotelemetry applications. 145-148 - Yin-Tsung Hwang, Jiun-Yan Chen:
An IP interface design compiler with SystemC based input specifications. 149-152 - Thierry Bonnoit
Robust BER estimator for DBPSK modulation. 153-156 - Sanaz Khan Afshar, Osman Hasan
Towards the formal verification of optical interconnects. 157-160 - Ons Lahiouel, Henda Aridhi, Mohamed H. Zaki
Enablingy the DC solutions characterization using a fuzzy approach. 161-164 - Vadim Geurkov
Designing of an algebraic signature analyzer for mixed-signal systems. 165-168 - Hashim Raza Khan, Abdul Raheem Qureshi, Faiza Zafar, Qamar ul Wahab:
Design of a broadband Current Mode Class-D Power Amplifier with harmonic suppression. 169-172 - Heider M. G. Madureira, Nathalie Deltimple, Sandro A. P. Haddad, Didier Belot, Eric Kerherve
Design of a wideband 1.5GHz to 3GHz class EF2 power amplifier. 173-176 - Sami Smaili, Yehia Massoud:
Multi-channel random demodulation for hardware efficient compressive sensing. 177-180 - Zhiyong He, Paul Fortier
An encoder/decoder with throughput over Gigabits/sec for rate-compatible LDPC codes with wide code rates. 181-184 - Hironobu Akita, Nobuaki Matsudaira, Chao Chen, Takasuke Ito, Shigeki Ohtsuka:
An adaptive pre-emphasis technique with opposite directional training. 185-188 - Farshad Farahbakhshian, Allen Waters, Jason Muhlestein, Un-Ku Moon:
Stochastic approximation register ADC. 189-192 - Naoya Onizawa, Shoun Matsunaga, Takahiro Hanyu:
Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM. 193-196 - Bert Moons, Marian Verhelst
Energy and accuracy in multi-stage stochastic computing. 197-200 - Sami Smaili, Yehia Massoud:
On the effect of filter variability in compressive sensing systems. 201-204 - Frédéric Amiel, Boubacar Barry, Maria Trocan:
A contour preserving FPGA architecture for PAL to XGA format conversion. 205-208 - Hocine Merabti, Daniel Massicotte:
Nonlinear adaptive channel equalization using genetic algorithms. 209-212 - Tayler Sokalski, Naraig Manjikian:
Automatic generation of parallelized FFT logic for implementation in FPGA chips. 213-216 - Ahmed M. Atteya, Ahmed H. Madian
A hybrid Chaos-AES encryption algorithm and its impelmention based on FPGA. 217-220 - Ahmed K. F. Khattab, Magdy A. Bayoumi:
The challenges towards energy-efficient cognitive radio networking. 221-224 - Inna Vaisband, Eby G. Friedman:
Dynamic power management with power network-on-chip. 225-228 - Yehia Massoud, Shuang Li, Sami Smaili:
Robust power converters in integrated systems. 229-232 - Moataz Abdelfattah, Syed Roomi Naqvi, Brian Dupaix, Waleed Khalil:
Tracking energy efficiency of near-threshold design using process variation control techniques. 233-236 - Najmeh Farajipour Ghohroud, Zainalabedin Navabi:
Back-annotation of gate-level power properties into system level descriptions. 237-240 - Assim Boukhayma, Arnaud Peizerat, Antoine Dupret, Christian C. Enz:
Design optimization for low light CMOS image sensors readout chain. 241-244 - Vincent Wlotzko, Wilfried Uhring
Sub-200 fs rms jitter constant fraction discriminator for streak camera triggering. 245-248 - Kamel Mars
Lock-in pixels readout circuit using a high speed lateral electric field modulator with differential charge accumulation for stimulated Raman scattering imager. 249-252 - Morgan Madec
Compact modeling of offset sources in vertical hall-effect devices. 253-256 - Anoir Bouchami, Frederic Nabki
Non-linear modeling of MEMS-based oscillators using an analog hardware description language. 257-260 - Rudolf Ritter, Matthias Lorenz, Chao Chu, Maurits Ortmanns:
A high open loop gain common mode feedback technique for fully differential amplifiers. 261-264 - Ramzi Darraji, Fadhel M. Ghannouchi:
Analysis of the impact of finite OFF-state impedance of peaking branch on the efficiency of Doherty amplifiers. 269-272 - Wilson J. Bortoletto Machado, Calvin Plett:
Electrostatic discharge protection for a 10 GHz low noise amplifier. 273-276 - Harish Balasubramaniam, Klaus Hofmann:
Robust design methodology for switched capacitor delta sigma modulators based on current conveyors. 277-280 - Mohamed A. Shaheen, Anas A. Hamoui, Yvon Savaria:
A current-output DAC for low-power low-noise log-domain ΔΣ modulators. 281-284 - Tsung-Hsueh Lee, Pamela Abshire:
Accurate, wide range analog sine shaping circuits. 285-288 - Amani Darwish, Laurent Fesquet, Gilles Sicard:
1-Level crossing sampling scheme for low data rate image sensors. 289-292 - Tahar Haddad, Larbi Talbi, Ahmed Lakhssassi, Naim Ben-Hamida, Sadok Aouini:
Epilepsy seizure prediction using graph theory. 293-296 - A. Amadou Maranga, H. Zhu, Denis Gingras, Dominique Gruyer:
Collision avoidance improvement using a risky area. 297-300 - Mourad Oukherfellah, Mohammed Bahoura
FPGA implementation of voice activity detector for efficient speech enhancement. 301-304 - Imen Mhedhbi, Khalil Hachicha, Patrick Garda:
A new integer energy activity measure for parallel bit plane coding. 305-308 - Thalie Keklikian, J. M. Pierre Langlois, Yvon Savaria:
A memory transaction model for Sparse Matrix-Vector multiplications on GPUs. 309-312 - Jin Zhao, Xinming Huang, Yehia Massoud:
An efficient real-time FPGA implementation for object detection. 313-316 - Liang Zhou, Myriam Ariaudo, Cedric Duperrier, Sébastien Quintanel, Emmanuelle Bourdel:
Power adaptive receiver based on wide-band distributed low noise amplifier for home wireless networks. 317-320 - David Esseni
Device-circuit co-design and comparison of ultra-low voltage Tunnel-FET and CMOS digital circuits. 321-324 - Mohamed Amine-Bounouar, Dominique Drouin, Françis Calmon:
Towards nano-computing blocks using room temperature double-gate single electron transistors. 325-328 - Mohamed Zgaren, Mohamad Sawan:
Frequency-to-amplitude converter based FSK receiver for ultra-low power transceivers. 329-332 - Vincent Lenoir, Didier Lattard, Francois Dehmas, Dominique Morche, Ahmed Amine Jerraya:
Computational load reduction by downsampling for energy-efficient digital baseband. 333-336 - Mathieu Guerin, Emmanuel Bergeret
A low power voltage regulator for passive UHF RFID sensors. 337-340 - Mohammad Honarparvar, René Landry, Frederic Nabki
Advanced modeling technique for bandpass continuous-time delta-sigma modulators. 341-344 - Peter Luong, Carlos Christoffersen, Conrado Rossi-Aicardi, Carlos Dualibe:
Sub-1 V, 4 na CMOS voltage references with digitally-trimmable temperature coefficient. 345-348 - Christian Hangmann, Ingo Wullner, Christian Hedayat, Ulrich Hilleringmann
Modeling and characterization of CP-PLL phase noise in presence of dead zone. 349-352 - Waqas Ahmad, Anders Nejdel, Markus Törmänen, Henrik Sjöland
Fully integrated radio over fiber downlink for distributed multi-antenna systems in 65 nm CMOS. 353-356 - Minh-Tien Nguyen, Chadi Jabbour, Majid Homayouni, David Duperray, Pascal Triaire, Van Tam Nguyen:
A flexible direct delta-sigma receiver for GSM/WCDMA/LTE. 357-360 - Rawan Alkurd, Raed M. Shubair, Ibrahim Y. Abualhaol:
Survey on device-to-device communications: Challenges and design issues. 361-364 - Baptiste Grave, Antoine Frappé
Subsampling techniques applied to 60 GHz wireless receivers in 28 nm CMOS. 365-368 - Todd A. Wey, William D. Jemison:
On the performance of a hybrid memristor/MOS π-attenuator circuit. 369-372 - Iman Y. Taha, Mitra Mirhassani:
A temperature compensated relaxation oscillator for SoC implementations. 373-376 - M. Khorramnejadi, Anders Nejdel, Martin Liliebladh, H. Sjuland:
Design of a 2.45GHz wireless temperature sensor in 130nm CMOS technology. 377-380 - Simon Chaput, Martin Renaud, Remi Meingan, Jean-François Pratte
A 3.7 V to 200 V highly integrated DC-DC converter with 70.4% efficiency for portable electrostatic MEMS applications. 381-384 - Pietro M. Ferreira
1-20 Ghz kΩ-range BiCMOS 55 nm reflectometer. 385-388 - Mohamed A. Naiel
Vehicle detection using TD2DHOG features. 389-392 - Tomohiro Fujita, Syo Sawada, Kaihei Iwanaga, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura:
Cellular automaton based pixel-level snakes. 393-396 - Mahdi Parchami, Wei-Ping Zhu:
Wideband DOA estimation based on multi-channel speech presence probabilities. 397-400 - Taieb Lamine Ben Cheikh, Gabriela Nicolescu, Jelena Trajkovic
Fast and accurate implementation of Canny edge detector on embedded many-core platform. 401-404 - Sherif H. Abdel Haleem
A chess-based chaotic block cipher. 405-408 - Laurent Fesquet, Abdelkarim Cherkaoui, Oussama Elissati:
Self-timed rings as low-phase noise programmable oscillators. 409-412 - Yann Deval
The P/DLL frequency synthesizer architecture: A native trade-off between stability and wideband frequency generation. 413-416 - Himanshu Arora, Akhtar Siraj, Nikolaus Klemmer:
High performance LC-VCOS for 3GPP base station transceivers. 417-419 - Alexandre Fonseca, Gilles Jacquemod, Yves Leduc, Emeric de Foucauld, Philippe Lorenzini:
VCO design in SOI technologies. 420-423 - Stefan Andrei, Albert M. K. Cheng
An efficient scheduling algorithm of non-preemptive independent tasks for biomedical systems. 424-427 - Shih-Wen Chiu, Jen-Huo Wang, Kwuang-Han Chang, Hsiang-Chiu Wu, Hsin Chen, Chih-Cheng Hsieh, Meng-Fan Chang, Guoxing Wang, Kea-Tiong Tang:
A signal acquisition and processing chip with built-in cluster for chemiresistive gas sensor array. 428-431 - Chaojun Wang, Yongxin Zhu, Shengyan Zhou, Xiaoqi Gu, Jiang Jiang, Meikang Qiu:
A scalable embedded system for massive medical signal processing. 432-435 - Ulrich Bihr, Hongcheng Xu, Christoph Bulach, Matthias Lorenz, Jens Anders
Real-time data compression of neural spikes. 436-439 - Hassan Sepehrian, Seyed Abdollah Mirbozorgi, Benoit Gosselin
A low-power current-reuse analog front-end for multi-channel neural signal recording. 440-443 - Shailesh Singh Chouhan
The design and implementation of DTMOS biased all PMOS rectifier for RF energy harvesting. 444-447 - Dino Michelon, Emmanuel Bergeret
Optimization of integrated dickson voltage-multipliers for RF energy harvesting. 448-451 - Marcio Bender Machado, Márcio Cherem Schneider, Mohamad Sawan, Carlos Galup-Montoro
Fully-integrated 86 mV-1V step-up converter for energy harvesting applications. 452-455 - Pouya Kamalinejad, Kamyar Keikhosravy, Reza Molavi, Shahriar Mirabbasi, Victor C. M. Leung
An ultra-low-power CMOS voltage-controlled ring oscillator for passive RFID tags. 456-459 - Gürkan Yilmaz, Catherine Dehollain:
Wireless communication and power transfer system for intracranial neural recording applications. 460-463 - Libin George, Torsten Lehmann, Tara Julia Hamilton
A reconfigurable buck-boost switched capacitor converter architecture for multiple, distributed on-chip load applications. 464-467 - Masanori Natsui
Fabrication of a MTJ-based multilevel resistor towards process-variaton-resilient logic LSI. 468 - Mahdi Elghazali, Manoj Sachdev, Ajoy Opal:
A hybrid ESD clamp with thyristor delay element and diodes for low-leakage applications. 472-475 - Waqas Gul, Syed Rafay Hasan, Osman Hasan
Clock domain crossing (CDC) for inter-logic-layer communication in 3-D ICs. 476-479 - Chao Chu, John G. Kauffman, Jens Anders
A 1.92-GS/s CT ΔΣ modulator with 70-db DR and 78-db SFDR in 15-MHz bandwidth. 480-483
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