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Emeric de Foucauld
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2010 – 2019
- 2019
- [j7]Emeric de Foucauld
, Raffaele Roberto Severino, Dominique Nicolas, Alexandre Giry
A 433-MHz SOI CMOS Automatic Impedance Matching Circuit. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 958-962 (2019) - [c15]Gilles Jacquemod, Zhaopeng Wei, Yves Leduc, Emeric de Foucauld, Jérôme Prouvée, B. Blampey:
New design of analog and mixed-signal cells using back-gate cross-coupled structure. VLSI-SoC 2019: 21-26 - 2017
- [c14]Zhaopeng Wei, Yves Leduc, Emeric de Foucauld, Gilles Jacquemod:
Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology. NEWCAS 2017: 121-124 - 2016
- [j6]Zhaopeng Wei, Gilles Jacquemod, Philippe Lorenzini, Frédéric Hameau, Emeric de Foucauld, Yves Leduc:
Study and Reduction of Variability in 28 nm Fully Depleted Silicon on Insulator Technology. J. Low Power Electron. 12(1): 64-73 (2016) - [c13]Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld:
Built-in test of millimeter-Wave circuits based on non-intrusive sensors. DATE 2016: 505-510 - [c12]Zhaopeng Wei, Yves Leduc, Gilles Jacquemod, Emeric de Foucauld:
UTBB-FDSOI complementary logic for high quality analog signal processing. ICECS 2016: 572-575 - 2015
- [j5]Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld:
Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. J. Electron. Test. 31(4): 381-394 (2015) - [c11]Matthieu Verdy, Dominique Morche, Emeric de Foucauld, Suzanne Lesecq, Jean-Pascal Mallet, Cedric Mayor:
Balancing test cost reduction vs. measurements accuracy at test time. NEWCAS 2015: 1-4 - 2014
- [j4]Alexandre Fonseca, Emeric de Foucauld, Philippe Lorenzini, Gilles Jacquemod:
Low Power 28 nm Fully Depleted Silicon on Insulator 2.45 GHz Phase Locked Loop. J. Low Power Electron. 10(1): 149-162 (2014) - [c10]Matthieu Verdy, Alin Ratiu, Dominique Morche, Emeric de Foucauld, Suzanne Lesecq, Jean-Pascal Mallet, Cedric Mayor:
Cost-driven statistical analysis for selection of alternative measurements of analog circuits. ICECS 2014: 104-107 - [c9]Thierry Bonnoit
Robust BER estimator for DBPSK modulation. NEWCAS 2014: 153-156 - [c8]Alexandre Fonseca, Gilles Jacquemod, Yves Leduc, Emeric de Foucauld, Philippe Lorenzini:
VCO design in SOI technologies. NEWCAS 2014: 420-423 - 2012
- [c7]Matthieu Dubois, Emeric de Foucauld, Christopher Mounet, Serigne Dia, Cedric Mayor:
A frequency measurement BIST implementation targeting gigahertz application. ITC 2012: 1-8 - 2011
- [j3]Mouna El Bakkali, Francis Chan Wai Po, Emeric de Foucauld, Bernard Viala, Jean-Philippe Michel:
Design of a RF matching network based on a new tunable inductor concept. Microelectron. J. 42(1): 233-238 (2011) - [j2]Francis Chan Wai Po, Emeric de Foucauld, Dominique Morche
A Novel Method for Synthesizing an Automatic Matching Network and Its Control Unit. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2225-2236 (2011) - [c6]Emeric de Foucauld, Jean-Baptiste David, Christophe Delaveaud, Pascal Ciais:
An antenna-filter codesign for cardiac implants. DATE 2011: 728-733
2000 – 2009
- 2009
- [c5]Francis Chan Wai Po, Emeric de Foucauld, Dominique Morche, Pierre Vincent, Renzo Dal Molin, Pascal Pons, Regis Pierquin, Eric Kerherve:
A power optimized transconductance amplifier and its application to a 6th order lowpass GmC filter. ICECS 2009: 631-634 - [c4]Wai Chan, Emeric de Foucauld, Pierre Vincent, Frédéric Hameau, Dominique Morche, Christophe Delaveaud, Renzo Dal Molin, Pascal Pons, Regis Pierquin, Eric Kerherve
A Fast and Accurate Automatic Matching Network Designed for Ultra Low Power Medical Applications. ISCAS 2009: 673-676 - 2008
- [j1]Gilles Jacquemod, Lionel Geynet, Benjamin Nicolle, Emeric de Foucauld, William Tatinian, Pierre Vincent:
Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. Microelectron. J. 39(9): 1130-1139 (2008) - [c3]Carolynn Bernier
An Ultra Low Power SoC for 2.4GHz IEEE802.15.4 wireless communications. ESSCIRC 2008: 426-429 - [c2]Owen Casha
Utilization of MEMS Tunable Inductors in the design of RF voltage-controlled oscillators. ICECS 2008: 718-721 - 2005
- [c1]Benjamin Nicolle, Lionel Geynet, Emeric de Foucauld, William Tatinian, Gilles Jacquemod:
VHDL-AMS modeling of a multi-standard phase locked loop. ICECS 2005: 1-4
Coauthor Index
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