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Haibo Wang 0005
Person information
- affiliation: Southern Illinois University, Carbondale, IL, USA
Other persons with the same name
- Haibo Wang — disambiguation page
- Haibo Wang 0001
— Texas A&M International University, A. R. Sanchez School of Business, Laredo, TX, USA (and 1 more)
- Haibo Wang 0002
- Haibo Wang 0003
- Haibo Wang 0004
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2020 – today
- 2023
- [c31]Zhimin Tang, Rujie Zhao, Linkai Luo, Haibo Wang, Chao Lu:
Constraints-Aware Training (CAT) to Enable Software-Hardware Co-design for Memristor-based Analog Neuromorphic Chip. HPSR 2023: 20-26 - [c30]Bijay Raj Paudel, Haibo Wang, Spyros Tragoudas, Omkar Rijal:
High Precision Winner-Take-All Circuit for Neural Networks. SOCC 2023: 1-6 - 2021
- [c29]Bijay Raj Paudel, Danushka Senarathna
Predicting YOLO Misdetection by Learning Grid Cell Consensus. ICMLA 2021: 643-648 - 2020
- [j17]Abhilash Karnatakam Nagabhushana, Haibo Wang:
Accelerating low-voltage SAR ADC operation via comparator timing assisted and circuit adaptive tuning techniques. IET Circuits Devices Syst. 14(3): 294-302 (2020) - [j16]Haibo Wang, Abhilash Karnatakam Nagabhushana, Stefan Leitner:
Exploiting uncertain timing information in time-based SAR ADCs. IET Circuits Devices Syst. 14(3): 390-397 (2020) - [c28]David Thompson, Haibo Wang:
Extracting Power Signature from Low Dropout Voltage Regulator for IoT Security. ISQED 2020: 198 - [c27]Md Kamruzzaman Shuvo, David E. Thompson, Haibo Wang:
MSB-First Distributed Arithmetic Circuit for Convolution Neural Network Computation. MWSCAS 2020: 399-402 - [c26]David E. Thompson, Md Kamruzzaman Shuvo, Haibo Wang:
Digital LDO Based Power Signature Generation Circuit for IoT Security. MWSCAS 2020: 1076-1079
2010 – 2019
- 2018
- [j15]Stefan Leitner, Haibo Wang:
Digital LDO modelling techniques for performance estimation at early design stage. IET Circuits Devices Syst. 12(5): 655-661 (2018) - 2017
- [j14]Stefan Leitner, Haibo Wang, Spyros Tragoudas:
Design Techniques for Direct Digital Synthesis Circuits with Improved Frequency Accuracy Over Wide Frequency Ranges. J. Circuits Syst. Comput. 26(2): 1750035:1-1750035:21 (2017) - 2016
- [j13]Yao Wang
One-Step Sneak-Path Free Read Scheme for Resistive Crossbar Memory. ACM J. Emerg. Technol. Comput. Syst. 13(2): 25:1-25:18 (2016) - [c25]Abhilash Karnatakam Nagabhushana, Haibo Wang:
A novel time and voltage based SAR ADC design with self-learning technique. DAC 2016: 103:1-103:6 - [c24]Stefan Leitner, Paul West, Chao Lu, Haibo Wang:
Digital LDO modeling for early design space exploration. SoCC 2016: 7-12 - [c23]Abhilash Karnatakam Nagabhushana, Haibo Wang:
A comparator timing assisted SAR ADC technique with reduced conversion cycles. SoCC 2016: 200-205 - [c22]Stefan Leitner, Haibo Wang, Spyros Tragoudas:
Compressive image sensor technique with sparse measurement matrix. SoCC 2016: 223-228 - 2015
- [j12]Yao Wang
Design Techniques for Ultra-Low Voltage Comparator Circuits. J. Circuits Syst. Comput. 24(1): 1550013:1-1550013:22 (2015) - [j11]Yao Wang
A Low-Power Edge Detection Technique for Sensor Wake-Up Applications. J. Circuits Syst. Comput. 24(10): 1550157:1-1550157:16 (2015) - [c21]Suresh Koyada, Abhilash Karnatakam Nagabhushana, Stefan Leitner, Haibo Wang:
An A-SAR ADC circuit with adaptive auxiliary comparison scheme. SoCC 2015: 197-202 - 2014
- [c20]Adam Watkins, Venkata Naresh Mudhireddy, Haibo Wang, Spyros Tragoudas:
Adaptive compressive sensing for low power wireless sensors. ACM Great Lakes Symposium on VLSI 2014: 99-104 - [c19]Haibo Wang, Ram Harshvardhan Radhakrishnan:
An accelerated successive approximation technique for analog to digital converter design. SoCC 2014: 236-241 - 2013
- [j10]Saravanan Ramamoorthy, Haibo Wang:
Addressing Memory Effect for rail-to-rail Comparator with Near-Threshold Supply voltage. J. Circuits Syst. Comput. 22(6) (2013) - [j9]Yueran Gao, Haibo Wang, Ning Weng
Enhancing Sensor Network Data Quality via Collaborated Circuit and Network Operations. J. Sens. Actuator Networks 2(2): 196-212 (2013) - [c18]Yao Wang
A novel envelope edge detector for ultra-low power sensor wake-up circuit. ISLPED 2013: 371-376 - 2012
- [j8]Chenglong Zhang, Haibo Wang:
Reduction of Parasitic Capacitance Impact in Low-Power SAR ADC. IEEE Trans. Instrum. Meas. 61(3): 587-594 (2012) - [j7]Yongtao Geng, Huan Zou, Chaojiang Li, Jiwei Sun, Haibo Wang, Pingshan Wang:
Short Pulse Generation With On-Chip Pulse-Forming Lines. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1553-1564 (2012) - 2011
- [j6]Benfano Soewito
Hybrid pattern matching for trusted intrusion detection. Secur. Commun. Networks 4(1): 33-43 (2011) - 2010
- [c17]Mallik Kandala, Ramgopal Sekar, Chenglong Zhang, Haibo Wang:
A low power charge-redistribution ADC with reduced capacitor array. ISQED 2010: 44-48 - [c16]Venkata Naresh Mudhireddy, Saravanan Ramamoorthy, Haibo Wang:
Implementing self-testing and self-repairable analog circuits on field programmable analog array platforms. ISQED 2010: 81-86
2000 – 2009
- 2009
- [j5]Amit Laknaur, Rui Xiao, Sai Raghuram Durbha, Haibo Wang:
Design of a window comparator with adaptive error threshold for online testing applications. Microelectron. J. 40(9): 1257-1263 (2009) - [j4]Benfano Soewito
Self-addressable memory-based FSM: a scalable intrusion detection engine. IEEE Netw. 23(1): 14-21 (2009) - [c15]Yueran Gao, Haibo Wang:
A Reconfigurable ADC Circuit with Online-Testing Capability and Enhanced Fault Tolerance. DFT 2009: 202-210 - 2008
- [c14]Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning Weng, Haibo Wang:
Implementing high-speed string matching hardware for network intrusion detection systems. FPGA 2008: 264 - [c13]Saravanan Ramamoorthy, Haibo Wang, Sarma B. K. Vrudhula:
A Low-Power Double-Edge-Triggered Address Pointer Circuit for FIFO Memory Design. ISQED 2008: 123-126 - [c12]Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning Weng, Haibo Wang:
Implementing High-Speed String Matching Hardware for Network Intrusion Detection Systems. PDPTA 2008: 157-163 - 2007
- [c11]Rui Xiao, Amit Laknaur, Haibo Wang:
A Fully Programmable Analog Window Comparator. ISCAS 2007: 3872-3875 - [c10]Michael N. Skoufis, Haibo Wang, Themistoklis Haniotakis, Spyros Tragoudas:
Glitch Control with Dynamic Receiver Threshold Adjustment. ISQED 2007: 410-415 - [c9]Amit Laknaur, Rui Xiao, Sai Raghuram Durbha, Haibo Wang:
Design of a Window Comparator with Adaptive Error Threshold for Online Testing Applications. ISQED 2007: 501-506 - [c8]Amit Laknaur, Rui Xiao, Haibo Wang:
A Programmable Window Comparator for Analog Online Testing. VTS 2007: 119-124 - 2006
- [j3]Amit Laknaur, Sai Raghuram Durbha, Haibo Wang:
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays. J. Electron. Test. 22(4-6): 449-462 (2006) - [c7]Krishna Prasad Raghuraman, Haibo Wang, Spyros Tragoudas:
Minimizing FPGA Reconfiguration Data at Logic Level. ISQED 2006: 219-224 - [c6]Amit Laknaur, Haibo Wang:
Design ofWindow Comparators for Integrator-Based Capacitor Array Testing Circuits. ISQED 2006: 531-536 - [c5]Sai Raghuram Durbha, Amit Laknaur, Haibo Wang:
Investigating the Efficiency of Integrator-Based Capacitor Array Testing Techniques. VTS 2006: 320-325 - 2005
- [j2]Amit Laknaur, Haibo Wang:
A methodology to perform online self-testing for field-programmable analog array circuits. IEEE Trans. Instrum. Meas. 54(5): 1751-1760 (2005) - [c4]M. Welling, Spyros Tragoudas, Haibo Wang:
A Minimum Cut Based Re-Synthesis Approach. ISQED 2005: 202-207 - [c3]Amit Laknaur, Haibo Wang:
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays. ISQED 2005: 434-439 - [c2]Krishna Prasad Raghuraman, Haibo Wang, Spyros Tragoudas:
A Novel Approach to Minimizing Reconfiguration Cost for LUT-Based FPGAs. VLSI Design 2005: 673-676 - 2004
- [c1]Haibo Wang, Suchitra Kulkarni, Spyros Tragoudas:
On-line Testing Field Programmable Analog Array Circuits. ITC 2004: 1340-1348 - 2002
- [j1]Haibo Wang, Sarma B. K. Vrudhula:
Behavioral synthesis of field programmable analog array circuits. ACM Trans. Design Autom. Electr. Syst. 7(4): 563-604 (2002)
Coauthor Index
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