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Tomás Lang
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2010 – 2019
- 2012
- [j64]Tomás Lang, Alberto Nannarelli
:
Comments on 'improving the speed of decimal division'. IET Comput. Digit. Tech. 6(6): 370-371 (2012) - [j63]Julio Villalba, Tomás Lang, Javier Hormigo
Radix-2 Multioperand and Multiformat Streaming Online Addition. IEEE Trans. Computers 61(6): 790-803 (2012)
2000 – 2009
- 2009
- [c58]Tomás Lang, Alberto Nannarelli
Division Unit for Binary Integer Decimals. ASAP 2009: 1-7 - 2007
- [j62]Tomás Lang, Alberto Nannarelli
A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture. IEEE Trans. Computers 56(6): 727-739 (2007) - [c57]Julio Villalba, Javier Hormigo, Tomás Lang:
Improving the Throughput of On-line Addition for Data Streams. ASAP 2007: 272-277 - 2006
- [j61]Julio Villalba
Double-Residue Modular Range Reduction for Floating-Point Hardware Implementations. IEEE Trans. Computers 55(3): 254-267 (2006) - 2005
- [j60]Tomás Lang, Elisardo Antelo
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics. IEEE Trans. Computers 54(3): 347-361 (2005) - [j59]Elisardo Antelo
Digit-Recurrence Dividers with Reduced Logical Depth. IEEE Trans. Computers 54(7): 837-851 (2005) - [c56]Javier D. Bruguera, Tomás Lang:
Floating-Point Fused Multiply-Add: Reduced Latency for Floating-Point Addition. IEEE Symposium on Computer Arithmetic 2005: 42-51 - [c55]Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture. IEEE Symposium on Computer Arithmetic 2005: 147-154 - 2004
- [j58]Tomás Lang, Javier D. Bruguera:
Floating-Point Multiply-Add-Fused with Reduced Latency. IEEE Trans. Computers 53(8): 988-1003 (2004) - 2003
- [j57]Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig:
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits 38(1): 160-161 (2003) - [j56]Tomás Lang, Elisardo Antelo
Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. IEEE Trans. Computers 52(9): 1100-1114 (2003) - [j55]Javier D. Bruguera, Tomás Lang:
Multilevel Reverse-Carry Addition: Single and Dual Adders. J. VLSI Signal Process. 33(1-2): 55-74 (2003) - 2002
- [c54]Elisardo Antelo
Fast Radix-4 Retimed Division with Selection by Comparisons. ASAP 2002: 185-196 - [c53]Tomás Lang, Javier D. Bruguera:
Floating-Point Fused Multiply-Add with Reduced Latency. ICCD 2002: 145- - 2001
- [j54]Paolo Montuschi
Boosting Very-High Radix Division with Prescaling and Selection by Rounding. IEEE Trans. Computers 50(1): 13-27 (2001) - [j53]Javier D. Bruguera, Tomás Lang:
Multilevel reverse most-significant carry computation. IEEE Trans. Very Large Scale Integr. Syst. 9(6): 959-962 (2001) - [c52]Tomás Lang, Jean-Michel Muller
Bounds on Runs of Zeros and Ones for Algebraic Functions. IEEE Symposium on Computer Arithmetic 2001: 13- - [c51]Tomás Lang, Elisardo Antelo:
Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation. IEEE Symposium on Computer Arithmetic 2001: 83-93 - [c50]Javier D. Bruguera, Tomás Lang:
Using the Reverse-Carry Approach for Double Datapath Floating-Point Addition. IEEE Symposium on Computer Arithmetic 2001: 203-210 - 2000
- [j52]Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. IEEE Trans. Computers 49(7): 628-637 (2000) - [j51]Elisardo Antelo, Tomás Lang, Javier D. Bruguera:
Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring. IEEE Trans. Computers 49(7): 727-739 (2000) - [j50]Tomás Lang, Elisardo Antelo
CORDIC-Based Computation of ArcCos. J. VLSI Signal Process. 25(1): 19-38 (2000) - [j49]Elisardo Antelo
Very-High Radix CORDIC Rotation Based on Selection by Rounding. J. VLSI Signal Process. 25(2): 141-153 (2000) - [c49]Javier D. Bruguera, Tomás Lang:
Multilevel Reverse-Carry Adder. ICCD 2000: 155-162
1990 – 1999
- 1999
- [j48]Alberto Nannarelli
Low-Power Divider. IEEE Trans. Computers 48(1): 2-14 (1999) - [j47]Tomás Lang, Paolo Montuschi
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit. IEEE Trans. Computers 48(8): 827-841 (1999) - [j46]Javier D. Bruguera, Tomás Lang:
Leading-One Prediction with Concurrent Position Correction. IEEE Trans. Computers 48(10): 1083-1097 (1999) - [c48]Paolo Montuschi, Tomás Lang:
Boosting Very-High Radix Division with Prescaling and Selection by Rounding. IEEE Symposium on Computer Arithmetic 1999: 52-59 - [c47]Alberto Nannarelli, Tomás Lang:
Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16. IEEE Symposium on Computer Arithmetic 1999: 60- - [c46]Elisardo Antelo, Tomás Lang, Javier D. Bruguera:
Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding. IEEE Symposium on Computer Arithmetic 1999: 204- - [c45]Tomás Lang, Javier D. Bruguera:
Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition. ICCD 1999: 73-79 - [c44]Alberto Nannarelli, Tomás Lang:
Low-Power Radix-4 Combined Division and Square Root. ICCD 1999: 236-242 - 1998
- [j45]Elisardo Antelo
Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling. IEEE Trans. Computers 47(2): 152-161 (1998) - [j44]Tomás Lang, Elisardo Antelo
CORDIC Vectoring with Arbitrary Target Value. IEEE Trans. Computers 47(7): 736-749 (1998) - [j43]Enric Musoll, Tomás Lang, Jordi Cortadella
Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 568-572 (1998) - [j42]Julio Villalba, Tomás Lang, Emilio L. Zapata:
Parallel Compensation of Scale Factor for the CORDIC Algorithm. J. VLSI Signal Process. 19(3): 227-241 (1998) - [c43]Javier D. Bruguera, Tomás Lang:
Leading-one prediction scheme for latency improvement in single datapath floating-point adders. ICCD 1998: 298-305 - [c42]Tomás Lang, Enric Musoll, Jordi Cortadella:
Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. ICCD 1998: 414-419 - [c41]Alberto Nannarelli, Tomás Lang:
Low-power radix-8 divider. ICCD 1998: 420-426 - [c40]Alberto Nannarelli, Tomás Lang:
Power-delay tradeoffs for radix-4 and radix-8 dividers. ISLPED 1998: 109-111 - 1997
- [j41]Elisardo Antelo
Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm. IEEE Trans. Computers 46(11): 1264-1271 (1997) - [c39]Tomás Lang, Elisardo Antelo:
CORDIC Vectoring with Arbitrary Target Value. IEEE Symposium on Computer Arithmetic 1997: 108-115 - [c38]Julio Villalba, Tomás Lang:
Low latency word serial CORDIC. ASAP 1997: 124-131 - [c37]Tomás Lang, Elisardo Antelo:
CORDIC-based computation of arccos and arcsin. ASAP 1997: 132-143 - [c36]Toni Juan, Tomás Lang, Juan J. Navarro:
Reducing TLB power requirements. ISLPED 1997: 196-201 - [c35]Enric Musoll, Tomás Lang, Jordi Cortadella
Exploiting the locality of memory references to reduce the address bus energy. ISLPED 1997: 202-207 - 1996
- [j40]Javier D. Bruguera, Nicolás Guil, Tomás Lang, Julio Villalba, Emilio L. Zapata:
Cordic based parallel/pipelined architecture for the Hough transform. J. VLSI Signal Process. 12(3): 207-221 (1996) - [j39]Milos D. Ercegovac, Tomás Lang:
On recoding in arithmetic algorithms. J. VLSI Signal Process. 14(3): 283-294 (1996) - [c34]Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata:
High Radix Cordic Rotation Based on Selection by Rounding. Euro-Par, Vol. II 1996: 155-164 - [c33]Toni Juan, Tomás Lang, Juan J. Navarro:
The Difference-bit Cache. ISCA 1996: 114-120 - [c32]Alberto Nannarelli, Tomás Lang:
Low-power radix-4 divider. ISLPED 1996: 205-208 - 1995
- [j38]Mateo Valero
Conflict-Free Access for Streams in Multimodule Memories. IEEE Trans. Computers 44(5): 634-646 (1995) - [c31]Milos D. Ercegovac, Tomás Lang:
Sign detection and comparison networks with a small number of transitions. IEEE Symposium on Computer Arithmetic 1995: 59-66 - [c30]Tomás Lang, Paolo Montuschi:
Very-high radix combined division and square root with prescaling and selection by rounding. IEEE Symposium on Computer Arithmetic 1995: 124-131 - [c29]Javier D. Bruguera, Tomás Lang:
2-D DCT using on-line arithmetic. ICASSP 1995: 3275-3278 - [c28]Montse Peiron, Mateo Valero, Eduard Ayguadé, Tomás Lang:
Vector Multiprocessors with Arbitrated Memory Access. ISCA 1995: 243-252 - 1994
- [j37]Milos D. Ercegovac, Tomás Lang, Paolo Montuschi
Very-High Radix Division with Prescaling and Selection by Rounding. IEEE Trans. Computers 43(8): 909-918 (1994) - [j36]Jordi Cortadella
High-Radix Division and Square-Root with Speculation. IEEE Trans. Computers 43(8): 919-931 (1994) - [c27]Juan J. Navarro, Toni Juan, Tomás Lang:
MOB forms: a class of multilevel block algorithms for dense linear algebra operations. International Conference on Supercomputing 1994: 354-363 - 1993
- [j35]Milos D. Ercegovac, Tomás Lang:
Multiplication/ division/ square root module for massively parallel computers. Integr. 16(3): 221-234 (1993) - [j34]Montse Peiron, Mateo Valero
Conflict-free access to streams in multiprocessor systems. Microprocess. Microprogramming 38(1-5): 119-130 (1993) - [j33]Tomás Lang, Jaime H. Moreno:
Introduction. J. VLSI Signal Process. 5(1): 6 (1993) - [c26]Jordi Cortadella
Division with speculation of quotient digits. IEEE Symposium on Computer Arithmetic 1993: 87-94 - [c25]Milos D. Ercegovac, Tomás Lang, Paolo Montuschi:
Very high radix division with selection by rounding and prescaling. IEEE Symposium on Computer Arithmetic 1993: 112-119 - 1992
- [j32]Leon Alkalaj, Tomás Lang, Milos D. Ercegovac:
Architectural Support for Goal Management in Flat Concurrent Prolog. Computer 25(8): 34-47 (1992) - [j31]Tomás Lang, Paolo Montuschi
Higher Radix Square Root with Prescaling. IEEE Trans. Computers 41(8): 996-1009 (1992) - [j30]Jeong-A Lee, Tomás Lang:
Constant-Factor Redundant CORDIC for Angle Calculation and Rotation. IEEE Trans. Computers 41(8): 1016-1025 (1992) - [j29]Milos D. Ercegovac, Tomás Lang:
On-the-Fly Rounding. IEEE Trans. Computers 41(12): 1497-1503 (1992) - [j28]Miguel Valero-García, Juan J. Navarro, José María Llabería
A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units. J. VLSI Signal Process. 4(1): 7-25 (1992) - [c24]Dinh Lê, Milos D. Ercegovac, Tomás Lang, Jaime H. Moreno:
MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs. ASAP 1992: 511-525 - [c23]Mateo Valero, Tomás Lang, Eduard Ayguadé:
Conflict-free access of vectors with power-of-two strides. ICS 1992: 149-156 - [c22]Mateo Valero, Tomás Lang, José M. Llabería, Montse Peiron, Eduard Ayguadé, Juan J. Navarro:
Increasing the Number of Strides for Conflict-Free Vector Access. ISCA 1992: 372-381 - 1991
- [j27]Milos D. Ercegovac, Tomás Lang:
Module to Perform Multiplication, Division, and Square Root in Systolic Arrays for Matrix Computations. J. Parallel Distributed Comput. 11(3): 212-221 (1991) - [j26]Mateo Valero, Tomás Lang, José María Llabería, Montse Peiron, Juan J. Navarro, Eduard Ayguadé:
Conflict-Free Strides for Vectors in Matched Memories. Parallel Process. Lett. 1: 95-102 (1991) - [j25]Miquel Huguet, Tomás Lang:
Architectural Support for Reduced Register Saving / Restoring in Single-Window Register Files. ACM Trans. Comput. Syst. 9(1): 66-97 (1991) - [j24]Jaime H. Moreno, Miguel E. Figueroa
Linear pseudosystolic array for partitioned matrix algorithms. J. VLSI Signal Process. 3(3): 201-214 (1991) - [c21]Jeong-A Lee, Tomás Lang:
SVD by constant-factor-redundant-CORDIC. IEEE Symposium on Computer Arithmetic 1991: 264-271 - [c20]Miguel Valero-García, Juan J. Navarro, José J. M. Liabería, Mateo Valero, Tomás Lang:
Mapping QR decomposition of a banded matrix on a ID systolic array with data contraflow and pipelined functional units. Algorithms and Parallel VLSI Architectures 1991: 25-38 - [c19]John A. Harding, Tomás Lang, Jeong-A Lee:
A Comparison of Redundant CORDIC Rotation Engines. ICCD 1991: 556-559 - 1990
- [j23]Jaime H. Moreno, Tomás Lang:
Matrix Computations on Systolic-Type Meshes. Computer 23(4): 32-51 (1990) - [j22]Tomás Lang, Lance Kurisaki:
Nonuniform Traffic Spots (NUTS) in Multistage Interconnection Networks. J. Parallel Distributed Comput. 10(1): 55-67 (1990) - [j21]Milos D. Ercegovac, Tomás Lang:
Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD. IEEE Trans. Computers 39(6): 725-740 (1990) - [j20]Milos D. Ercegovac, Tomás Lang:
Radix-4 Square Root Without Initial PLA. IEEE Trans. Computers 39(8): 1016-1024 (1990) - [j19]Milos D. Ercegovac, Tomás Lang:
Simple Radix-4 Division with Opterands Scaling. IEEE Trans. Computers 39(9): 1204-1208 (1990) - [j18]Milos D. Ercegovac, Tomás Lang:
Fast Multiplication Without Carry-Propagate Addition. IEEE Trans. Computers 39(11): 1385-1390 (1990) - [c18]Jaime H. Moreno, Tomás Lang:
A graph-based approach to map matrix algorithms onto local-access processor arrays. ASAP 1990: 641-652 - [c17]Lance Kurisaki, Tomás Lang:
The Performance of a Faulty Multistage Interconnection Network with Diverting Switches and Correction Links. ICPP (1) 1990: 190-193 - [c16]Isaac D. Scherson, Peter F. Corbett, Tomás Lang:
An Analytical Characterization of Generalized Shuffle-Exchange Networks. INFOCOM 1990: 409-414 - [c15]Leon Alkalaj, Tomás Lang, Milos D. Ercegovac:
Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog. ISCA 1990: 292-301 - [c14]Leon Alkalaj, Tomás Lang, Ehud Shapiro:
FCP Sequential Abstract Machine Characteristics for the Systems Development Workload. NACLP 1990: 321-339
1980 – 1989
- 1989
- [b1]Tomás Lang:
Vector computations in an array computer. Stanford University, USA, 1989 - [j17]Jaime H. Moreno, Tomás Lang:
Comments on 'A systolic array for computing BA-1'. IEEE Trans. Acoust. Speech Signal Process. 37(11): 1786-1789 (1989) - [c13]Milos D. Ercegovac, Tomás Lang:
Radix-4 square root without initial PLA. IEEE Symposium on Computer Arithmetic 1989: 162-168 - [c12]Milos D. Ercegovac, Tomás Lang:
On-the-fly rounding for division and square root. IEEE Symposium on Computer Arithmetic 1989: 169-173 - [c11]Lance Kurisaki, Tomás Lang:
Multistage Networks Including Traffic with Real-Time Constraints. ICPP (1) 1989: 19-22 - 1988
- [j16]Milos D. Ercegovac, Tomás Lang:
On-Line Scheme for Computing Rotation Factors. J. Parallel Distributed Comput. 5(3): 209-227 (1988) - [c10]Milos D. Ercegovac, Tomás Lang, Ramin Modiri:
Implementation of fast radix-4 division with operands scaling. ICCD 1988: 486-489 - [c9]Jaime H. Moreno, Tomás Lang:
Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive Closure. ICPP (1) 1988: 28-31 - [c8]Tomás Lang, Lance Kurisaki:
Nonuniform Traffic Spots in Multistage Interconnection Networks. ICPP (1) 1988: 191-195 - 1987
- [j15]Milos D. Ercegovac, Tomás Lang:
On-the-Fly Conversion of Redundant into Conventional Representations. IEEE Trans. Computers 36(7): 895-897 (1987) - [c7]Milos D. Ercegovac, Tomás Lang:
On-line scheme for computing rotation factors. IEEE Symposium on Computer Arithmetic 1987: 196-203 - [c6]Miquel Huguet, Tomás Lang, Yuval Tamir:
A block-and-actions generator as an alternative to a simulator for collecting architecture measurements. PLDI 1987: 14-25 - 1986
- [j14]Tomás Lang, Miquel Huguet:
Reduced register saving/restoring in single-window register files. SIGARCH Comput. Archit. News 14(3): 17-26 (1986) - [c5]Jaime H. Moreno, Tomás Lang:
Replication and Pipelining in Multiple-Instance Algorithms. ICPP 1986: 285-292 - 1985
- [j13]Miquel Huguet, Tomás Lang:
A reduced register file for RISC architectures. SIGARCH Comput. Archit. News 13(4): 22-31 (1985) - [c4]Milos D. Ercegovac, Tomás Lang:
A division algorithm with prediction of quotient digits. IEEE Symposium on Computer Arithmetic 1985: 51-56 - 1983
- [j12]Christopher Wood, Eduardo B. Fernández
Minimization of Demand Paging for the LRU Stack Model of Program Behavior. Inf. Process. Lett. 16(2): 99-104 (1983) - [j11]Tomás Lang, Mateo Valero
Reduction of Connections for Multibus Organization. IEEE Trans. Computers 32(8): 707-716 (1983) - [c3]Mateo Valero, José María Llabería
A performance evaluation of the multiple bus network for multiprocessor systems. SIGMETRICS 1983: 200-206 - 1982
- [j10]Tomás Lang, Mateo Valero
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors. IEEE Trans. Computers 31(12): 1227-1234 (1982)
1970 – 1979
- 1978
- [j9]Eduardo B. Fernández
Effect of Replacement Algorithms on a Paged Buffer Database System. IBM J. Res. Dev. 22(2): 185-196 (1978) - [j8]Eduardo B. Fernández, Rita C. Summers, Tomás Lang, Charles D. Coleman:
Architectural Support for System Protection and Database Security. IEEE Trans. Computers 27(8): 767-771 (1978) - 1977
- [j7]Tomás Lang, Eduardo B. Fernández
Improving the Computation of Lower Bounds for Optimal Schedules. IBM J. Res. Dev. 21(3): 273-280 (1977) - [j6]Tomás Lang, Christopher Wood, Eduardo B. Fernández
Database Buffer Paging in Virtual Storage Systems. ACM Trans. Database Syst. 2(4): 339-351 (1977) - [c2]Tomás Lang, Eduardo B. Fernández
A system architecture for compile-time actions in databases. ACM Annual Conference 1977: 11-15 - 1976
- [j5]Eduardo B. Fernández
Scheduling as a Graph Transformation. IBM J. Res. Dev. 20(6): 551-559 (1976) - [j4]Tomás Lang, Eduardo B. Fernández
Scheduling of Unit-Length Independent Tasks with Execution Constraints. Inf. Process. Lett. 4(4): 95-98 (1976) - [j3]Tomás Lang, Harold S. Stone:
A Shuffle-Exchange Network with Simplified Control. IEEE Trans. Computers 25(1): 55-65 (1976) - [j2]Tomás Lang:
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network. IEEE Trans. Computers 25(5): 496-503 (1976) - 1975
- [j1]Eduardo B. Fernández
Computation of Lower Bounds for Multiprocessor Schedules. IBM J. Res. Dev. 19(5): 435-444 (1975) - [c1]Eduardo B. Fernández
Definition and Evaluation of Access Rules in Data Management Systems. VLDB 1975: 268-285
Coauthor Index
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