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Milos D. Ercegovac
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- affiliation: University of California, Los Angeles, USA
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2020 – today
- 2024
- [j49]David M. Harris
, James E. Stine
Unified Digit Selection for Radix-4 Recurrence Division and Square Root. IEEE Trans. Computers 73(1): 292-300 (2024) - 2023
- [j48]Muhammad Usman
Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. J. Signal Process. Syst. 95(7): 777-796 (2023) - [j47]Tooba Arifeen
Low Latency and High Throughput Pipelined Online Adder for Streaming Inner Product. J. Signal Process. Syst. 95(7): 815-829 (2023) - [c87]Saeid Gorgin, Mohammad H. Golamrezaei, Jeong-A Lee, Milos D. Ercegovac:
An Efficient Dot-Product Unit Based on Online Arithmetic for Variable Precision Applications. ACSSC 2023: 950-954 - [c86]Saeid Gorgin, Mohammadreza Najafi, Mohammad H. Golamrezaei, Jeong-A Lee, Milos D. Ercegovac:
MSDF-SVM: Advantage of Most Significant Digit First Arithmetic for SVM Realization. ACSSC 2023: 955-959 - [c85]Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac:
Multiplier Optimization via E-Graph Rewriting. ACSSC 2023: 1528-1533 - [i4]Muhammad Usman, Milos D. Ercegovac, Jeong-A Lee:
Low-Latency Online Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. CoRR abs/2304.12946 (2023) - [i3]Andy Wanna, Samuel Coward, Theo Drane, George A. Constantinides, Milos D. Ercegovac:
Multiplier Optimization via E-Graph Rewriting. CoRR abs/2312.06004 (2023) - 2022
- [i2]Muhammad Usman, Jeong-A Lee, Milos D. Ercegovac:
Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. CoRR abs/2204.09515 (2022) - 2021
- [c84]Muhammad Usman
Multiplier with Reduced Activities and Minimized Interconnect for Inner Product Arrays. ACSCC 2021: 1-5 - [c83]Tooba Arifeen, Abdus Sami Hassan, Jeong-A Lee, Milos D. Ercegovac:
Adder with Reduced Latency and Minimized Interconnect for Streaming Inner Products. ACSCC 2021: 938-942 - 2020
- [c82]Milos D. Ercegovac:
On Reducing Module Activities in Online Arithmetic Operations. ACSSC 2020: 524-528 - [c81]James E. Stine, Milos D. Ercegovac, Jean-Michel Muller
An Architecture for Improving Variable Radix Real and Complex Division Using Recurrence Division. ACSSC 2020: 529-533
2010 – 2019
- 2019
- [c80]Milos D. Ercegovac, James E. Stine
Conditional Estimation of Residuals with Prescaling for Use in Low-Energy Division Units. ACSSC 2019: 603-607 - 2017
- [c79]Milos D. Ercegovac:
On left-to-right arithmetic. ACSSC 2017: 750-754 - 2016
- [j46]Wen Yan
An Energy-Efficient Multiplier With Fully Overlapped Partial Products Reduction and Final Addition. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1954-1963 (2016) - [c78]Wen Yan, Milos D. Ercegovac:
Radix-4 energy efficient carry-free truncated multiplier. ACSSC 2016: 1596-1600 - 2015
- [c77]Ching-En Lee, Milos D. Ercegovac:
An error-compensated piecewise linear logarithmic arithmetic unit for phong lighting acceleration. ACSSC 2015: 747-751 - 2014
- [j45]Dong Wang, Milos D. Ercegovac, Yang Xiao:
Complex Function Approximation Using Two-Dimensional Interpolation. IEEE Trans. Computers 63(12): 2948-2960 (2014) - [j44]Dong Wang, Jean-Michel Muller
(M, p, k)-Friendly Points: A Table-Based Method to Evaluate Trigonometric Function. IEEE Trans. Circuits Syst. II Express Briefs 61-II(9): 711-715 (2014) - [c76]Milos D. Ercegovac, Lu Meng:
Low-power radix-4 quotient generator. ACSSC 2014: 1252-1255 - [c75]Hojat Parta, Milos D. Ercegovac, Sudhakar Pamarti
RF digital predistorter implementation using polynomial optimization. MWSCAS 2014: 981-984 - 2013
- [c74]Milos D. Ercegovac:
On approximate arithmetic. ACSSC 2013: 126-130 - [c73]Seok Won Heo, Suk Joong Huh, Milos D. Ercegovac:
Power optimization of sum-of-products design for signal processing applications. ASAP 2013: 192-197 - [c72]Seok Won Heo, Suk Joong Huh, Milos D. Ercegovac:
Power optimization in a parallel multiplier using voltage islands. ISCAS 2013: 345-348 - [c71]Jason Cong, Milos D. Ercegovac, Muhuan Huang, Sen Li, Bingjun Xiao:
Energy-efficient computing using adaptive table lookup based on nonvolatile memories. ISLPED 2013: 280-285 - 2012
- [j43]Dong Wang, Milos D. Ercegovac:
A Radix-16 Combined Complex Division/Square Root Unit with Operand Prescaling. IEEE Trans. Computers 61(9): 1243-1255 (2012) - [c70]Milos D. Ercegovac, Robert McIlhenny:
Shared implementation of radix-10 and radix-16 square root algorithm with limited precision primitives. ACSCC 2012: 345-349 - [c69]Pouya Dormiani, Milos D. Ercegovac:
Linearization using efficient complex polynomial evaluations. ACSCC 2012: 988-992 - [c68]Milos D. Ercegovac:
Session TP8a3: Design methodology and computer arithmetic. ACSCC 2012: 1437-1438 - [c67]Nicolas Brisebarre, Milos D. Ercegovac, Jean-Michel Muller
(M, p, k)-Friendly Points: A Table-Based Method for Trigonometric Function Evaluation. ASAP 2012: 46-52 - 2011
- [j42]Parag Kulkarni, Puneet Gupta
Trading Accuracy for Power in a Multiplier Architecture. J. Low Power Electron. 7(4): 490-501 (2011) - [c66]Milos D. Ercegovac, Robert McIlhenny:
Shared implementation of radix-10 and radix-16 division algorithm with limited precision primitives. ACSCC 2011: 1828-1832 - [c65]Shawn Singh, Seung hyun Pan, Milos D. Ercegovac:
Accelerating the photon mapping algorithm and its hardware implementation. ASAP 2011: 149-157 - [c64]Parag Kulkarni, Puneet Gupta
Trading Accuracy for Power with an Underdesigned Multiplier Architecture. VLSI Design 2011: 346-351 - [e1]Joseph R. Cavallaro, Milos D. Ercegovac, Frank Hannig, Paolo Ienne, Earl E. Swartzlander Jr., Alexandre F. Tenca:
22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-1291-3 [contents] - 2010
- [j41]Dong Wang, Milos D. Ercegovac, Nanning Zheng:
Design of High-Throughput Fixed-Point Complex Reciprocal/Square-Root Unit. IEEE Trans. Circuits Syst. II Express Briefs 57-II(8): 627-631 (2010) - [j40]Milos D. Ercegovac, Jean-Michel Muller
An Efficient Method for Evaluating Complex Polynomials. J. Signal Process. Syst. 58(1): 17-27 (2010) - [c63]Nicolas Brisebarre, Nicolas Louvet, Érik Martin-Dorel, Jean-Michel Muller
Implementing decimal floating-point arithmetic through binary: Some suggestions. ASAP 2010: 317-320 - [i1]Jean-Claude Bajard, Sylvain Duquesne, Milos D. Ercegovac:
Combining leak-resistant arithmetic for elliptic curves defined over Fp and RNS representation. IACR Cryptol. ePrint Arch. 2010: 311 (2010)
2000 – 2009
- 2009
- [j39]Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A Lee:
Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming. J. Circuits Syst. Comput. 18(4): 787-800 (2009) - [c62]Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Muller
Design and Implementation of a Radix-4 Complex Division Unit with Prescaling. ASAP 2009: 83-90 - [c61]Dong Wang, Milos D. Ercegovac, Nanning Zheng:
A radix-8 complex divider for FPGA implementation. FPL 2009: 236-241 - 2008
- [c60]Milos D. Ercegovac, Robert McIlhenny:
Design and FPGA implementation of radix-10 algorithm for division with limited precision primitives. ACSCC 2008: 762-766 - [c59]Nicolas Brisebarre, Sylvain Chevillard, Milos D. Ercegovac, Jean-Michel Muller
An efficient method for evaluating polynomial and rational function approximations. ASAP 2008: 233-238 - [p1]Florent de Dinechin, Milos D. Ercegovac, Jean-Michel Muller, Nathalie Revol:
Digital Arithmetic. Wiley Encyclopedia of Computer Science and Engineering 2008 - 2007
- [j38]Milos D. Ercegovac, Jean-Michel Muller
Complex Square Root with Operand Prescaling. J. VLSI Signal Process. 49(1): 19-30 (2007) - [c58]Milos D. Ercegovac, Jean-Michel Muller:
A Hardware-Oriented Method for Evaluating Complex Polynomials. ASAP 2007: 122-127 - [c57]Jeong-Gun Lee, Jeong-A Lee, Byeong-Seok Lee, Milos D. Ercegovac:
A Design Method for Heterogeneous Adders. ICESS 2007: 121-132 - [c56]Thomas Y. Yeh, Petros Faloutsos, Milos D. Ercegovac, Sanjay J. Patel, Glenn Reinman:
The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. MICRO 2007: 394-406 - 2005
- [j37]Zhijun Huang, Milos D. Ercegovac:
High-Performance Low-Power Left-to-Right Array Multiplier Design. IEEE Trans. Computers 54(3): 272-283 (2005) - [j36]José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation. J. VLSI Signal Process. 40(1): 109-123 (2005) - [c55]Pavan Adharapurapu, Milos D. Ercegovac:
A Linear-System Operator Based Scheme for Evaluation of Multinomials. IEEE Symposium on Computer Arithmetic 2005: 249-256 - [c54]Milos D. Ercegovac, Jean-Michel Muller
Variable Radix Real and Complex Digit-Recurrence Division. ASAP 2005: 316-321 - [c53]Robert McIlhenny, Milos D. Ercegovac:
RAVIOLI - Reconfigurable Arithmetic Variable-Precision Implementations of On-Line Instructions. FCCM 2005: 275-276 - 2004
- [j35]José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
Algorithm and Architecture for Logarithm, Exponential, and Powering Computation. IEEE Trans. Computers 53(9): 1085-1096 (2004) - [c52]Milos D. Ercegovac, Jean-Michel Muller:
Complex Square Root with Operand Prescaling. ASAP 2004: 52-62 - [c51]David A. Rennels, Milos D. Ercegovac:
From the University of Illinois via JPL and UCLA to Vytautas Magnus University - 50 years of computer engineering by Algirdas Avizienis. IFIP Congress Topical Sessions 2004: 175-189 - 2003
- [j34]Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig:
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits 38(1): 160-161 (2003) - [j33]Deming Chen, Jason Cong, Milos D. Ercegovac, Zhijun Huang:
Performance-driven mapping for CPLD architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(10): 1424-1431 (2003) - [c50]Zhijun Huang, Milos D. Ercegovac:
High-Performance Left-to-Right Array Multiplier Design. IEEE Symposium on Computer Arithmetic 2003: 4-11 - [c49]José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
High-Radix Iterative Algorithm for Powering Computation. IEEE Symposium on Computer Arithmetic 2003: 204-211 - [c48]José-Alejandro Piñeiro, Javier D. Bruguera, Milos D. Ercegovac:
On-line high-radix exponential with selection by rounding. ISCAS (4) 2003: 121-124 - 2002
- [c47]José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
High-Radix Logarithm with Selection by Rounding. ASAP 2002: 101-110 - [c46]José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera:
Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm. ICCD 2002: 132-137 - [c45]Zhijun Huang, Milos D. Ercegovac:
Two-dimensional signal gating for low-power array multiplier design. ISCAS (1) 2002: 489-492 - [c44]Vijay Raghunathan, Anand Raghunathan
High-Level Synthesis with SIMD Units. ASP-DAC/VLSI Design 2002: 407-413 - 2001
- [j32]Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor:
A FPGA-based Library for On-Line Signal Processing. J. VLSI Signal Process. 28(1-2): 129-143 (2001) - [c43]Zhijun Huang, Milos D. Ercegovac:
FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector Normalization. FCCM 2001: 61-70 - [c42]Deming Chen, Jason Cong, Milos D. Ercegovac, Zhijun Huang:
Performance-driven mapping for CPLD architectures. FPGA 2001: 39-47 - 2000
- [j31]Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. IEEE Trans. Computers 49(7): 628-637 (2000) - [j30]Milos D. Ercegovac, Laurent Imbert, David W. Matula, Jean-Michel Muller
Improving Goldschmidt Division, Square Root, and Square Root Reciprocal. IEEE Trans. Computers 49(7): 759-763 (2000) - [c41]Aaron Schneider, Robert McIlhenny, Milos D. Ercegovac:
BigSky-An On-Line Arithmetic Design Tool for FPGAs. FCCM 2000: 303-304 - [c40]Jeffrey M. Fischer, Milos D. Ercegovac:
A Component Framework for Communication in Distributed Applications. IPDPS 2000: 647-654
1990 – 1999
- 1999
- [c39]Alexandre F. Tenca, Milos D. Ercegovac:
On the Design of High-Radix On-Line Division for Long Precision. IEEE Symposium on Computer Arithmetic 1999: 44-51 - [c38]Milos D. Ercegovac, Darko Kirovski, Miodrag Potkonjak:
Low-Power Behavioral Synthesis Optimization Using Multiple Precision Arithmetic. DAC 1999: 568-573 - [c37]Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor:
FPGA-Based Structures for On-Line FFT and DCT. FCCM 1999: 310-311 - 1998
- [j29]Mircea R. Stan
Long and Fast Up/Down Counters. IEEE Trans. Computers 47(7): 722-735 (1998) - [c36]Alexandre F. Tenca, Milos D. Ercegovac:
A Variable Long-Precision Arithmetic Unit Design for Reconfigurable Coprocessor Architectures. FCCM 1998: 216-225 - [c35]Milos D. Ercegovac, Darko Kirovski, George Mustafa, Miodrag Potkonjak:
Behavioral synthesis optimization using multiple precision arithmetic. ICASSP 1998: 3113-3116 - 1997
- [c34]Alexandre F. Tenca, Milos D. Ercegovac:
Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size. FPGA 1997: 159-165 - 1996
- [j28]Raffi Dionysian, Milos D. Ercegovac:
Vector quantization with compressed codebooks. Signal Process. Image Commun. 9(1): 79-88 (1996) - [j27]Raffi Dionysian, Milos D. Ercegovac:
Vector quantization with variable-precision classification. IEEE Trans. Image Process. 5(11): 1528-1538 (1996) - [j26]Milos D. Ercegovac, Tomás Lang:
On recoding in arithmetic algorithms. J. VLSI Signal Process. 14(3): 283-294 (1996) - 1995
- [j25]Marianne E. Louie, Milos D. Ercegovac:
A variable-precision square root implementation for field programmable gate arrays. J. Supercomput. 9(3): 315-336 (1995) - [c33]Milos D. Ercegovac, Tomás Lang:
Sign detection and comparison networks with a small number of transitions. IEEE Symposium on Computer Arithmetic 1995: 59-66 - 1994
- [j24]Milos D. Ercegovac, Tomás Lang, Paolo Montuschi
Very-High Radix Division with Prescaling and Selection by Rounding. IEEE Trans. Computers 43(8): 909-918 (1994) - [j23]John S. Fernando, Milos D. Ercegovac:
Conventional and on-line arithmetic designs for high-speed recursive digital filters. J. VLSI Signal Process. 7(3): 189-197 (1994) - [j22]Marianne E. Louie, Milos D. Ercegovac:
Implementing division with field programmable gate arrays. J. VLSI Signal Process. 7(3): 271-285 (1994) - 1993
- [j21]Milos D. Ercegovac, Tomás Lang:
Multiplication/ division/ square root module for massively parallel computers. Integr. 16(3): 221-234 (1993) - [c32]Milos D. Ercegovac, Tomás Lang, Paolo Montuschi:
Very high radix division with selection by rounding and prescaling. IEEE Symposium on Computer Arithmetic 1993: 112-119 - [c31]Marianne E. Louie, Milos D. Ercegovac:
On digit-recurrence division implementations for field programmable gate arrays. IEEE Symposium on Computer Arithmetic 1993: 202-209 - [c30]James J. Liu, Milos D. Ercegovac:
Symbolic Synthesis of Parallel Processing Systems. IPPS 1993: 496-500 - [c29]James J. Liu, Milos D. Ercegovac:
ALIAS Environment: A Design Tool for Application Specific Arrays. SPDP 1993: 504-511 - 1992
- [j20]Leon Alkalaj, Tomás Lang, Milos D. Ercegovac:
Architectural Support for Goal Management in Flat Concurrent Prolog. Computer 25(8): 34-47 (1992) - [j19]Alex Kapelnikov, Richard R. Muntz, Milos D. Ercegovac:
A methodology for performance analysis of parallel computations with looping constructs. J. Parallel Distributed Comput. 14(2): 105-120 (1992) - [j18]Milos D. Ercegovac, Tomás Lang:
On-the-Fly Rounding. IEEE Trans. Computers 41(12): 1497-1503 (1992) - [c28]Dinh Lê, Milos D. Ercegovac, Tomás Lang, Jaime H. Moreno:
MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs. ASAP 1992: 511-525 - [c27]Raffi Dionysian, Milos D. Ercegovac:
Variable Precision Representation for Efficient VQ Codebook Storage. Data Compression Conference 1992: 319-328 - 1991
- [j17]Milos D. Ercegovac, Tomás Lang:
Module to Perform Multiplication, Division, and Square Root in Systolic Arrays for Matrix Computations. J. Parallel Distributed Comput. 11(3): 212-221 (1991) - [j16]Paul K.-G. Tu, Milos D. Ercegovac:
Gate array implementation of on-line algorithms for floating-point operations. J. VLSI Signal Process. 3(4): 307-317 (1991) - [c26]Paul K.-G. Tu, Milos D. Ercegovac:
Application of on-line arithmetic algorithms to the SVD computation: preliminary results. IEEE Symposium on Computer Arithmetic 1991: 246-255 - 1990
- [j15]Milos D. Ercegovac, Tomás Lang:
Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD. IEEE Trans. Computers 39(6): 725-740 (1990) - [j14]Milos D. Ercegovac, Tomás Lang:
Radix-4 Square Root Without Initial PLA. IEEE Trans. Computers 39(8): 1016-1024 (1990) - [j13]Milos D. Ercegovac, Tomás Lang:
Simple Radix-4 Division with Opterands Scaling. IEEE Trans. Computers 39(9): 1204-1208 (1990) - [j12]Milos D. Ercegovac, Tomás Lang:
Fast Multiplication Without Carry-Propagate Addition. IEEE Trans. Computers 39(11): 1385-1390 (1990) - [c25]Leon Alkalaj, Tomás Lang, Milos D. Ercegovac:
Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog. ISCA 1990: 292-301
1980 – 1989
- 1989
- [j11]Alex Kapelnikov, Richard R. Muntz, Milos D. Ercegovac:
A Modeling Methodology for the Analysis of Concurrent Systems and Computations. J. Parallel Distributed Comput. 6(3): 568-597 (1989) - [c24]Ralph Hans Brackert Jr., Milos D. Ercegovac, Alan N. Willson Jr.:
Design of an on-line multiply-add module for recursive digital filters. IEEE Symposium on Computer Arithmetic 1989: 34-41 - [c23]Paul K.-G. Tu, Milos D. Ercegovac:
Design of on-line division unit. IEEE Symposium on Computer Arithmetic 1989: 42-49 - [c22]Milos D. Ercegovac, Tomás Lang:
Radix-4 square root without initial PLA. IEEE Symposium on Computer Arithmetic 1989: 162-168 - [c21]Milos D. Ercegovac, Tomás Lang:
On-the-fly rounding for division and square root. IEEE Symposium on Computer Arithmetic 1989: 169-173 - 1988
- [j10]Milos D. Ercegovac, Tomás Lang:
On-Line Scheme for Computing Rotation Factors. J. Parallel Distributed Comput. 5(3): 209-227 (1988) - [j9]Milos D. Ercegovac:
Heterogeneity in supercomputer architectures. Parallel Comput. 7(3): 367-372 (1988) - [c20]Milos D. Ercegovac, Tomás Lang, Ramin Modiri:
Implementation of fast radix-4 division with operands scaling. ICCD 1988: 486-489 - 1987
- [j8]Milos D. Ercegovac, Tomás Lang:
On-the-Fly Conversion of Redundant into Conventional Representations. IEEE Trans. Computers 36(7): 895-897 (1987) - [c19]Paul K.-G. Tu, Milos D. Ercegovac:
A radix-4 on-line division algorithm. IEEE Symposium on Computer Arithmetic 1987: 181-187 - [c18]Milos D. Ercegovac, Tomás Lang:
On-line scheme for computing rotation factors. IEEE Symposium on Computer Arithmetic 1987: 196-203 - 1985
- [j7]Jean-Luc Gaudiot, Milos D. Ercegovac:
Performance evaluation of a simulated data-flow computer with low-resolution actors. J. Parallel Distributed Comput. 2(4): 321-351 (1985) - [c17]Milos D. Ercegovac, Tomás Lang:
A division algorithm with prediction of quotient digits. IEEE Symposium on Computer Arithmetic 1985: 51-56 - [c16]F. Meshkinpour, Milos D. Ercegovac:
A functional language for description and design of digital systems: sequential constructs. DAC 1985: 238-244 - [c15]Dorab Patel, Martine D. F. Schlag, Milos D. Ercegovac:
vFP: An Environment for the Multi-level Specification, Analysis, and Synthesis of Hardware Algorithms. FPCA 1985: 238-255 - 1984
- [j6]Cauligi S. Raghavendra, Algirdas Avizienis, Milos D. Ercegovac:
Fault Tolerance in Binary Tree Architectures. IEEE Trans. Computers 33(6): 568-572 (1984) - [c14]Jean-Luc Gaudiot, Milos D. Ercegovac:
Performance Analysis of a Data-Flow Computer with Variable Resolution Actors. ICDCS 1984: 2-9 - 1983
- [j5]Osaaki Watanuki, Milos D. Ercegovac:
Error Analysis of Certain Floating-Point On-Line Algorithms. IEEE Trans. Computers 32(4): 352-358 (1983) - [c13]Milos D. Ercegovac:
A higher-radix division with simple selection of quotient digits. IEEE Symposium on Computer Arithmetic 1983: 94-98 - [c12]Aksenti L. Grnarov, Milos D. Ercegovac:
On-line multiplicative normalization. IEEE Symposium on Computer Arithmetic 1983: 151-155 - 1982
- [j4]Vojin G. Oklobdzija, Milos D. Ercegovac:
A On-Line Square Root Algorithm. IEEE Trans. Computers 31(1): 70-75 (1982) - [c11]Jean-Luc Gaudiot, Milos D. Ercegovac:
A scheme for handling arrays in data-flow systems. ICDCS 1982: 724-729 - 1981
- [c10]Abdolali Gorji-Sinaki, Milos D. Ercegovac:
Design of a digit-slice on-line arithmetic unit. IEEE Symposium on Computer Arithmetic 1981: 72-80 - [c9]Osaaki Watanuki, Milos D. Ercegovac:
Floating-point on-line arithmetic: Algorithms. IEEE Symposium on Computer Arithmetic 1981: 81-86 - [c8]Osaaki Watanuki, Milos D. Ercegovac:
Floating-point on-line arithmetic: Error analysis. IEEE Symposium on Computer Arithmetic 1981: 87-91 - [c7]Cauligi S. Raghavendra, Milos D. Ercegovac:
A simulator for on-line arithmetic. IEEE Symposium on Computer Arithmetic 1981: 92-98 - [c6]M. Feller, Milos D. Ercegovac:
Queue machines: an organization for parallel computation. CONPAR 1981: 37-47
1970 – 1979
- 1978
- [c5]Milos D. Ercegovac:
An on-line square rooting algorithm. IEEE Symposium on Computer Arithmetic 1978: 183-189 - [c4]Milos D. Ercegovac, Melvin M. Takata:
An arithmetic module for efficient evaluation of functions. IEEE Symposium on Computer Arithmetic 1978: 190-199 - 1977
- [j3]Milos D. Ercegovac:
A General Hardware-Oriented Method for Evaluation of Functions and Computations in a Digital Computer. IEEE Trans. Computers 26(7): 667-680 (1977) - [j2]Kishor S. Trivedi, Milos D. Ercegovac:
On-Line Algorithms for Division and Multiplication. IEEE Trans. Computers 26(7): 681-687 (1977) - 1975
- [b1]Milos D. Ercegovac:
A General Method for Evaluation of Functions and Computations in A Digital Computer. University of Illinois Urbana-Champaign, USA, 1975 - [c3]Milos D. Ercegovac:
A general method for evaluation of functions and computations in a digital computing. IEEE Symposium on Computer Arithmetic 1975: 147-157 - [c2]Kishor S. Trivedi, Milos D. Ercegovac:
On-line algorithms for division and multiplication. IEEE Symposium on Computer Arithmetic 1975: 161-167 - 1973
- [j1]Milos D. Ercegovac:
Radix-16 Evaluation of Certain Elementary Functions. IEEE Trans. Computers 22(6): 561-566 (1973) - 1972
- [c1]Milos D. Ercegovac:
Eadix l6 evaluation of some elementary functions. IEEE Symposium on Computer Arithmetic 1972: 1-25
Coauthor Index
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last updated on 2024-08-05 20:20 CEST by the dblp team
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