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Shoichi Masui
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2020 – today
- 2023
- [j16]Fan Yang
, Shigeyuki Odashima, Sosuke Yamao, Hiroaki Fujimoto, Shoichi Masui, Shan Jiang:
A unified multi-view multi-person tracking framework. Comput. Vis. Media 10(1): 137-160 (2023) - [c12]Fan Yang
Is Weakly-Supervised Action Segmentation Ready for Human-Robot Interaction? No, Let's Improve It with Action-Union Learning. IROS 2023: 9800-9807 - [c11]Fan Yang
Hard to Track Objects with Irregular Motions and Similar Appearances? Make It Easier by Buffering the Matching Space. WACV 2023: 4788-4797 - [i5]Fan Yang, Shigeyuki Odashima, Sosuke Yamao, Hiroaki Fujimoto, Shoichi Masui, Shan Jiang:
A Unified Multi-view Multi-person Tracking Framework. CoRR abs/2302.03820 (2023) - 2022
- [c10]Silvio Giancola, Anthony Cioppa, Adrien Deliège, Floriane Magera, Vladimir Somers
SoccerNet 2022 Challenges Results. MMSports@MM 2022: 75-86 - [i4]Silvio Giancola, Anthony Cioppa, Adrien Deliège, Floriane Magera, Vladimir Somers, Le Kang, Xin Zhou, Olivier Barnich, Christophe De Vleeschouwer, Alexandre Alahi, Bernard Ghanem, Marc Van Droogenbroeck, Abdulrahman Darwish, Adrien Maglo, Albert Clapés, Andreas Luyts, Andrei Boiarov, Artur Xarles, Astrid Orcesi, Avijit Shah, Baoyu Fan, Bharath Comandur, Chen Chen, Chen Zhang, Chen Zhao, Chengzhi Lin, Cheuk-Yiu Chan, Chun Chuen Hui, Dengjie Li, Fan Yang, Fan Liang, Fang Da, Feng Yan, Fufu Yu, Guanshuo Wang, H. Anthony Chan, He Zhu, Hongwei Kan, Jiaming Chu, Jianming Hu, Jianyang Gu
SoccerNet 2022 Challenges Results. CoRR abs/2210.02365 (2022) - [i3]Fan Yang, Shigeyuki Odashima, Shoichi Masui, Shan Jiang:
The Second-place Solution for CVPR 2022 SoccerNet Tracking Challenge. CoRR abs/2211.13481 (2022) - [i2]Fan Yang, Shigeyuki Odashima, Shoichi Masui, Shan Jiang:
The Second-place Solution for ECCV 2022 Multiple People Tracking in Group Dance Challenge. CoRR abs/2211.13509 (2022) - [i1]Fan Yang, Shigeyuki Odashima, Shoichi Masui, Shan Jiang:
Hard to Track Objects with Irregular Motions and Similar Appearances? Make It Easier by Buffering the Matching Space. CoRR abs/2211.14317 (2022)
2010 – 2019
- 2017
- [j15]Shoichi Masui:
Foreword. IEICE Trans. Electron. 100-C(6): 513-514 (2017) - 2016
- [c9]Hiroyuki Sato, Kazuhiro Yoshimura, Hiroyuki Nakamoto, Daijiro Ishibashi, Yoshihiro Nakata, Yoshinori Yaginuma, Shoichi Masui:
19.2 cm3 flexible fetal heart rate sensor for improved quality of pregnancy life. BioCAS 2016: 140-143 - 2015
- [j14]Ao Ba, Maja Vidojkovic, Kouichi Kanda, Nauman F. Kiyani, Maarten Lont, Xiongchuan Huang, Xiaoyan Wang, Cui Zhou, Yao-Hong Liu
A 0.33 nJ/bit IEEE802.15.6/Proprietary MICS/ISM Wireless Transceiver With Scalable Data Rate for Medical Implantable Applications. IEEE J. Biomed. Health Informatics 19(3): 920-929 (2015) - [c8]Christian Bachmann
A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS. VLSIC 2015: 94- - 2014
- [c7]Hiroyuki Ito, Yoshihiro Yoneda, Taiki Ibe, Taisuke Hamada, Noboru Ishihara, Kazuya Masu, Shoichi Masui, Youichi Momiyama:
An ultra-low-power RF transceiver with a 1.5-pJ/bit maximally-digital impulse-transmitter and an 89.5-μW super-regenerative RSSI. A-SSCC 2014: 265-268 - [c6]Xiaoyan Wang, Nauman F. Kiyani, Maja Vidojkovic, Kathleen Philips, Harmke de Groot, Shoichi Masui:
A WBAN 802.15.6 compliant multi-band re-configurable Transceiver for Medical Applicaitons. BODYNETS 2014 - [c5]Maja Vidojkovic, Xiongchuan Huang, Xiaoyan Wang, Cui Zhou, Ao Ba, Maarten Lont, Yao-Hong Liu
9.7 A 0.33nJ/b IEEE802.15.6/proprietary-MICS/ISM-band transceiver with scalable data-rate from 11kb/s to 4.5Mb/s for medical applications. ISSCC 2014: 170-171 - [c4]Hans W. Pflug, Hubregt J. Visser, Nauman F. Kiyani, Guido Dolmans, Kathleen Philips, Kouichi Kanda, Makoto Hamaminato, Shoichi Masui:
Radio channel characterization for 400 MHz implanted devices. WCNC 2014: 293-298 - 2012
- [j13]Jun Gyu Lee, Shoichi Masui:
Fractional-N PLL synthesizer with 15µsec start-up time by on-chip nonvolatile memory. IEICE Electron. Express 9(4): 263-269 (2012) - [j12]Jun Gyu Lee, Shoichi Masui:
A 3.5mW 5µsec settling time dual-band fractional-N PLL synthesizer. IEICE Electron. Express 9(4): 307-313 (2012) - [j11]Jun Gyu Lee, Shoichi Masui:
A 32-bit 16-program-cycle nonvolatile memory for analog circuit calibration in a standard 0.18µm CMOS. IEICE Electron. Express 9(6): 477-483 (2012) - [j10]Jun Gyu Lee, Zule Xu, Shoichi Masui:
Loop Design Optimization of Fourth-Order Fractional-N PLL Frequency Synthesizers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(8): 1337-1346 (2012) - 2011
- [j9]Takayuki Konishi, Kenji Inazu, Jun Gyu Lee, Masanori Natsui
Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using gm/ID Lookup Table Methodology. IEICE Trans. Electron. 94-C(3): 334-345 (2011) - [j8]Zule Xu, Jun Gyu Lee, Shoichi Masui:
Self-Dithered Digital Delta-Sigma Modulators for Fractional-N PLL. IEICE Trans. Electron. 94-C(6): 1065-1068 (2011)
2000 – 2009
- 2009
- [j7]Hideaki Kondo, Masaru Sawada, Norio Murakami, Shoichi Masui:
Design of Complex BPF with Automatic Digital Tuning Circuit for Low-IF Receivers. IEICE Trans. Electron. 92-C(10): 1304-1310 (2009) - 2007
- [j6]Hiroyuki Nakamoto, Daisuke Yamazaki, Takuji Yamamoto, Hajime Kurata, Satoshi Yamada, Kenji Mukaida, Tsuzumi Ninomiya, Takashi Ohkawa, Shoichi Masui, Kunihiko Gotoh:
A Passive UHF RF Identification CMOS Tag IC Using Ferroelectric RAM in 0.35-µm Technology. IEEE J. Solid State Circuits 42(1): 101-110 (2007) - 2006
- [j5]Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Shoichi Masui, Kenji Mukaida:
An area-efficient universal cryptography processor for smart cards. IEEE Trans. Very Large Scale Integr. Syst. 14(1): 43-56 (2006) - [c3]Hiroyuki Nakamoto, Daisuke Yamazaki, Takuji Yamamoto, Hajime Kurata, Satoshi Yamada, Kenji Mukaida, Tsuzumi Ninomiya, Takashi Ohkawa, Shoichi Masui, Kunihiko Gotoh:
A Passive UHF RFID Tag LSI with 36.6% Efficiency CMOS-Only Rectifier and Current-Mode Demodulator in 0.35µm FeRAM Technology. ISSCC 2006: 1201-1210 - 2005
- [j4]Shoichi Masui, Kenji Mukaida, Masahiko Takenaka, Naoya Torii:
Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm. IEICE Trans. Electron. 88-C(4): 576-581 (2005) - [j3]Shoichi Masui, Toshiyuki Teramoto:
A 13.56 MHz CMOS RF Identification Passive Tag LSI with Ferroelectric Random Access Memory. IEICE Trans. Electron. 88-C(4): 601-607 (2005) - 2004
- [j2]Yadollah Eslami, Ali Sheikholeslami, Shoichi Masui, Toru Endo, Shoichiro Kawashima:
Circuit implementations of the differential capacitance read scheme (DCRS) for ferroelectric random-access memories (FeRAM). IEEE J. Solid State Circuits 39(11): 2024-2031 (2004) - 2003
- [j1]Shoichi Masui, Tsuzumi Ninomiya, Michiya Oura, Wataru Yokozeki, Kenji Mukaida, Shoichiro Kawashima:
A ferroelectric memory-based secure dynamically programmable gate array. IEEE J. Solid State Circuits 38(5): 715-725 (2003) - [c2]Shoichi Masui, Wataru Yokozeki, Michiya Oura, Tsuzumi Ninomiya, Kenji Mukaida, Yoshihisa Takayama, Toshiyuki Teramoto:
Design and applications of ferroelectric nonvolatile SRAM and flip-flop with unlimited read/program cycles and stable recall. CICC 2003: 403-406
1980 – 1989
- 1983
- [c1]Shoichi Masui, John P. McDermott, Alan Sobel:
Decision-Making in Time-Critical Situations. IJCAI 1983: 233-235
Coauthor Index
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