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Amit Patra
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- affiliation: Indian Institute of Technology Kharagpur, Embedded Power Management Lab, India
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2020 – today
- 2024
- [j38]Karuna P. Sahoo
, Sawon Pratiher, Sazedul Alam, Nirmalya Ghosh
Unanticipated evolution of cardio-respiratory interactions with cognitive load during a Go-NoGo shooting task in virtual reality. Comput. Biol. Medicine 182: 109109 (2024) - [j37]Aditi Chakraborty
A Scalable Single-Inductor Multiple-Output DC-DC Converter With Constant Charge-Transfer and Power-Up Sequencing for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2964-2975 (2024) - [j36]Jyotirmaya Sahoo, Ramesh Parnapalli, Amit Patra, Siddhartha Mukhopadhyay:
Interleaved Switching for Loss Minimization in Adjacent Cell-to-Cell Balancing Architectures. IEEE Trans. Ind. Electron. 71(12): 16834-16844 (2024) - 2023
- [j35]Anupama Deo
On-chip bias-generating architecture for an automotive application with a wide input dynamic range. Int. J. Circuit Theory Appl. 51(10): 4503-4520 (2023) - [c70]Rajeshwari BS, Aman Sinha, Arnab Sengupta, Dhaladhuli Jahnavi, Nirmalya Ghosh, Amit Patra:
Detection of Twin Pregnancies using Fetal Phonocardiogram. EMBC 2023: 1-4 - [c69]Dhaladhuli Jahnavi, Ashutosh Dash, Rajeshwari BS, Nirmalya Ghosh, Amit Patra, K. M. Mandana, Sundeep Khandelwal:
Non-invasive Coronary Artery Disease Screening Based on Electrocardiogram Characteristics and Clinical Risk Factors. EMBC 2023: 1-4 - [c68]Dhaladhuli Jahnavi, Ashutosh Dash, Nirmalya Ghosh, Amit Patra:
Automated Myocardial Infarction Screening Using Morphology-Based Electrocardiogram Biomarkers. EMBC 2023: 1-4 - [c67]Pravallika Lavanuru, Sawon Pratiher, Karuna P. Sahoo, Mrinal Acharya, Sreejith S, Nirmalya Ghosh, Amit Patra:
Parasympathetic-Sympathetic Causal Interactions and Perceived Workload for Varying Difficulty Affective Computing Tasks. ICASSP 2023: 1-5 - [c66]Jyotirmaya Sahoo, Ramesh Parnapalli, Amit Patra, Siddhartha Mukhopadhyay:
Current Control Charge Equalization Algorithm for Adjacent Cell-to-Cell Topology Using Buck-Boost and Dual Half-Bridge Converter. IECON 2023: 1-6 - [c65]Sayandeep Sanyal, Mayukh Bhattacharya, Pallab Dasgupta, Amit Patra:
Accelerating Defect Simulation in Analog and Mixed-Signal Circuits by Parallel Defect Injection. VLSID 2023: 325-330 - [i2]Kaushik Ganguly, Amit Patra:
Unraveling Cold Start Enigmas in Predictive Analytics for OTT Media: Synergistic Meta-Insights and Multimodal Ensemble Mastery. CoRR abs/2305.08120 (2023) - 2022
- [j34]Ashutosh Dash, Karan Jain, Nirmalya Ghosh, Amit Patra:
Non-invasive detection of coronary artery disease from photoplethysmograph using lumped parameter modelling. Biomed. Signal Process. Control. 77: 103781 (2022) - [j33]Anupama Deo
A voltage-emulated peak current controlled buck converter for automotive applications with in-built over-current protection. Microelectron. J. 123: 105423 (2022) - [j32]Shuvoshree Bhattacharya, Ashis Maity
A valley-sensed emulated peak current controlled buck converter for automotive applications. Microelectron. J. 125: 105469 (2022) - [c64]Sawon Pratiher, Apoorva Srivastava, Sazedul Alam, Karuna P. Sahoo, Nilanjan Banerjee, Nirmalya Ghosh, Amit Patra:
Multi-granular Analysis and Physiological Interpretations of Heart Rate Variability Metrics During VR-Shooting Difficulty Induced Stress. EMBC 2022: 1094-1097 - [c63]Akash Kirodiwal, Dhaladhuli Jahnavi, Ashutosh Dash, Nirmalya Ghosh, Amit Patra:
Normal and Abnormal Classification of Electrocardiogram: A Primary Screening Tool Kit. EMBC 2022: 2001-2004 - [c62]Akshat Agrawal, Ashutosh Dash, Nirmalya Ghosh, Amit Patra:
Morphological Event Based Signal Quality Assessment of Electrocardiogram. EMBC 2022: 2021-2024 - [c61]Karuna P. Sahoo, Ashutosh Dash, Nirmalya Ghosh, Amit Patra, Aniruddha Sinha, Sundeep Khandelwal:
Simulating Stenotic Conditions of the Coronary Artery in a Lumped Parameter Model of the Cardiovascular System. EMBC 2022: 3993-3996 - [c60]Sawon Pratiher, Apoorva Srivastava, Yedla Bindu Priyatha, Nirmalya Ghosh, Amit Patra:
A Dilated Residual Vision Transformer for Atrial Fibrillation Detection from Stacked Time-Frequency ECG Representations. ICASSP 2022: 1121-1125 - [c59]Ranajoy Sadhukhan, Ankita Chatterjee, Jayanta Mukhopadhyay, Amit Patra:
Taxonomy Driven Learning Of Semantic Hierarchy Of Classes. ICIP 2022: 171-175 - [c58]Anupama Deo, Ashis Maity
A High Voltage Level Shifter for Automotive Buck Converter with a Fast Transient Response. VLSID 2022: 257-262 - 2021
- [j31]Karan Jain, Suchi Jain, Arijit Guha, Amit Patra
An approach to early stage detection of atherosclerosis using arterial blood pressure measurements. Biomed. Signal Process. Control. 68: 102594 (2021) - [c57]Apoorva Srivastava, Ajith Hari, Sawon Pratiher, Sazedul Alam
Channel Self-Attention Deep Learning Framework for Multi-Cardiac Abnormality Diagnosis from Varied-Lead ECG Signals. CinC 2021: 1-4 - [c56]Madhurima Patra, B. S. Rajeshwari, Arnab Sengupta, Amit Patra, Nirmalya Ghosh:
Wavelet based event detection in the phonocardiogram of prolapsed mitral valve. EMBC 2021: 841-844 - [c55]Karuna P. Sahoo, Amit Patra, Nirmalya Ghosh, Arpan Pal
A Lumped Parameter Model for Cardiac Output Estimation Using Arterial Blood Pressure Waveform. EMBC 2021: 5523-5526 - [c54]Karuna P. Sahoo, Ananth Radhakrishnan
Alterations in Multi-channel EEG Dynamics During a Stressful Shooting Task in Virtual Reality Systems. EMBC 2021: 6207-6210 - [c53]Duggireddy Yashwanth Reddy, Bikky Routh, Amit Patra, Siddhartha Mukhopadhyay:
Gaussian Process Regression based State of Health Estimation of Lithium-Ion Batteries using Indirect Battery Health Indicators. ICPHM 2021: 1-7 - [c52]Bikky Routh, Arijit Guha, Amit Patra, Siddhartha Mukhopadhyay:
Particle Filtering framework for Health Monitoring of Lithium-Ion Batteries using Ampere-hour Throughput based Semi-Empirical Model. ICPHM 2021: 1-7 - 2020
- [j30]Sayandeep Sanyal
A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits. J. Electron. Test. 36(6): 719-730 (2020) - [c51]Akash Kirodiwal, Apoorva Srivastava, Ashutosh Dash, Ayantika Saha, Gopi Vamsi Penaganti, Sawon Pratiher, Sazedul Alam
A Bio-toolkit for Multi-Cardiac Abnormality Diagnosis Using ECG Signal and Deep Learning. CinC 2020: 1-4 - [c50]Ashutosh Dash, Nirmalya Ghosh, Amit Patra, Anirban Dutta Choudhury:
Estimation of Arterial Blood Pressure Waveform from Photoplethysmogram Signal using Linear Transfer Function Approach. EMBC 2020: 2691-2694 - [c49]Ranajoy Sadhukhan, Avinab Saha, Jayanta Mukhopadhyay, Amit Patra:
Knowledge Distillation Inspired Fine-Tuning Of Tucker Decomposed CNNS and Adversarial Robustness Analysis. ICIP 2020: 1876-1880
2010 – 2019
- 2019
- [c48]Sayandeep Sanyal, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya:
A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits. ATS 2019: 135-140 - [c47]Ashutosh Dash, Karan Jain, Nirmalya Ghosh, Amit Patra, Anirban Dutta Choudhury:
Blood Pressure Estimation Based on Pulse Arrival Time and Heart Rate : A Correlation Analysis for Critically Ill Patients. EMBC 2019: 5046-5050 - [c46]Sayandeep Sanyal, Shan Pavan Pani Krishna Garapati, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya:
Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis. ACM Great Lakes Symposium on VLSI 2019: 123-128 - [c45]Avinab Saha, K. Sai Ram
Fitness Based Layer Rank Selection Algorithm for Accelerating Cnns by Candecomp/Parafac (CP) Decompositions. ICIP 2019: 3402-3406 - [c44]Shubham Negi, Ashis Maity
Adaptive Fractional Open Circuit Voltage Method for Maximum Power Point Tracking in a Photovoltaic Panel. VLSID 2019: 482-487 - 2018
- [j29]Bipin Chandra Mandi, Santanu Kapat, Amit Patra
Unified Digital Modulation Techniques for DC-DC Converters Over a Wide Operating Range: Implementation, Modeling, and Design Guidelines. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1442-1453 (2018) - [j28]Arijit Guha
Online Estimation of the Electrochemical Impedance Spectrum and Remaining Useful Life of Lithium-Ion Batteries. IEEE Trans. Instrum. Meas. 67(8): 1836-1849 (2018) - [c43]K. Sairam
HSD-CNN: Hierarchically self decomposing CNN architecture using class specific filter sensitivity analysis. ICVGIP 2018: 30:1-30:9 - [c42]P. Rarnesh, Amit Patra, Debaprasad Kastha
Design and Simulation of an On-Board Integrated Charger using Cell Bypass Balancing Circuit for Electric Vehicles. IECON 2018: 2032-2037 - [i1]K. Sairam
HSD-CNN: Hierarchically self decomposing CNN architecture using class specific filter sensitivity analysis. CoRR abs/1811.04406 (2018) - 2017
- [c41]Vinit Kumar Chugh, Kubera Kalyan, C. S. Anoop, Amit Patra, Shubham Negi:
Analysis of a GMR-based plethysmograph transducer and its utility for real-time Blood Pressure measurement. EMBC 2017: 1704-1707 - [c40]Arijit Guha, Amit Patra:
Particle filtering based estimation of remaining useful life of lithium-ion batteries employing power fading data. ICPHM 2017: 193-198 - [c39]Asif E. Syed, Amit Patra:
Dynamic ADC-quantization for oscillation-free performance of digitally controlled converters. ISCAS 2017: 1-4 - 2016
- [j27]Ashis Maity
A Single-Stage Low-Dropout Regulator With a Wide Dynamic Range for Generic Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2117-2127 (2016) - 2015
- [j26]Ashis Maity
Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator. IEEE Trans. Circuits Syst. II Express Briefs 62-II(7): 626-630 (2015) - [c38]Satya Narayan Shukla, Karan Kakwani, Amit Patra, Bipin Kumar Lahkar, Vivek Kumar Gupta, Alwar Jayakrishna, Puneet Vashisht, Induja Sreekanth:
Noninvasive Cuffless Blood Pressure Measurement by Vascular Transit Time. VLSID 2015: 535-540 - 2014
- [c37]Narla John Metilda Sagaya Mary, Ashis Maity
Light Load Efficiency Improvement in High Frequency DC-DC Buck Converter Using Dynamic Width Segmentation of Power MOSFET. VLSID 2014: 563-568 - 2013
- [j25]Pradipta Patra, Jyotirmoy Ghosh, Amit Patra:
Control Scheme for Reduced Cross-Regulation in Single-Inductor Multiple-Output DC-DC Converters. IEEE Trans. Ind. Electron. 60(11): 5095-5104 (2013) - [c36]Saptarshi Roy, Amit Patra, Partha Pratim Chakrabarti, Purnendu Sinha, Dipankar Das:
Prediction Schemes for Compensating Variable Delay for Improving Performance of Real-Time Control Tasks. VLSI Design 2013: 19-24 - [c35]Cheekala Lovaraju, Ashis Maity
A Capacitor-less Low Drop-out (LDO) Regulator with Improved Transient Response for System-on-Chip Applications. VLSI Design 2013: 130-135 - [c34]Neeraj Mishra, Niraj K. Jha, Santanu Kapat, Amit Patra:
Embedded Reconfigurable Augmented DC-DC Boost Converter for Fast Transient Recovery. VLSI Design 2013: 147-152 - [c33]Debajit Bhattacharya, Ashis Maity
Design and Implementation of a High-Speed, Power-Efficient, Modified Hybrid-Mode Sense Amplifier for SRAM Applications. VLSI Design 2013: 209-214 - [c32]Kumar Y. B. Nithin
Two-Path Quadrature Cascaded Band-Pass Sigma-Delta Modulators. VLSI Design 2013: 221-226 - 2012
- [j24]Santanu Kapat, Soumitro Banerjee
One-Dimensional Discontinuous Map Analysis of DC-DC converters under voltage Controlled Pulse Skipping Modulation. Int. J. Bifurc. Chaos 22(3) (2012) - [j23]Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei:
Estimation of dc Performance of a Lateral Power MOSFET Using Distributed Cell Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1452-1456 (2012) - [c31]Kumar Y. B. Nithin, Edoardo Bonizzoni, Amit Patra, Franco Maloberti:
Interference rejection in delay line based quadrature band-pass ΣΔ modulators. ISCAS 2012: 3005-3008 - 2011
- [j22]Rajarshi Paul, Amit Patra:
Trimming process and temperature variation in second-order bandgap voltage reference circuits. Microelectron. J. 42(2): 271-276 (2011) - [j21]Santanu Kapat, Amit Patra, Soumitro Banerjee
Achieving Monotonic Variation of Spectral Composition in DC-DC Converters Using Pulse Skipping Modulation. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(8): 1958-1966 (2011) - [j20]H. N. Nagaraja, Debaprasad Kastha
Design Principles of a Symmetrically Coupled Inductor Structure for Multiphase Synchronous Buck Converters. IEEE Trans. Ind. Electron. 58(3): 988-997 (2011) - [j19]Soumya Pandit, Chittaranjan A. Mandal, Amit Patra:
A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies. VLSI Design 2011: 475952:1-475952:17 (2011) - [c30]Ashis Maity
Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications. VLSI Design 2011: 316-321 - 2010
- [j18]Santosh Biswas, Dipankar Sarkar, Siddhartha Mukhopadhyay, Amit Patra:
Fairness of Transitions in Diagnosability of Discrete Event Systems. Discret. Event Dyn. Syst. 20(3): 349-376 (2010) - [j17]Soumya Pandit, Chittaranjan A. Mandal, Amit Patra:
An automated high-level topology generation procedure for continuous-time SigmaDelta modulator. Integr. 43(3): 289-304 (2010) - [j16]Santanu Kapat, Soumitro Banerjee
Discontinuous Map Analysis of a DC-DC Converter Governed by Pulse Skipping Modulation. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1793-1801 (2010) - [c29]Santanu Kapat, Soumitro Banerjee
Bifurcation behavior of a boost converter under voltage controlled pulse skipping modulation in the light of 1-D discontinuous map model. ISCAS 2010: 2932-2935
2000 – 2009
- 2009
- [j15]Suprio Das, Shamik Sural
Resistance Estimation for Lateral Power Arrays Through Accurate Netlist Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(6): 837-845 (2009) - [c28]Santanu Kapat, Soumitro Banerjee
Voltage Controlled Pulse Skipping Modulation: Extension towards the Ultra Light Load. ISCAS 2009: 2649-2652 - [c27]Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei:
A New Approach for Estimation of RDS(on) of Power Arrays: Extensions and Experimental Results. ISCAS 2009: 3010-3013 - [c26]Soumya Pandit, Chittaranjan A. Mandal, Amit Patra:
Systematic Methodology for High-Level Performance Modeling of Analog Systems. VLSI Design 2009: 361-366 - 2008
- [j14]Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra, Dipankar Sarkar:
Unified Technique for on-Line Testing of Digital Circuits: Delay and Stuck-at Fault Models. J. Circuits Syst. Comput. 17(6): 1069-1089 (2008) - [j13]Sushanta K. Mandal
ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 188-192 (2008) - [j12]Soumya Pandit, Sumit K. Bhattacharya, Chittaranjan A. Mandal, Amit Patra:
A Fast Exploration Procedure for Analog High-Level Specification Translation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8): 1493-1497 (2008) - [c25]Theja Tulabandhula, Amit Patra, Nirmal B. Chakrabarti:
Design of a Two Dimensional PRSI Image Processor. DSD 2008: 195-202 - [c24]Amitava Banerjee, Subho Chatterjee, Amit Patra, Siddhartha Mukhopadhyay:
An efficient approach to model distortion in weakly nonlinear Gm - C filters. ISCAS 2008: 1312-1315 - [c23]Santanu Kapat, Amit Patra, Soumitro Banerjee
A novel current controlled tri-state boost converter with superior dynamic performance. ISCAS 2008: 2194-2197 - [c22]Rupam Mukherjee, Amit Patra, Soumitro Banerjee
Chaos-Modulated Ramp IC for EMI Reduction in PWM Buck Converters- Design and Analysis of Critical Issues. VLSI Design 2008: 305-310 - [c21]Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei:
A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts. VLSI Design 2008: 331-336 - 2007
- [j11]Abhishek Somani, P. P. Chakrabarti, Amit Patra:
An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions. IEEE Trans. Evol. Comput. 11(3): 336-353 (2007) - [c20]Pradipta Patra, Amit Patra, Debaprasad Kastha
On-chip implementation of a multi-output voltage regulator based on single inductor Buck Converter topology. VLSI Design 2007: 935-940 - 2006
- [c19]Santosh Biswas, Chandan Karfa
Fairness of transitions in diagnosability analysis of hybrid systems. ACC 2006: 1-6 - [c18]Soumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra:
High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count. DATE 2006: 1203-1204 - [c17]Soumya Pandit, Chittaranjan A. Mandal, Amit Patra:
A formal approach for high level synthesis of linear analog systems. ACM Great Lakes Symposium on VLSI 2006: 345-348 - [c16]Abhishek Somani, P. P. Chakrabarti, Amit Patra:
A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ISCAS 2006 - [c15]Santosh Biswas, Amit Patra, Siddhartha Mukhopadhyay:
Concurrent Testing of Digital Circuits for Non-Classical Fault Models: Bridging Faults and n-Detect Test. LATW 2006: 49-54 - [c14]Prabir K. Saha, Ashudeb Dutta, Amit Patra, T. K. Bhattacharyya:
Design of a 1 V Low Power 900 MHz QVCO. VLSI Design 2006: 57-62 - [c13]Sushanta K. Mandal
A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. VLSI Design 2006: 619-624 - 2005
- [j10]Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra:
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation. J. Electron. Test. 21(5): 503-537 (2005) - [j9]Pawan Gupta, Amit Patra:
Hybrid mode-switched control of DC-DC boost converter circuits. IEEE Trans. Circuits Syst. II Express Briefs 52-II(11): 734-738 (2005) - [c12]Santosh Biswas, P. Srikanth, R. Jha, Siddhartha Mukhopadhyay, Amit Patra, Dipankar Sarkar:
On-Line Testing of Digital Circuits for n-Detect and Bridging Fault Models. Asian Test Symposium 2005: 88-93 - [c11]Abhishek Somani, Partha Pratim Chakrabarti, Amit Patra:
Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits. DATE 2005: 1064-1069 - [c10]Sushanta K. Mandal
A simple wide-band compact model and parameter extraction using particle swarm optimization of on-chip spiral inductors for silicon RFICs. ACM Great Lakes Symposium on VLSI 2005: 168-171 - [c9]Rajarshi Paul, Faruk Nome, Amit Patra, Barry Culpepper:
Trimming methodologies for compensating process variation errors in second-order bandgap voltage reference circuits. Circuits, Signals, and Systems 2005: 44-49 - [c8]H. N. Nagaraja, Amit Patra, Debaprasad Kastha
Generalized analysis of integrated magnetic component based low voltage interleaved DC-DC buck converter for efficiency improvement. ISCAS (3) 2005: 2485-2489 - [c7]P. Gupta, Amit Patra:
Super-stable energy based switching control scheme for DC-DC buck converter circuits. ISCAS (4) 2005: 3063-3066 - [c6]Abhijit Chatterjee, Ali Keshavarzi, Amit Patra, Siddhartha Mukhopadhyay:
Test Methodologies in the Deep Submicron Era - Analog, Mixed-Signal, and RF. VLSI Design 2005: 12-13 - [c5]Rajarshi Paul, Amit Patra, Shailendra Baranwal, Kaushik Dash:
Design of Second-Order Sub-Bandgap Mixed-Mode Voltage Reference Circuit for Low Voltage Applications. VLSI Design 2005: 307-312 - [c4]Abhishek Somani, P. P. Chakrabarti, Amit Patra:
A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. VLSI Design 2005: 535-538 - 2004
- [c3]Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra:
A BIST Approach to On-Line Monitoring of Digital VLSI Circuits: A CAD Tool. Asian Test Symposium 2004: 184-189 - [c2]Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra:
Optimization of the Theory of FDD of DES for Alleviation of the State Explosion Problem and Development of CAD Tools for On-line Testing of Digital VLSI Circuits. IOLTS 2004: 184- - [c1]Santosh Biswas, Siddhartha Mukhopadhyay, Amit Patra:
A discrete event systems approach to online testing of digital VLSI circuits. SMC (2) 2004: 1699-1704 - 2002
- [j8]Debasish Chatterjee
Swing-up and stabilization of a cart-pendulum system under restricted cart track length. Syst. Control. Lett. 47(4): 355-364 (2002) - [j7]K. Alice Mary, Amit Patra, N. K. De, S. Sengupta:
Design and implementation of the control system for an inverter-fed synchronous motor drive. IEEE Trans. Control. Syst. Technol. 10(6): 853-859 (2002)
1990 – 1999
- 1998
- [j6]Supratik Bose, Amit Patra, Siddhartha Mukhopadhyay:
Boundedness analysis of finitely recursive processes. I. Concurrent processes. IEEE Trans. Autom. Control. 43(11): 1514-1531 (1998) - [j5]Supratik Bose, Siddhartha Mukhopadhyay, Amit Patra:
Boundedness analysis of finitely recursive processes. II. Sequential and hybrid processes. IEEE Trans. Autom. Control. 43(11): 1532-1542 (1998) - 1997
- [j4]Supratik Bose, Siddhartha Mukhopadhyay, Amit Patra:
A Nondeterministic Extension over Finitely Recursive Process Model. Discret. Event Dyn. Syst. 7(3): 243-274 (1997) - 1994
- [j3]Amit Patra:
Block pulse functions and their applications in control systems: Z. H. Jiang and W. Schaufelberger. Autom. 30(2): 370-371 (1994) - [j2]Supratik Bose, Amit Patra, Siddhartha Mukhopadhyay:
On observability with delay: antitheses and syntheses. IEEE Trans. Autom. Control. 39(4): 803-806 (1994) - 1993
- [j1]Sanjay Kumar Bose, Amit Patra, Subhas Chandra Mukhopadhyay:
Comments on "Observability of discrete event dynamic systems" by C. M. Ozveren and A.S. Willsky. IEEE Trans. Autom. Control. 38(5) (1993)
Coauthor Index
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