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Jae W. Lee
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- affiliation: Seoul National University, College of Engineering, Korea
- affiliation (former): MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, USA
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2020 – today
- 2024
- [j28]Dongho Yoon
, Taehun Kim
A Quantitative Analysis of State Space Model-Based Large Language Model: Study of Hungry Hungry Hippos. IEEE Comput. Archit. Lett. 23(2): 154-157 (2024) - [j27]Donguk Kim
An LSM Tree Augmented with B+ Tree on Nonvolatile Memory. ACM Trans. Storage 20(1): 4:1-4:24 (2024) - [c67]Yeonhong Park, Jake Hyun, SangLyul Cho, Bonggeun Sim, Jae W. Lee:
Any-Precision LLM: Low-Cost Deployment of Multiple, Different-Sized LLMs. ICML 2024 - [e3]Michael D. Bond, Jae W. Lee, Hannes Payer:
Proceedings of the 2024 ACM SIGPLAN International Symposium on Memory Management, ISMM 2024, Copenhagen, Denmark, 25 June 2024. ACM 2024 [contents] - [i5]Yeonhong Park, Jake Hyun, SangLyul Cho, Bonggeun Sim, Jae W. Lee:
Any-Precision LLM: Low-Cost Deployment of Multiple, Different-Sized LLMs. CoRR abs/2402.10517 (2024) - 2023
- [j26]Christopher Batten
Special Issue on Top Picks From the 2022 Computer Architecture Conferences. IEEE Micro 43(4): 6-10 (2023) - [j25]Jongsung Lee, Dong Uk Kim, Jae W. Lee:
WALTZ: Leveraging Zone Append to Tighten the Tail Latency of LSM Tree on ZNS SSD. Proc. VLDB Endow. 16(11): 2884-2896 (2023) - [j24]Jongho Kim
A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3228-3232 (2023) - [j23]Deok-Jae Oh, Yaebin Moon, Do Kyu Ham, Tae Jun Ham, Yongjun Park, Jae W. Lee, Jung Ho Ahn, Eojin Lee:
MaPHeA: A Framework for Lightweight Memory Hierarchy-aware Profile-guided Heap Allocation. ACM Trans. Embed. Comput. Syst. 22(1): 2:1-2:28 (2023) - [c66]Yejin Lee, Donghyun Lee, JungUk Hong, Jae W. Lee, Hongil Yoon:
Not All Neighbors Matter: Point Distribution-Aware Pruning for 3D Point Cloud. AAAI 2023: 1240-1249 - [c65]Woohyeon Baek
Liquid: Mix-and-Match Multiple Image Formats to Balance DNN Training Pipeline. APSys 2023: 50-57 - [c64]Hyunseung Lee
A Memory-Efficient Edge Inference Accelerator with XOR-based Model Compression. DAC 2023: 1-6 - [c63]Gyewon Lee
FlowKV: A Semantic-Aware Store for Large-Scale State Management of Stream Processing Engines. EuroSys 2023: 768-783 - [c62]Wenjing Jin
DRAM Translation Layer: Software-Transparent DRAM Power Savings for Disaggregated Memory. ISCA 2023: 16:1-16:13 - 2022
- [j22]Young H. Oh, Yunho Jin, Tae Jun Ham, Jae W. Lee:
Layerweaver+: A QoS-Aware Layer-Wise DNN Scheduler for Multi-Tenant Neural Processing Units. IEICE Trans. Inf. Syst. 105-D(2): 427-431 (2022) - [j21]Yeonhong Park, Sunhong Min, Jae W. Lee:
Ginex: SSD-enabled Billion-scale Graph Neural Network Training on a Single Machine via Provably Optimal In-memory Caching. Proc. VLDB Endow. 15(11): 2626-2639 (2022) - [j20]Yunho Jin
Architecting a Flash-Based Storage System for Low-Cost Inference of Extreme-Scale DNNs. IEEE Trans. Computers 71(12): 3153-3164 (2022) - [j19]Dongsuk Shin, Hakbeom Jang, Kiseok Oh, Jae W. Lee:
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory. ACM Trans. Embed. Comput. Syst. 21(1): 7:1-7:22 (2022) - [c61]Hoon Shin, Rihae Park, Seung Yul Lee, Yeonhong Park, Hyunseung Lee
Effective zero compression on ReRAM-based sparse DNN accelerators. DAC 2022: 949-954 - [c60]Jonghyun Bae, Woohyeon Baek
L3: Accelerator-Friendly Lossless Image Format for High-Resolution, High-Throughput DNN Training. ECCV (11) 2022: 171-188 - [c59]Shine Kim, Jae W. Lee:
A Hardware Automated Domain-Specific Flash Memory System for Emerging Applications. ICEIC 2022: 1-3 - [c58]Seong Hoon Seo
A 40nm 5.6TOPS/W 239GOPS/mm2 Self-Attention Processor with Sign Random Projection-based Approximation. ESSCIRC 2022: 85-88 - [c57]Yejin Lee, Hyunji Choi, Sunhong Min, Hyunseung Lee
ANNA: Specialized Architecture for Approximate Nearest Neighbor Search. HPCA 2022: 169-183 - [c56]Michael Jaemin Kim, Jaehyun Park
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. HPCA 2022: 1156-1169 - [c55]Jaeyeon Won, Jeyeon Si, Sam Son, Tae Jun Ham, Jae W. Lee:
ULPPACK: Fast Sub-8-bit Matrix Multiply on Commodity SIMD Hardware. MLSys 2022 - [e2]Jae W. Lee, Sebastian Hack, Tatiana Shpeisman:
IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2022, Seoul, Korea, Republic of, April 2-6, 2022. IEEE 2022, ISBN 978-1-6654-0584-3 [contents] - [i4]Jonghyun Bae, Woohyeon Baek, Tae Jun Ham, Jae W. Lee:
L3: Accelerator-Friendly Lossless Image Format for High-Resolution, High-Throughput DNN Training. CoRR abs/2208.08711 (2022) - [i3]Yeonhong Park, Sunhong Min, Jae W. Lee:
Ginex: SSD-enabled Billion-scale Graph Neural Network Training on a Single Machine via Provably Optimal In-memory Caching. CoRR abs/2208.09151 (2022) - 2021
- [j18]Jongho Kim
An 8-bit Ring-Amplifier Based Mixed-Signal MAC Circuit With Full Digital Interface and Variable Accumulation Length. IEEE Access 9: 5887-5894 (2021) - [j17]Tae Jun Ham
Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework. IEEE Micro 41(3): 42-49 (2021) - [c54]Yejin Lee
MERCI: efficient embedding reduction on commodity hardware via sub-query memoization. ASPLOS 2021: 302-313 - [c53]Jae W. Lee:
Message from the General Chair. CGO 2021: iii-iv - [c52]Shine Kim, Yunho Jin, Gina Sohn, Jonghyun Bae, Tae Jun Ham, Jae W. Lee:
Behemoth: A Flash-centric Training Accelerator for Extreme-scale DNNs. FAST 2021: 371-385 - [c51]Jonghyun Bae, Jongsung Lee, Yunho Jin, Sam Son, Shine Kim, Hakbeom Jang, Tae Jun Ham, Jae W. Lee:
FlashNeuron: SSD-Enabled Large-Batch Training of Very Deep Neural Networks. FAST 2021: 387-401 - [c50]Young H. Oh, Seonghak Kim, Yunho Jin, Sam Son, Jonghyun Bae, Jongsung Lee
Layerweaver: Maximizing Resource Utilization of Neural Processing Units via Layer-Wise Scheduling. HPCA 2021: 584-597 - [c49]Jun Heo, Seung Yul Lee, Sunhong Min, Yeonhong Park, Sungjun Jung, Tae Jun Ham, Jae W. Lee:
BOSS: Bandwidth-Optimized Search Accelerator for Storage-Class Memory. ISCA 2021: 279-291 - [c48]Tae Jun Ham, Yejin Lee, Seong Hoon Seo
ELSA: Hardware-Software Co-design for Efficient, Lightweight Self-Attention Mechanism in Neural Networks. ISCA 2021: 692-705 - [c47]Deok-Jae Oh
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework. LCTES 2021: 24-36 - [c46]Sam Son, Seung Yul Lee, Yunho Jin, Jonghyun Bae, Jinkyu Jeong, Tae Jun Ham, Jae W. Lee, Hongil Yoon:
ASAP: Fast Mobile Application Switch via Adaptive Prepaging. USENIX ATC 2021: 365-380 - [e1]Jae W. Lee, Mary Lou Soffa, Ayal Zaks:
IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2021, Seoul, South Korea, February 27 - March 3, 2021. IEEE 2021, ISBN 978-1-7281-8613-9 [contents] - [i2]Michael Jaemin Kim, Jaehyun Park, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn:
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. CoRR abs/2108.06703 (2021) - 2020
- [c45]Jun Heo, Jaeyeon Won, Yejin Lee, Shivam Bharuka, Jaeyoung Jang, Tae Jun Ham, Jae W. Lee:
IIU: Specialized Architecture for Inverted Index Search. ASPLOS 2020: 1233-1245 - [c44]Tae Jun Ham, Sungjun Jung, Seonghak Kim, Young H. Oh, Yeonhong Park, Yoonho Song
A3: Accelerating Attention Mechanisms in Neural Networks with Approximation. HPCA 2020: 328-341 - [c43]Yeonhong Park, Seung Yul Lee, Hoon Shin, Jun Heo, Tae Jun Ham, Jae W. Lee:
Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator. ICCAD 2020: 103:1-103:9 - [c42]Tae Jun Ham, David Bruns-Smith, Brendan Sweeney, Yejin Lee, Seong Hoon Seo
Genesis: A Hardware Acceleration Framework for Genomic Data Analysis. ISCA 2020: 254-267 - [c41]Jaeyoung Jang, Sungjun Jung, Sunmin Jeong, Jun Heo, Hoon Shin, Tae Jun Ham, Jae W. Lee:
A Specialized Architecture for Object Serialization with Applications to Big Data Analytics. ISCA 2020: 322-334 - [c40]Gyusun Lee, Wenjing Jin, Wonsuk Song, Jeonghun Gong, Jonghyun Bae, Tae Jun Ham, Jae W. Lee, Jinkyu Jeong
A Case for Hardware-Based Demand Paging. ISCA 2020: 1103-1116 - [c39]Yeonhong Park, Woosuk Kwon, Eojin Lee, Tae Jun Ham, Jung Ho Ahn
Graphene: Strong yet Lightweight Row Hammer Protection. MICRO 2020: 1-13 - [i1]Tae Jun Ham, Sungjun Jung, Seonghak Kim, Young H. Oh, Yeonhong Park, Yoonho Song, Jung-Hun Park, Sanghee Lee, Kyoung Park, Jae W. Lee, Deog-Kyoon Jeong:
A3: Accelerating Attention Mechanisms in Neural Networks with Approximation. CoRR abs/2002.10941 (2020)
2010 – 2019
- 2019
- [j16]Hakbeom Jang, Jonghyun Bae, Tae Jun Ham, Jae W. Lee:
Eager Memory Management for In-Memory Data Analytics. IEICE Trans. Inf. Syst. 102-D(3): 632-636 (2019) - [j15]Jonghyun Bae, Hakbeom Jang, Jeonghun Gong, Wenjing Jin, Shine Kim, Jaeyoung Jang, Tae Jun Ham, Jinkyu Jeong
SSDStreamer: Specializing I/O Stack for Large-Scale Machine Learning. IEEE Micro 39(5): 73-81 (2019) - [c38]Jongwook Chung, Yuhwan Ro, Joonsung Kim, Jaehyung Ahn, Jangwoo Kim, John Kim
Enforcing Last-Level Cache Partitioning through Memory Virtual Channels. PACT 2019: 97-109 - [c37]Jaeyoung Jang, Jun Heo, Yejin Lee, Jaeyeon Won, Seonghak Kim, Sungjun Jung, Hakbeom Jang, Tae Jun Ham, Jae W. Lee:
Charon: Specialized Near-Memory Processing Architecture for Clearing Dead Objects in Memory. MICRO 2019: 726-739 - [c36]Gyusun Lee, Seokha Shin, Wonsuk Song, Tae Jun Ham, Jae W. Lee, Jinkyu Jeong:
Asynchronous I/O Stack: A Low-latency Kernel I/O Stack for Ultra-Low Latency SSDs. USENIX ATC 2019: 603-616 - [c35]Shine Kim, Jonghyun Bae, Hakbeom Jang, Wenjing Jin, Jeonghun Gong, SeungYeon Lee, Tae Jun Ham, Jae W. Lee:
Practical Erase Suspension for Modern Low-latency SSDs. USENIX ATC 2019: 813-820 - 2018
- [j14]Dongsuk Shin, Hakbeom Jang, Jae W. Lee:
Erratum: Energy-efficient heterogeneous memory system for mobile platforms [IEICE Electronics Express Vol. 14 (2017) No. 24 pp. 20171002]. IEICE Electron. Express 15(3): 20188001 (2018) - [c34]Young H. Oh, Quan Quan, Daeyeon Kim, Seonghak Kim, Jun Heo, Sungjun Jung, Jaeyoung Jang, Jae W. Lee:
A portable, automatic data qantizer for deep neural networks. PACT 2018: 17:1-17:14 - [c33]Dongsuk Shin, Jae W. Lee:
Bandwidth-aware DRAM page migration for heterogeneous mobile memory systems. ICCE 2018: 1-5 - 2017
- [j13]WonJun Song, Hyungjoon Jung, Jung Ho Ahn
Evaluation of Performance Unfairness in NUMA System Architecture. IEEE Comput. Archit. Lett. 16(1): 26-29 (2017) - [j12]Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture. IEEE Comput. Archit. Lett. 16(1): 76-79 (2017) - [j11]Yongjun Lee, Yunkeuk Kim, Jinkyu Jeong
DRAM architecture for efficient data lifetime management. IEICE Electron. Express 14(10): 20170309 (2017) - [j10]Dongsuk Shin, Hakbeom Jang, Jae W. Lee:
Energy-efficient heterogeneous memory system for mobile platforms. IEICE Electron. Express 14(24): 20171002 (2017) - [j9]Yong I. Choi, Jae W. Lee, Minjoong Rim
On the Performance of Beam Division Nonorthogonal Multiple Access for FDD-Based Large-Scale Multi-User MIMO Systems. IEEE Trans. Wirel. Commun. 16(8): 5077-5089 (2017) - [c32]Channoh Kim, Jaehyeok Kim, Sungmin Kim, Doo-Young Kim, Namho Kim, Gitae Na, Young H. Oh, Hyeon-Gyu Cho, Jae W. Lee:
Typed Architectures: Architectural Support for Lightweight Scripting. ASPLOS 2017: 77-90 - [c31]WonJun Song, Gwangsun Kim
History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers. ASPLOS 2017: 765-777 - [c30]Jonghyun Bae, Hakbeom Jang, Wenjing Jin, Jun Heo, Jaeyoung Jang, Joo Young Hwang, Sangyeun Cho, Jae W. Lee:
Jointly optimizing task granularity and concurrency for in-memory mapreduce frameworks. IEEE BigData 2017: 130-140 - [c29]Yong I. Choi, Jae W. Lee, Chung Gu Kang, Minjoong Rim
Constructive Multi-User Interference for Symbol-Level Link Adaptation: MMSE Approach. GLOBECOM Workshops 2017: 1-6 - [c28]Changsu Kim, Juhyun Kim, Juwon Kang, Jae W. Lee, Hanjun Kim
Context-Aware Memory Profiling for Speculative Parallelism. HiPC 2017: 328-337 - [c27]Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. HPCA 2017: 517-528 - 2016
- [j8]Donghwan Jeong, Young H. Oh
An eDRAM-Based Approximate Register File for GPUs. IEEE Des. Test 33(1): 23-31 (2016) - [j7]Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, Nam Sung Kim:
Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors. IEEE Trans. Parallel Distributed Syst. 27(6): 1838-1851 (2016) - [c26]Jialu Huang, Prakash Prabhu, Thomas B. Jablin, Soumyadeep Ghosh, Sotiris Apostolakis, Jae W. Lee, David I. August:
Speculatively Exploiting Cross-Invocation Parallelism. PACT 2016: 207-221 - [c25]Hakbeom Jang, Yongjun Lee, Jongwon Kim, Youngsok Kim
Efficient footprint caching for Tagless DRAM Caches. HPCA 2016: 237-248 - [c24]Channoh Kim, Sungmin Kim, Hyeon-Gyu Cho, Doo-Young Kim, Jaehyeok Kim, Young H. Oh, Hakbeom Jang, Jae W. Lee:
Short-Circuit Dispatch: Accelerating Virtual Machine Interpreters on Embedded Processors. ISCA 2016: 291-303 - 2015
- [j6]Doo-Young Kim, Jin Min Kim, Hakbeom Jang, Jinkyu Jeong
A neural network accelerator for mobile application processors. IEEE Trans. Consumer Electron. 61(4): 555-563 (2015) - [c23]Yongjun Lee, Jongwon Kim, Hakbeom Jang, Hyunggyun Yang, Jangwoo Kim, Jinkyu Jeong
A fully associative, tagless DRAM cache. ISCA 2015: 211-222 - [c22]Xianglan Piao, Channoh Kim, Younghwan Oh, Huiying Li, Jincheon Kim, Hanjun Kim
JAWS: a JavaScript framework for adaptive CPU-GPU work sharing. PPoPP 2015: 251-252 - 2014
- [j5]Gwangsun Kim
Low-Overhead Network-on-Chip Support for Location-Oblivious Task Placement. IEEE Trans. Computers 63(6): 1487-1500 (2014) - [c21]WonJun Song, John Kim
Security Vulnerability in Processor-Interconnect Router Design. CCS 2014: 358-368 - [c20]Wonjun Lee, Channoh Kim, Houp Song, Jae W. Lee:
QPR.js: a runtime framework for QoS-aware power optimization for parallel JavaScript programs. ISLPED 2014: 251-254 - [c19]Kyungsang Cho, Yongjun Lee, Young H. Oh, Gyoo-Cheol Hwang, Jae W. Lee:
eDRAM-based tiered-reliability memory with applications to low-power frame buffers. ISLPED 2014: 333-338 - [c18]Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems. SC 2014: 1059-1070 - [c17]Xianglan Piao, Channoh Kim, Younghwan Oh, Hanjun Kim
Efficient CPU-GPU work sharing for data-parallel JavaScript workloads. WWW (Companion Volume) 2014: 357-358 - 2013
- [c16]Taewook Oh, Hanjun Kim
Practical automatic loop specialization. ASPLOS 2013: 419-430 - [c15]Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
Reducing memory access latency with asymmetric DRAM bank organizations. ISCA 2013: 380-391 - [c14]Hakbeom Jang, Channoh Kim, Jae W. Lee:
Practical speculative parallelization of variable-length decompression algorithms. LCTES 2013: 55-64 - 2012
- [j4]Yun Zhang, Jae W. Lee, Nick P. Johnson, David I. August:
DAFT: Decoupled Acyclic Fault Tolerance. Int. J. Parallel Program. 40(1): 118-140 (2012) - [j3]Jae W. Lee, Man Cheuk Ng, Krste Asanovic:
Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks. J. Parallel Distributed Comput. 72(11): 1401-1411 (2012) - [c13]Arun Raman, Jae W. Lee, David I. August:
From sequential programming to flexible parallel execution. CASES 2012: 37-40 - [c12]Hanjun Kim
Automatic speculative DOALL for clusters. CGO 2012: 94-103 - [c11]Yun Zhang, Soumyadeep Ghosh, Jialu Huang, Jae W. Lee, Scott A. Mahlke, David I. August:
Runtime asynchronous fault tolerance via speculation. CGO 2012: 145-154 - [c10]Arun Raman, Ayal Zaks, Jae W. Lee, David I. August:
Parcae: a system for flexible parallel execution. PLDI 2012: 133-144 - 2011
- [c9]Arun Raman, Hanjun Kim
Parallelism orchestration using DoPE: the degree of parallelism executive. PLDI 2011: 26-37 - 2010
- [c8]Yun Zhang, Jae W. Lee, Nick P. Johnson, David I. August:
DAFT: decoupled acyclic fault tolerance. PACT 2010: 87-98 - [c7]Michael Mihn-Jong Lee, John Kim
Approximating age-based arbitration in on-chip networks. PACT 2010: 575-576 - [c6]Hanjun Kim
Scalable Speculative Parallelization on Commodity Clusters. MICRO 2010: 3-14 - [c5]Michael Mihn-Jong Lee, John Kim
Probabilistic Distance-Based Arbitration: Providing Equality of Service for Many-Core CMPs. MICRO 2010: 509-519
2000 – 2009
- 2008
- [c4]Jae W. Lee, Man Cheuk Ng, Krste Asanovic:
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. ISCA 2008: 89-100 - 2007
- [c3]Jae W. Lee, Myron King, Krste Asanovic:
Continual hashing for efficient fine-grain state inconsistency detection. ICCD 2007: 33-40 - 2006
- [c2]Jae W. Lee, Krste Asanovic:
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors. IEEE Real Time Technology and Applications Symposium 2006: 135-147 - 2005
- [j2]Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh
Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1200-1205 (2005) - 2004
- [c1]G. Edward Suh
Secure program execution via dynamic information flow tracking. ASPLOS 2004: 85-96 - 2002
- [j1]Michael B. Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul R. Johnson, Jae W. Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant Agarwal:
The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. IEEE Micro 22(2): 25-35 (2002)
Coauthor Index
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