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ISLPED 2024: Newport Beach, CA, USA
- Pascal Meinerzhagen, Kapil Dev, Jerald Yoo:
Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2024, Newport Beach, CA, USA, August 5-7, 2024. ACM 2024, ISBN 979-8-4007-0688-2
Transformers and Natural Language Processing
- Yuan Liao
, Jian Meng
A 28nm Scalable and Flexible Accelerator for Sparse Transformer Models. 1-6 - Tianhua Xia
Hyft: A Reconfigurable Softmax Accelerator with Hybrid Numeric Format for both Training and Inference. 1-6 - Mohammad Erfan Sadeghi
PEANO-ViT: Power-Efficient Approximations of Non-Linearities in Vision Transformers. 1-6 - Zirui Fu
Heterogeneous Memory Integration and Optimization for Energy-Efficient Multi-Task NLP Edge Inference. 1-6
Energy- and Carbon-Efficient Machine Learning Techniques
- Shi-Zhe Lin
LUTIN: Efficient Neural Network Inference with Table Lookup. 1-6 - Chanwoo Cho
CLOVER: Carbon Optimization of Federated Learning over Heterogeneous Clients. 1-6 - Jeffrey Chen
Xyloni: Very Low Power Neural Network Accelerator for Intermittent Remote Visual Detection of Wildfire and Beyond. 1-6 - Hamidreza Alikhani
EA^2: Energy Efficient Adaptive Active Learning for Smart Wearables. 1-6
Energy-Efficient Neural Networks via Algorithm-Hardware Co-Optimization
- Shamik Kundu
SwiSS: Switchable Single-Sided Sparsity-based DNN Accelerators. 1-6 - Ehsan Aghapour
PiQi: Partially Quantized DNN Inference on HMPSoCs. 1-6 - Kyuseung Han
STARC: Crafting Low-Power Mixed-Signal Neuromorphic Processors by Bridging SNN Frameworks and Analog Designs. 1-6 - Hoseok Kim
Sparrow ECC: A Lightweight ECC Approach for HBM Refresh Reduction towards Energy-efficient DNN Inference. 1-6
Eye for the Detail: Bringing Security and Privacy to Nanoscale Systems
- Jianbo Liu
CIPUF: Towards On-chip Learnable Anomaly Detection with Compute-In-PUF Architecture. 1-6 - Mehdi Kamal
X-IMM: Mixed-Signal Iterative Montgomery Modular Multiplication. 1-6 - Cheng-Yun Yang
Securing Deep Neural Networks on Edge from Membership Inference Attacks Using Trusted Execution Environments. 1-6
Emerging AI Accelerator Design
- Fangxin Liu
LowPASS: A Low power PIM-based accelerator with Speculative Scheme for SNNs. 1-6 - Jeongjun Lee
Systolic Array Acceleration of Spiking Neural Networks with Application-Independent Split-Time Temporal Coding. 1-6 - Mehran Shoushtari Moghadam
All You Need is Unary: End-to-End Unary Bit-stream Processing in Hyperdimensional Computing. 1-6 - Bokyoung Seo
An Energy-Efficient 3D Point Neural Network Accelerator with Fine-grained LiDAR-SoC Pipeline Structure. 1-6
Advances in Power Modeling and Low Power Design Methods
- Daniel H. Xing
3D-Aware Low Power High-level Resource Binding and Co-Design. 1-6 - Yao Lu
Unleashing Flexibility of ML-based Power Estimators Through Efficient Development Strategies. 1-6 - Hyung Joon Byun
3D IC Architecture Evaluation and Optimization with Digital Compute-in-Memory Designs. 1-6 - Lingjun Zhu
Hetero-3D: Maximizing Performance and Power Delivery Benefits of Heterogeneous 3D ICs. 1-6
Low-Power Heterogeneous Integration Platforms
- Anna Burdina
Cross-layer Exploration of 2.5D Energy-Efficient Heterogeneous Chiplets Integration: From System Simulation to Open Hardware. 1-6 - Vikram Jain
Design Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems. 1-6
Next Generation Memories and Wearables
- Honggu Kim
Coupled 7T 1C SRAM based in-memory computing architecture with gain/offset error auto-compensated SAR ADC. 1-6 - Mert Dogan
Magnet Free Inductive Wireless Power and Data Transmission System For Fully Implantable Cochlear Implants. 1-6 - Rakshith Saligram
Cooling the Chaos: Mitigating the Effect of Threshold Voltage Variation in Cryogenic CMOS Memories. 1-6 - Yunho Jang
STT-MRAM-based Near-Memory Computing Architecture with Read Scheme and Dataflow Co-Design for High-Throughput and Energy-Efficiency. 1-6
Optimizing Data Movement in Diverse Architectures: From VLIW to Optical Baseband Processors
- Seunghyun Jin
GUMSO: Gating Unnecessary On-Chip Memory Slices for Power Optimization on GPUs. 1-6 - Masayuki Kimura
ReOVE: Restricted Out-of-Order Execution for Superscalar Processors with Vector Extension. 1-6 - Paul Xuanyuanliang Huang
SPADES: A 0.54-GFLOPS/W Sparse Matrix Vector Multiplication Accelerator Featuring On-the-Fly GZIP Decompression for 3.36X Reduction in Off-Chip Data Movement. 1-6 - Seungkyu Choi
ParaBase: A Configurable Parallel Baseband Processor for Ultra-High-Speed Inter-Satellite Optical Communications. 1-6 - Jae-Youn Hong
LOCo: LPDDR Optimization with Compression and IECC scheme for DNN Inference. 1-6
Power Management and Energy Efficiency in AI Hardware Design
- Sudipta Mondal
Hardware Acceleration of Inference on Dynamic GNNs. 1-6 - Dongjun Kim
iSPADE: End-to-end Sparse Architecture for Dense DNN Acceleration via Inverted-bit Representation. 1-6 - Georgios Chatzitsompanis
ePredictNet: Low Cost Error Prediction Neural Network. 1-6 - Sanket Shukla
Energy Harvesting-Supported Efficient Low-Power ML Processing with Adaptive Checkpointing and Intermittent Computing. 1-6
Energy-Efficient Adaptive Internet-of-Things Systems
- Youngbin Kim
Rapid Hardware/Software Design Space Exploration for Efficient Intermittent Systems. 1-6 - Yeonggeon Kim
Statues: Energy-Efficient Video Object Detection on Edge Security Devices with Computational Skipping. 1-6 - Hojun Choi
Causes and Fixes of Unexpected Drone Shutoffs. 1-6
POSTER SESSION: Poster Session
- Nirmoy Modak
Energy Efficiency Through In-Sensor Computing: ADC-less Real-Time Sensing for Image Edge Detection. 1-6 - George Higgins Hutchinson
FPIA: Field-Programmable Ising Arrays with In-Memory Computing. 1-6 - Laith A. Shamieh
Cryogenic Operation of Computing-In-Memory based Spiking Neural Network. 1-6 - Jihoon Jang
EDeN: Enabling Low-Power CNN Inference on Edge Devices Using Prefetcher-assisted NVM Systems. 1-6 - Caroline Ellis Hammond
Triangle Counting in the Temporal Domain. 1-6 - Vikram Gopalakrishnan
ML-INSIGHT: Machine Learning for Inrush Current Prediction and Power Switch Network Improvement. 1-6 - Abir Ahsan Akib
HQ-DTM: A Hierarchical Q-learning Algorithm for Dynamic Thermal Management of Multi-core Processors. 1-6 - Yaswanth Kumar Cherivirala
A Technology-Agnostic Method for Digital LDO Synthesis and Layout Automation. 1-6 - Aditya Ukarande
PACT: Accurate Power Analysis and Carbon Emission Tracking for Sustainability. 1-6 - Praveen Nagil
DISHA: Low-Energy Sparse Transformer at Edge for Outdoor Navigation for the Visually Impaired Individuals. 1-6 - Ping-Han Chou
Content-based Power-saving Design for Augmented Reality Applications on Mobile Devices. 1-6 - Hossein Taji
Energy-Efficient Frequency Selection Method for Bio-Signal Acquisition in AI/ML Wearables. 1-6 - Fatemeh Asgarinejad
VisionHD: Towards Efficient and Privacy-Preserved Hyperdimensional Computing for Image Data. 1-6 - Seung Hun Choi
ComBoost: An Instruction Complexity Aware DTM Technique for Edge Devices. 1-6 - Sai Qian Zhang
JointNF: Enhancing DNN Performance through Adaptive N: M Pruning across both Weight and Activation. 1-6 - Pratyush Dhingra
HeTraX: Energy Efficient 3D Heterogeneous Manycore Architecture for Transformer Acceleration. 1-6 - Chang Eun Song
Efficient Transformer Acceleration via Reconfiguration for Encoder and Decoder Models and Sparsity-Aware Algorithm Mapping. 1-6 - Woohong Byun
Hardware-friendly Hessian-driven Row-wise Quantization and FPGA Acceleration for Transformer-based Models. 1-6 - Gopikrishnan Raveendran Nair
A 16nm Heterogeneous Accelerator for Energy-Efficient Sparse and Dense AI Computing. 1-6 - Long Lam
Low Overhead Logic Locking for System-Level Security: A Design Space Modeling Approach. 1-6 - Mengxin Zheng
OFHE: An Electro-Optical Accelerator for Discretized TFHE. 1-6
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