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25th MIXDES 2018: Gdynia, Poland
- 25th International Conference "Mixed Design of Integrated Circuits and System", MIXDES 2018, Gdynia, Poland, June 21-23, 2018. IEEE 2018, ISBN 978-83-63578-14-5
- Joan Cabestany
, Daniel Rodríguez Martín, Carlos Pérez, Albert Samà:
Artificial Intelligence Contribution to eHealth Application. 15-21 - Sadayuki Yoshitomi:
Footprints of RF CMOS Compact Modeling Technology From Wireless Communication To IoT Applications. 22-28 - Breton L. Minnehan, Andreas E. Savakis:
Learning Robust Feature Representations in Deep Networks for Image Classification. 29-33 - Slawosz Uznanski, Ruben Garcia Alia
Qualification of Electronic Systems for Radiation Environments of High Energy Accelerator. 34-38 - Simon Deleonibus:
Towards a World of More Functions in Integrated Sustainable Systems. 39-41 - Fabian Horst, Atieh Farokhnejad, Benjamín Iñíguez, Alexander Kloes:
An Area Equivalent WKB Approach to Calculate the B2B Tunneling Probability for a Numerical Robust Implementation in TFET Compact Models. 45-50 - Daniel Tomaszewski
An Effect of Device Topology in VeSTIC Process on Logic Circuit Operation A Study Based on Ring Oscillator Operation Analysis. 51-56 - Salim El Ghouli, Wladyslaw Grabinski
Analog RF and mm-Wave design Tradeoff in UTBB FDSOI: Application to a 35 GHz LNA. 57-62 - Maria Helena Fino, Tiago Pina:
On the Use of Modified Biolek Window for Memristor Modeling in VerilogA. 63-66 - Mike Schwarz, Laurie E. Calvet, John P. Snyder, Tillmann Krauss, Udo Schwalke, Alexander Kloes:
Process and Device Simulation of Schottky Barrier MOSFETs for Analysis of Current Injection. 67-72 - Mike Brinson:
Qucs Frequency Domain Non-Linear Compact Modelling and Simulation of IC Spiral Inductors On Silicon. 73-78 - Michal Basiuras, Dariusz Makowski, Piotr Perek
Device Support for Giga-sampling Digitizers. 81-84 - Pawel Plewinski, Dariusz Makowski
Integration and Testing of Large Scale Diagnostic Systems. 85-88 - Aleksander Szubert, Dariusz Makowski, Grzegorz Jablonski
Optimization of Class-D Amplifier Output Stage for Piezoelectric Actuator Control. 89-93 - Luca Marchetti, Yngvar Berg, Mehdi Azadmehr:
A Discrete Implementation of a Semi-Floating Gate Amplifier for Resonating Sensor Front-End. 97-102 - Ehab A. Hamed, Mohamed Atef
A Low Power Programmable Gain Integrated Front-End for Electromyogram Signal Sensing. 103-108 - Faeze Noruzpur, Sina Mahdavi, Maryam Poreh, Shima Tayyeb Ghasemi:
A New Semi-Digital Low Power Low Jitter and Fast PLL in 0.18μm Technology. 109-115 - Viorel Bucur, Gabriel Banarie, Stefan Marinca, Mircea Bodea:
A Zener-Based Voltage Reference Design Compensated Using a ΔVBE Stack. 116-120 - Rafal Walczak:
Application of Inkjet 3D Printing in MEMS Technique. 121-124 - Andrzej Wielgus, Hubert Jatkowski:
Comparison of Methods of Fuzzy Functions Minimization. 125-130 - Daniel Pietron, Igor Butryn, Lukasz Wiechowski, Witold A. Pleskacz:
Design of a Wideband Low Noise Amplifier for a FMCW Synthetic Aperture Radar in 130 nm SiGe BiCMOS Technology. 131-135 - Alexander Barkalov, Larysa Titarenko
Design of FPGA-based Mealy FSMs with Counters. 136-139 - Bartosz Tutro, Kacper Urbanski, Robert Szczygiel
Design of Matrix Controller for Hybrid Pixel Detectors. 140-144 - Alexander Barkalov, Larysa Titarenko
Encoding of Terms in LUT-based Mealy FSMs. 145-148 - Zbigniew Jaworski
High Resolution Latched Comparator Implemented in 22 nm FD-SOI Process. 149-153 - Ebrahim Hosseini, Morteza Mousazadeh, Abdollah Amini:
High-Speed 32*32 bit Multiplier in 0.18um CMOS Process. 154-159 - Igor Butryn, Lukasz Wiechowski, Daniel Pietron, Witold A. Pleskacz:
Ka Band Digitally Controlled Oscillator for FMCW Radar in 130 nm SiGe BiCMOS Technology. 160-164 - Taher Aspokeh, Abdollah Amini, Ali Baradaranrezaeii, Mahdi Yazdani:
Low-Power 13-Bit DAC with a Novel Architecture in SA-ADC. 165-168 - Tomasz Talaska
Low Power, Low Chip Area, Programmable PID Controller Realized in the CMOS Technology. 169-172 - Piotr Otfinowski
Multithreshold Pattern Recognition Algorithm for Charge Sharing Compensation in Hybrid Pixel Detectors. 173-177 - Nenad Lilic, Robert Kappel, Georg Roehrer, Horst Zimmermann
No Static Power Excess Bias Voltage Monitoring Circuit (EBVMC) for SPAD Applications. 178-183 - Tomasz Talaska
Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps. 184-187 - Grzegorz Jablonski
Performance Optimization of Implementation of Lattice Boltzmann Method in ARUZ. 188-191 - Xiang Ding, Klaus Hofmann, Liang Zhang, Dongbai Yi, Yingjiang Ma:
Redundant Double Conversion based Digital Background Calibration of SAR ADC with Convergence Acceleration and Assistance. 192-197 - Theodor Hillebrand, Steffen Paul, Dagmar Peters-Drolshagen:
Topology-Driven Reliability Assessment of Integrated Circuits. 198-203 - Alexander Barkalov, Larysa Titarenko
Twofold State Assignment for LUT-based Mealy FSMs. 204-208 - Chun-Yi Chu, Marcin Lukowiak:
Two Step Power Attack on SHA-3 Based MAC. 209-214 - Mehdi Ghasemzadeh
Ultra Low-power, High-speed Digital Comparator. 215-217 - Zbigniew Mudza:
Using Verilog-to-Routing Framework for Coarse-Grained Reconfigurable Architecture Routing. 218-222 - Mariusz Zubert
Determining Parameters of the Dual-Phase-Lag Model of Heat Flow. 225-230 - Adama Samake, Piotr Kocanda, Andrzej Kos:
Effective Temperature Control Approach for ICs. 231-236 - Krzysztof Górecki, Przemyslaw Ptak
Influence of Cooling Conditions of Power LEDs on Their Electrical, Thermal and Optical Parameters. 237-242 - Pawel Górecki
Investigation of the Influence of Thermal Phenomena on Dynamic Parameters of the IGBT. 243-247 - Gabor Farkas
LED Characterization for Combined Electrical-Optical-Thermal LED Modeling. 248-253 - Francesc N. Masana:
More on Structural Information from Thermal Impedance Measurements in Time Domain. 254-257 - Piotr Zajac, Melvin Galicia, Andrzej Napieralski
Thermal-aware Floorplanning Guidelines for 3D ICs with Integrated Microchannels. 258-261 - Lubomír Brancík
Characterization of MTL Hybrid Circuits with Stochastic Parameters through SDAE Approach. 265-268 - Jacek Nazdrowicz:
Different Methods of MEMS Simulations in Matlab/SIMULINK. 269-274 - Bartosz Dec, Andrzej Pfitzner:
Feasibility Studies of EEPROM Memory Implementations in VeSTIC Technology. 275-279 - Jacek Nazdrowicz, Michal Szermer
MEMS Gyroscope FEM Modeling and Simulation. 280-284 - Roman Sotner
On Advanced Current Conveyor Applications Having Capacitor Connected to Current Input Terminal. 285-290 - Marek Bogdan Zaradny:
On the Novel Approach to Parallel Coupled-Line Bandpass Filters that Have Diverse Wavelenght Impedance Scaling I/O Transformers. 291-298 - Mikolaj Palgan, Andrzej Pfitzner:
Optimization of the VeSFET Structure Dedicated to Basic Logic Cells in VeSTIC Technology. 299-304 - Jaak Kousaar, Raimund Ubar
Parallel Critical Path Tracing Fault Simulation in Sequential Circuits. 305-310 - Loukas Chevas, Aristeidis Nikolaou, Matthias Bucher
Investigation of Scaling and Temperature Effects in Total Ionizing Dose (TID) Experiments in 65 nm CMOS. 313-318 - Krzysztof Piskorski, Henryk M. Przewlocki, Vikram Passi
Photoelectric Measurements of the Modern Graphene-Insulator-Semiconductor (GIS) Test Structures. 319-323 - Pawel Pawlowski
Reflow Oven for Heating and Soldering SMD and BGA Components. 324-329 - Adem Lale, Abdelhakim Bourennane, Frédéric Richardeau:
Monolithic Complementary Multi-terminal RC-IGBT Chips for Compact Multi-phase Power Converter. 333-337 - Jacek Dabrowski
New Model of Solar Cells for SPICE. 338-342 - Andrii Stefanskyi, Lukasz Starzak
Universal Behavioural Model for SiC Power MOSFETs Under Forward Bias. 343-348 - Lukasz Grzymkowski, Tomasz P. Stefanski
A New Approach to Stability Evaluation of Digital Filters. 351-354 - Jiri Petrzela:
Chaotic Admittance with Commercially Available Active Elements. 355-360 - Ankita Deo, Sumit K. Pandey, Ashish Joshi, Satinder K. Sharma, Hitesh Shrimali:
Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application. 361-365 - Tomasz Pander, Tomasz Przybyla
ECG Signal Enhancement with Serial Cascade OWA Filter. 366-370 - Wojciech Wieclawek
Edge Aware Adaptive Filtering Method for Image Denoising. 371-375 - Tomasz Przybyla
Modified Neighborhood Determination in Nonlinear State-Space Projective Filtering. 376-380 - Zofia Dlugosz, Rafal Dlugosz:
Nonlinear Activation Functions for Artificial Neural Networks Realized in Hardware. 381-384 - Ihor Javorskyj
Nonparametric Spectral Analysis of Periodically Nonstationary Vibration Signals for Electrical Rotary Machines Testing. 385-389 - Danylo Lizanets, Rafal Walczak:
Processing and Simulation of Output from Lab-on-a-Chip Devices in Cell Mechanical Analysis. 390-393 - Cezary Kolacinski
Study of Wireless Communications Link at Subterahertz Frequencies Using FET-based Detectors. 394-399 - Michal Zbiec, Mariusz Jakubowski
Adaptive Wireless Lighting System. 403-408 - Marcin Szpyrka
Alvis Data Graphs. 409-415 - Kamil Rudnicki, Tomasz P. Stefanski
IP Core of Coprocessor for Multiple-Precision-Arithmetic Computative. 416-419 - Wojciech Szmuc
Towards Embedded Systems Formal Verification Translation from SysML into Petri Nets. 420-423 - Aleksandra Lis, Pawel Sniatala, Marek Konkol
Computer-aided Diagnosis in Lungs Radiography. 427-430 - Nasrin Khiabanmanesh, Abdollah Amini, Sara Mihandoost:
Diagnosis of Epilepsy Utilizing Time-Series Distribution of EEG Signals. 431-435 - Gabriel Cirac Mendes Souza
Evaluation of Pattern Recognition in Myoelectric Signal Using Netlab GLM. 436-440 - Aleksandra Pokrzywnicka
Lab-on-chip for Mechanical Characterization of Oocyte. 441-444 - Pawel Turcza
Low Complexity Multichannel Neural Data Compression by Exploiting Spatial Signal Correlation. 445-448 - Karolina Kolodziej, Malgorzata Szypulska, Wladyslaw Dabrowski
Modelling and Cancellation of the Stimulation Artifact for ASIC-based Bidirectional Neural Interface. 449-453 - Andrzej Napieralski, Wojciech Tylman
Multi-sensor Data Fusion for Object Rotation Estimation. 454-459 - Janusz Wrobel
Optimizing the Automated Detection of Atrial Fibrillation Episodes in Long-term Recording Instrumentation. 460-464 - Ewelina Sobotnicka
Tests for Pilots under Simulated Hypergravity Conditions - Technological Challenges and Tesearch Methodology. 465-470
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