Mosfet 2 3

Lecture No 2 on MOSFET
We have already seen

the Physical structure of
MOSFET , lets see its
Operation
S D When Gate , Source and drain , all are at zero
potential then no channel formed between
source and drain - No current flow possible
S When positive voltage applied at Gate only ,

D The holes in the substrate are pushed down ,
leaving behind negative ions , balancing the
positive charges on the top plate
When Gate potential crosses certain

S D threshold voltage , the electrons from the
two heavily doped S & D regions are
attracted – the total negative charges i.e.
ions and electrons balances the positive
charges on the top plate
As we increase the potential at the
drain , the channel starts to taper
𝑸=𝑪
×𝑽
S
𝑉 𝑒𝑓𝑓𝑒𝑐𝑡𝑖𝑣𝑒 =𝑉 𝐺 − 𝑉 𝑥
The channel gets
tapered
Channel is pinched
off
𝑉
𝐷𝑆 ≥ 𝑉 𝐺𝑆 −𝑉 𝑇𝐻
Pinch off point shifts
to left
Because of the electric field the

electrons are sucked in the drain:
BUT the current will be constant
and independent of
Derivation of current equation
Charge on the capacitor is = Capacitance x Voltage applied 𝑸=𝑪
×𝑽
𝑇𝑜𝑡𝑎𝑙
𝑐h𝑎𝑟𝑔𝑒= 𝐴𝑟𝑒𝑎 × 𝐶𝑎𝑝𝑎𝑐𝑖𝑡𝑎𝑛𝑐𝑒 ×𝑉𝑜𝑙𝑎𝑡𝑔𝑒
𝑄
𝑇 =W × 𝐿 ×𝐶 𝑜𝑥 ×𝑉
Charge per unit length is
𝑸
𝑻𝑳=𝐖 × 𝑪 𝒐𝒙 × 𝑽 𝑮
𝑄
𝑇𝐿=W ×𝐶 𝑜𝑥 ×(𝑉 ¿ ¿ 𝐺 −𝑉 𝑇𝐻 − 𝑉 𝑥 )¿
Derivation
Since
L
Plotting Curve
It’s a parabola ,
what after this
point, and how
to find peak
value of this
curve

How do we find the maxima of curve /current,
We will take derivative wrt of the equation of current
Maximum value of
current
The value of at which

we will get peak current
The point where the peak current occurs is when

That is for
MOSFET acts as a resistor
𝐼 𝐷 =𝑔 =1/ 2 𝐶 𝜇 𝑊 ( 2× 𝑉 − 𝑉 )
𝐷𝑆 𝑜𝑥 𝑛 𝐺𝑆 𝑇𝐻
𝑉 𝐷𝑆 𝐿

What happens if
• We start from the basic equation
Butthe integration limit all though starts from zero but it ends at
the point where the channel end or pinched off
𝐿 (𝑉 𝐺 −𝑉 𝑇𝐻 )
∫ 𝐼 𝐷 𝑑𝑥=𝑢𝑛 𝐶 𝑜𝑥 ( 𝑊 ) ∫ ( 𝑉 𝐺𝑆 −𝑉 𝑇𝐻 − 𝑉 𝑥 ) 𝑑𝑉
0 0
 1 ' W  2
OR iD   k n   vGS  Vt  
2 L 
If we increase

The Curve

In saturation Region
1 ' W  2
iD  k n   vOV
2  L
1 ' W 
iD  k n   (vGS  Vt ) 2
2  L
A voltage controlled current cource
The iD – vOV curve can be obtained by

shifting the origin to Vth
The Curve

vDS  vOV
NMOS Transistor Regions of Operation: 1
vDS  VOV
vGD  Vtn
Triode Region
 W  1 2 
iD  k n'   (v OV vDS  vDS )
 L 2 
vGS  Vtn : no Channel;

the transisto r is cut - off
iD  0
vGS  Vtn  VOV :

Channel is induced;
the transisto r operating
NMOS Transistor Regions of Operation: 2
vDS  VOV
vGD  Vtn
Saturation Region
1 ' W  2
2  L
vGS  Vtn : no Channel;

the transisto r is cut - off
iD  0
vGS  Vtn  VOV :

Channel is induced;
the transisto r operating
Summary of Regions of operation
The Equivalent Circuit Model of the NMOS in
Saturation
1 ' W  2
iD  kn   vOV
2  L 
1 ' W 
iD  kn   (vGS  Vtn )
2
2  L 
• A voltage controlled current source

• The drain current is a function of vOV
Channel Length modulations
Channel-Length Modulation
Channel Length Modulation
Output Resistance in Sat Mode:1
Ideally
1 ' W  2
2 L
In practice the channel length

reduces with increase in vDS ,
thus iD may be expressed as :
1 ' W  2
iD  kn   vOV
2  L  L 
 
1 'W  1  2
or iD  k n   vOV
2 L  1  L 
 
 L 
 
1 'W  1  2
2 L  1  L 
 
 L 
L
since  1
L
using series expansion we get
1 W L  2
iD  k n'  1   vOV
2 L L 
since L  vDS
Finally we get
L   vDS
'
1 'W 2
and 
'
iD  kn vOV 1  vDS 
L 2 L
1 'W 2
We got iD  k n vOV 1  vDS 
2 L
1
iD  0 when vDS 

1
So VA 

VA is a device parameter, with dimensions of V
For a given process, VA is proportion al to the
channel length
defining VA  V A' L
here VA' is entirely process technolo gy parameter,

with dimensions of V/m
1 'W 2
Using iD  k n vOV 1  vDS 
2 L
1
 i 
and rO   D 
 vDS  vGS Cons
1
 k n' W 2 
We get rO   VOV 
 2 L 
1
 rO 
I D
VA
Therefore rO 
ID
where I D is current wi thout channel modulation
The MOSFET parameter VA depends on the

process technology, and for a given process,
is proportional to the channel length
Student Queries
1. What would happen if we had applied a different voltage at the source

and a different voltage at the drain.
2. When we increase VDS further the length of the channel decreases. So

does it mean that we have created a voltage dependent Length??
3. when we talk about MOS being symmetric. if the device is symmetric

then there is no way of identifying the drain or the source physically
until labeled. Correct? So how will we identify which is the source and the
drain if I connect batteries on both sides. Also if we know that the device
is labeled with the source and drain. And I connect a battery on the source
and keep the drain grounded. Current will flow from the source to the
drain or we will consider source as drain and drain as source??
NMOS Circuit Symbols
ro incorporated in the large signal model of

n-channel MOSFET
Summary
𝑉𝐺𝑆<𝑉𝑇𝐻;𝑤𝑖𝑡h𝑒𝑣𝑒𝑛𝑉𝐷𝑆>0,𝑠𝑡𝑖𝑙 𝑛𝑜𝑐𝑢𝑟 𝑒𝑛𝑡

•
𝑉 𝐺𝑆 ≥𝑉 𝑇𝐻 ; 𝑉 𝐷𝑆 =0 . 𝑇h𝑜𝑢𝑔h 𝑐h𝑎𝑛𝑛𝑒𝑙 𝑖𝑠 𝑓𝑜𝑟𝑚𝑒𝑑 𝑏𝑢𝑡 𝑛𝑜 𝑐𝑢𝑟𝑟𝑒𝑛𝑡
𝑉
𝐺𝑆 ≥𝑉 𝑇𝐻 ; 𝑉 𝐷𝑆 𝑖𝑠 𝑣𝑒𝑟𝑦 𝑠𝑚𝑎𝑙𝑙 𝑡h𝑒𝑛 𝑉 𝑂𝑉 . MOSFET acts as resistor
𝑉
𝐺𝑆 ≥𝑉 𝑇𝐻 ; 𝑉 𝐷𝑆 < 𝑉 𝑂𝑉 . MOSFET ∈triode region
𝑉
𝐺𝑆 ≥𝑉 𝑇𝐻 ; 𝑉 𝐷𝑆 ≥ 𝑉 𝑂𝑉 . MOSFET ∈saturation region

Note in MOSFETs
Comparison with BJT
Effect of Channel Width
Circuit Symbol
PMOS Transistor
Polarity of the terminal

voltages !!!!!
PMOS Transistor
vGS  Vtp since Vtp is negative
To avoid dealing with negative signs
vGS  Vtp
 L
k p'   p Cox and k p  k p' W
where  p  0.25 n to 0.5 n

PMOS Circuit Symbols
CMOS Technology
EXAMPLES SOLVING
¿ 𝜇 𝐴
𝑛 = 𝜇𝑛 𝐶 𝑜𝑥 =194
𝑘
𝑉2
Example 5.2
Consider an NMOS transistor fabricated in a 0.18-μm process with
L = 0.18 μm and W = 2 μm. The process technology is specified to have
Cox = 8.6 fF/μm2, μn = 450 cm2/ V.s and Vtn = 0.5 V.
(a) Find VGS and VDS that result in the MOSFET operating at the edge of saturation
with ID = 100 μA.
(b) If VGS is kept constant, find VDS that results in ID = 50 μA.
(c) To investigate the use of the MOSFET as a linear amplifier, let it be operating in
saturation with VDS = 0.3 V. Find the change in iD resulting from changing VGS
from 0.7 V by +0.01V and by - 0.01V.
Solution: The FET transconductance

The process transconductance parameter parameter
(a) Find VGS and VDS that result in the MOSFET operating at the edge of
saturation with ID = 100 μA.
kn  4.3 mA / V 2
Since operating at the edge of saturation

(b) If VGS is kept constant, find VDS that results in ID = 50 μA.
As ID is reduced from the value obtained at the edge of saturation, the MOSFET
will now be operating in the triode region
kn  4.3 mA / V 2
In triode region VDS can’t be greater than Vov

(c) To investigate the use of the MOSFET as a linear amplifier, let it be operating in
saturation with VDS = 0.3 V. Find the change in iD resulting from changing VGS
from 0.7 V by +0.01V and by - 0.01V.
𝑊 2
𝐼 𝐷 =1/ 2 𝜇 𝑛 𝐶 𝑜𝑥 𝑉
𝐿 𝑂𝑉
60 120 2
0.3=0.5 × × × 𝑉 𝑂𝑉
1000 3
𝑇h𝑒𝑟𝑒𝑓𝑜𝑟𝑒
𝑉 𝑂𝑉 =0.5 𝑉
𝑉
𝐺𝑆 −𝑉 𝑇𝐻 =𝑉 𝑂𝑉 → 𝑉 𝐺𝑆 =1.5
𝑇h𝑒𝑟𝑒𝑓𝑜𝑟𝑒
𝑉 𝑆 =−1.5
𝑉 𝑆 − 𝑉 𝑆𝑆 −1.5 − (− 2.5 )
𝑅 𝑆= = =3.33 𝐾 Ω
𝐼𝐷 0.3

𝑊 2
𝐼 𝐷 =1/ 2 𝜇 𝑛 𝐶 𝑜𝑥 𝑉 𝑂𝑉
𝐿
𝑉
𝐷=𝑉 𝐺 =0.8 𝑉
𝑉
𝑂𝑉 =𝑉 𝐺𝑆 −𝑉 𝑇𝐻 =0.8− 0.5=0.3
−3 2
𝐼 𝐷 =0.5 × 0.4 × 10 × 4 × ( 0.3 ) =72 𝜇 𝐴
𝑅= 1.8 − 0.8 =13.9 𝐾

−6
72 × 10

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Lecture No 2 on MOSFET

We have already seen

S When positive voltage applied at Gate only ,

When Gate potential crosses certain

Because of the electric field the

Charge per unit length is

The value of at which

The point where the peak current occurs is when

A voltage controlled current cource

The iD – vOV curve can be obtained by

vGS  Vtn : no Channel;

vGS  Vtn  VOV :

vGS  Vtn : no Channel;

vGS  Vtn  VOV :

• A voltage controlled current source

In practice the channel length

here VA' is entirely process technolo gy parameter,

The MOSFET parameter VA depends on the

1. What would happen if we had applied a different voltage at the source

2. When we increase VDS further the length of the channel decreases. So

3. when we talk about MOS being symmetric. if the device is symmetric

ro incorporated in the large signal model of

𝑉𝐺𝑆<𝑉𝑇𝐻;𝑤𝑖𝑡h𝑒𝑣𝑒𝑛𝑉𝐷𝑆>0,𝑠𝑡𝑖𝑙 𝑛𝑜𝑐𝑢𝑟 𝑒𝑛𝑡

Polarity of the terminal

To avoid dealing with negative signs

where  p  0.25 n to 0.5 n

(b) If VGS is kept constant, find VDS that results in ID = 50 μA.

Solution: The FET transconductance

Since operating at the edge of saturation

In triode region VDS can’t be greater than Vov

𝑅= 1.8 − 0.8 =13.9 𝐾

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