A Review of Implementing ADC in RFID Sensor
A Review of Implementing ADC in RFID Sensor
A Review of Implementing ADC in RFID Sensor
Journal of Sensors
Volume 2016, Article ID 8952947, 14 pages
http://dx.doi.org/10.1155/2016/8952947
Review Article
A Review of Implementing ADC in RFID Sensor
M. Zurita,1 R. C. S. Freire,1 S. Tedjini,2 and S. A. Moshkalev3
1
Federal University of Campina Grande, Rua Aprigo Veloso 882, 58429-900 Campina Grande, PB, Brazil
Universite Grenoble Alpes, LCIS, 50 rue de Laffemas, BP 54, Valence Cedex, 26902 Rhone-Alpes, France
3
Center for Semiconductor Components, UNICAMP, P.O. Box 6061, 13083-870 Campinas, SP, Brazil
2
1. Introduction
In the last years, many technological developments have
dramatically expanded the functionality of RFID. Advances
in microelectronics, embedded software, and RF/microwavecircuit integration are making new RFID applications possible [1]. Among these new applications, the use of passive
RFID tags as environmental sensors has a huge number of
possibilities [2], including the Internet of Things (IoT) [3] and
human care assisting solutions [4].
There are too many ways to transform a RFID tag
into a RFID sensor. Some of them exploit the sensitivity
of the tag antenna to the physical characteristics of its
surrounding environment or its influence on RFID chip
response as reported in [57]. However, if the addition of
sensing capabilities to passive RFID transponder is made by
integrating a sensor interface to the digital core of tags chip, a
full set of components should be developed: more specifically,
an analog-to-digital converter (ADC), a signal conditioning
circuit to the sensors, and a multiplexing circuit to allow
interfacing multiple sensors.
The key component for these augmented tags is clearly
the analog-to-digital converter. When looking for possible
solutions, the designer will face a huge number of architecture
topologies and different approaches to implement it. This
reality brings flexibility to design stage but also some incertitude about the rightest choice. In this context we present a
survey analysis on the most suitable ADCs for RFID sensing
applications.
Journal of Sensors
3. Power Constraints
The major constraint for all passive RFID transponders is
the limited amount of available power. A study on the main
concerning about power constraints of HF RFID systems
operating at free space is covered by this section. Systems
embedded in different medium or in mixed medium needs
a more complex analysis [23].
Near the field, the magnitude of the magnetic field along
the central axis of a circular loop antenna can be calculated
by
|| =
2
3
2(2 + 2 )
(1)
|| =
2
2
2 1
( 3 2) + ( 2) .
4
(2)
2
190
170
150
130
110
90
70
50
30
10
0.01
0.1
10
Distance (m)
Europe
America
Typical reader
4. Timing Constraints
Besides the above explained power constraints, sensor interface circuits and sensor itself should comply with timing
constraints imposed by standardized communication protocol. The time constraint related to the chosen protocol
should be taken into account for circuit design and choice of
sensors. Analog-to-digital converter and signal conditioner
are usually the most time consuming circuits:
AFE + Core + ADC + SCC + MUX + Sens 1 ,
(3)
Journal of Sensors
Tag
Response
AFE +
core
MUX
Sens
SCC
ADC
the time interval of one complete analog-to-digital conversion (including sample holding time), and SCC and MUX
are the time consumed by signal conditioning circuit and
multiplexer, respectively, before to deliver the sensor signal to
ADC. Sens is the response time of the sensor, that is, the time
between its powering and a correct output. Finally, 1 is the
maximum allowed time for a tag to reply on a reading alike
request. The time diagram of a full sensor reading sequence
performed by a RFID sensing tag is depicted in Figure 2.
For HF tags complaint with ISO/IEC 15693 protocol, the
timeout constraint for 1 is defined as [31]
4192
{
, minimum,
{
{
{
{
{
{
{
{
{ 4224
, nominal,
1 = {
(4)
{
{
{
{
{
{
{ 4256
{
{
, maximum.
{
For NFC complaint tags, the ISO/IEC 14443 protocol
defines the timeout constraint for 1 as [32]
{
{
4096
{
{
{
{
{
{
{
{
{
1 = {4096
{
{
{
{
{
{
{
{
{
{4096
{
20
,
minimum,
24
,
nominal,
214
,
maximum.
(5)
Solving both (4) and (5) for the nominal carrier frequency (13.56 MHz), the minimum and maximum timeouts are 309.14 s/313.86 s for ISO/IEC 15693 protocol and
302.06 s/4949 ms for ISO/IEC 14443 protocol. This way,
a sensing system targeting both standards should consider
the most restrictive timing limits, that is, 309.14 s as the
minimum timeout and 313.86 s as the maximum timeout.
1
,
/ + /
(6)
Journal of Sensors
700
Table 1: factor and conductive ink area for two sets of planar
spiral coils.
144
225
324
441
576
Approach 1
Approach 2
HF antenna model
500
400
300
200
100
0
1.6
1.4
1.2
1.0
0.8
Magnetic field strength (A/m)
0.6
0.4
Approach 1
Approach 2
Rp
600
Cp
Ct
RL
6. Sensor Interface
A generic diagram of a passive RFID tag with a multiple
sensor interface integrated to its digital core is shown on
Figure 5. The sensor interface is composed by three main
components: a multiplexer, a signal conditioner, and an
analog-to-digital converter.
Once the energy is the most scarce resource in such
systems, the role of the multiplexer is not only to select the
sensor signal to be processed but also to select the sensor
witch should be powered, keeping others unconnected to
save that power. Even the selected sensor should be switched
off as soon as the ADC sample-and-hold circuit finishes its
job. Some sensors need a significant warm-up time before
to be ready for correct readings. These kinds of sensors are
not appropriated for passive RFID solutions and should be
avoided if possible.
The signal conditioning circuit is also a very common
need when a sensor signal should be sent to a analog-todigital converter. Although its clear importance, the signal
conditioning circuit should be minimized in order to save
power. Generally speaking, four different solutions are proposed for this block, being only one (the last) a real signal
conditioning:
(i) Bypass and ADC Input Range Statically Adjusted. If
the adopted ADC has an adjustable input range and
only one sensor is interfaced or multiple sensors with
similar output voltage range, the input range of A/D
Journal of Sensors
5
Analog front-end
Digital core
Antenna
Voltage
regulator
Rectifier
Sensors interface
ADC
Digital core
Singal
conditioner
Sensor 1
Multiplexer
Sensor N
Modulator
Demodulator
Non-volatile
memory
Sensor 0
..
.
Figure 5: A generic diagram for a passive RFID tag integrated with a multiple sensor interface.
Journal of Sensors
Table 2: The most efficient converters reported on VLSI and ISSCC since 2008.
(uW)
1.90
1.20
17.44
0.17
0.10
0.50
0.20
0.35
0.08
24.00
0.11
0.12
0.09
46.00
fs (MHz)
1.00
1.10
4.00
0.10
0.04
0.50
0.25
0.03
0.20
80.00
0.08
0.10
0.10
6.40
1E + 06
1E + 05
Year
SAR
Delta-Sigma
Pipe
1E + 01
14
28
32
1E 01
40
1E + 00
45
2015
2014
2013
2012
2011
2010
2009
2008
2007
1E 01
2006
1E + 00
1E + 02
65
1E + 01
1E + 03
90
1E + 02
Tech. (nm)
65
40
90
90
65
90
90
65
40
28
65
180
65
40
1E + 04
130
1E + 03
ENOB
8.7
7.5
9.4
9.1
10.1
8.7
8.6
11.3
8.9
6.4
9.1
7.5
9.2
10.4
180
1E + 04
250
FOM (fJ/Conversion-step)
1E + 06
1E + 05
350
FOM (fJ/Conv-step)
4.4
6.3
6.5
3.2
2.2
2.4
2.0
4.4
0.9
3.7
2.4
6.6
1.5
5.5
>350
Type
SAR
SAR
SAR
SAR
SAR
SAR
SAR
SAR
SAR
Async.
SAR
SAR
SAR
SAR
2005
FOM (fJ/Conversion-step)
Ref.
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
SAR
Delta-Sigma
Pipe
Flash
Others
Journal of Sensors
1E + 5
1E + 4
1E + 3
1E + 2
1E + 1
1E + 0
0
8
10 12 14
Distance (cm)
16
18
20
Journal of Sensors
VDD
340
320
M1
Vsen
Vbias
R2
300
R1
280
260
240
220
200
M2
180
GND
160
140
Figure 9: Low power temperature sensor based on ZTC characteristic of MOS devices.
GS = GSF + VT (1
),
DF
(7)
20
20
40
60
80
Temperature ( C)
100
120
140
Measured points
Ideal linear response
Simulated response
40
1.5
1.0
0.5
0.0
0.5
40
20
20
40
60
Temperature ( C)
80
100
120
140
Journal of Sensors
9
mean of a short duration current pulse (about of 10 A
during few microseconds). For that, appropriated values of
resistance should be used for 0 to 3 resistors. Since the
exact resistance value of each CNT microsensor is not well
determined (depending on the amount and characteristics
of deposited nanotubes), both and resistors are placed
externally to the chip.
3
4
2
1
Figure 12: Schematic drawing of the CNT gas microsensor. Oxidized silicon substrates (1), gold patterned electrodes (2), wire
bonding connections (3), and the gap with DEP deposited carbon
nanotubes (4) compose the device. The inset shows a closer view of
the CNTs deposited between the gold electrodes [22].
10
Journal of Sensors
Biasing network
_read
Rr0
Rr1
Rr2
Rr3
Sensors
Sens_0
sens0
Sens_1
sens1
Sens_2
sens2
Sens_3
sens3
Rc0
_clear
Rc1
Rc2
Rc3
sels_0..sels_3
Multiplexer
read_sens
M4
SW0
CMD
VDD
SW1
CMD
Vout
SW2
CMD
SW3
VDD
CMD
M0
M1
sel_3
sel_2
M2
sel_3
sel_2
sel_1
sel_0
sel_0
sel_1
M5
clear_sens
s0..s2
s2 s1 s0
out0..out3
in
MUX
M3
Figure 13: Schematic diagram of CNT sensors connected to a biasing network and multiplexing circuitry.
fully customized to save power. Moreover, once the conversion finishes the SAR cuts off its feeding clock to avoid
unnecessary power consumption with gate switching.
With the view to improve the converter accuracy without
increase the energy demand, a low power and low offset
time domain comparator (TDC) [60] was used. The layout of
all DAC capacitors and TDC main components were made
according to common centroid techniques.
The ADC was fabricated in IBM 180 nm CMOS process.
A chip photograph is shown in Figure 16. The total chip
occupies 2.0 1.5 mm2 and the ADC core area is 275
145 m2 , including a Daisy Chain testing structure.
Static tests were performed in order to measure the
differential non-linearity (DNL) and the integral nonlinearity
(INL) which gives +0.98/0.59 and +1.03/3.30 LSB, respectively. High values are due a parasitic-nonlinear capacitances
Journal of Sensors
11
Vin
+
Vout
Gain
Gain
PGA
Vref+
Vref+
Vref
b0
ZeroAdj
Vout
DAC
b1
b2
b3
b4
b5
b6
b7
S2a
Vx
S2b
Cs
b7
C/2
C/4
b6
b5
C/8
b4
b3
C/2
C/4
b2
b1
C/8
C/8
VOUT
b0
VREF+
Vin
S1
VREF
DNL [LSB]
Journal of Sensors
1.0
0.5
0.0
0.5
1.0
INL [LSB]
12
1.0
0.0
1.0
2.0
3.0
50
100
150
Output code
200
250
50
100
150
Output code
200
250
2nd harmonic
42.8 dB
3rd harmonic
5th harmonic
53.1 dB
50.8 dB
Pout (dB)
20
40
60
80
100
10
20
30
Frequency (kHz)
40
50
Figure 18: Output spectrum of designed ADC for an input frequency of 2.92 kHz.
Device
MUX
Signal conditioning circuit
ADC
CNT sensor
Temperature sensor
Overall results
Power consumption
0.20 W
9.00 W
6.10 W
4.80 W
0.11 W
20.21 W
Time delay
1.0 s
7.0 s
12.0 s
10.0 s
30.0 s
2nd harmonic
42.8 dB
Pout (dB)
20
5th harmonic
50.8 dB
40
Conflict of Interests
3rd harmonic
62.7 dB
60
80
100
10
20
30
Frequency (kHz)
40
50
Figure 19: Output spectrum of designed ADC for an input frequency of 44.8 kHz.
standards, as discussed on Section 4. Although the analogto-digital converters consume more energy than expected,
its power consumption is still within the limits previously
discussed. Moreover, the total power consumption is still
compatible with a NFC system for a 10 to 14 cm distance
range, according to the simulation results of Section 7.
Since the proposed system is a sensor interface for passive
HF RFID tags, it could be integrated to a standard tag circuit
as a single chip solution or connected with a RFID interface
chip, like the NF-4 from EM Microelectronic [30], with the
help of a simple glue logic circuit.
Acknowledgments
The authors acknowledge the support from Region RhoneAlpes (France), the CNPq (Brazil), and the INCT/NAMITEC
(Brazil) for the financial support and MOSIS for chip fabrication.
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Journal of Sensors
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