L060 Push Pull (2UP)
L060 Push Pull (2UP)
L060 Push Pull (2UP)
Page 060-1
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04)
PUSH-PULL MOS OUTPUT STAGES (Class AB and B) Push-Pull Source Follower VDD VDD Can both sink and source M6 M1 VGG current and provide a slightly M5 M1 lower output resistance. VSS VBias
vIN VBias M2 VDD iOUT vOUT RL VDD VSS
VDD
M4 M2
Efficiency: vIN M3 Depends on how the VSS Fig. 060-01 VSS VSS transistors are biased. Class B - one transistor has current flow for only 180 of the sinusoid (half period) vOUT(peak)2 PRL 2RL vOUT(peak) Efficiency = P = = 2 VDD -VSS 1 2vOUT(peak) VDD (VDD -VSS)2 RL Maximum efficiency occurs when vOUT(peak) =VDD and is 78.5% Class AB - each transistor has current flow for more than 180 of the sinusoid. Maximum efficiency is between 25% and 78.5%
Page 060-3
Illustration of Class B and Class AB Push-Pull, Source Follower Output current and voltage characteristics of the push-pull, source follower (RL = 1k):
2V 1V 0V -1V iD2 -2V -2 0 2 1 Vin(V) Class B, push-pull, source follower -1 -1mA -2V -2 -1 vout vG2 vG1 1mA iD1 0mA 2V 1V 0V -1V iD2 0 2 1 Vin(V) Class AB, push-pull, source follower vout vG2 -1mA 0mA vG1 iD1 1mA
Fig. 060-02
Comments: Note that vOUT cannot reach the extreme values of VDD and VSS IOUT+(max) and IOUT-(max) is always less than VDD/RL or VSS/RL For vOUT = 0V, there is quiescent current flowing in M1 and M2 for Class AB Note that there is significant distortion at vIN =0V for the Class B push-pull follower
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04)
gmbs1vbs1
gm2vgs2 gmbs2vbs2
C1 gm1vin
vout gm1 + gm2 vin = gds1+gds2+gm1+gmbs1+gm2+gmbs2+GL 1 Rout = gds1+gds2+gm1+gmbs1+gm2+gmbs2 (does not include RL) If VDD = -VSS = 2.5V, Vout = 0V, ID1 = ID2 = 500A, and W/L = 20m/2m, Av = 0.787 (RL=) and Rout = 448. A zero and pole are located at -(gds1+gds2+gm1+gmbs1+gm2+gmbs2+GL) -(gm1+gm2) p= . z= C1 C1+C2 These roots will be high-frequency because the associated resistances are small.
ECE 6412 - Analog Integrated Circuits and Systems II P.E. Allen - 2002
Page 060-5
Push-Pull, Common Source Amplifiers Similar to the class A but can operate as class B providing higher efficiency.
VDD M2 VTR2 vIN VTR1 M1CL VSS RL
Fig. 060-04
iOUT vOUT
Comments: The batteries VTR1 and VTR2 are necessary to control the bias current in M1 and M2. The efficiency is the same as the push-pull, source follower.
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04)
M6 VGG3
iOUT vOUT CL RL
VGG3 and VGG4 can be used to bias this amplifier in class AB or class B operation. Note, that the bias current in M6 and M8 is not dependent upon VDD or VSS (assuming VGG3 and VGG4 are not dependent on VDD and VSS).
Page 060-7
I=2Ib
Ib M1
M3 M4
M9 M2
In steady-state, the current through M5 and M6 is 2Ib. If W4/L4 = W9/L9 and W3/L3 = W8/L8, then the currents in M1 and M2 can be determined by the following relationship: W 1 /L 1 W 2 /L 2 I1 = I2 = Ib W 7/L 7 = Ib W 10/L10 If vin+ goes low, M5 pulls the gates of M1 and M2 high. M4 shuts off causing all of the current flowing through M5 (2Ib) to flow through M3 shutting off M1. The gate of M2 is high allowing the buffer to strongly sink current. If vin- goes high, M6 pulls the gates of M1 and M2 low. As before, this shuts off M2 and turns on M1 allowing strong sourcing.
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04) P.E. Allen - 2002 Page 060-8
Illustration of Class B and Class AB Push-Pull, Inverting Amplifier Output current and voltage characteristics of the push-pull, inverting amplifier (RL = 1k):
2V 1V 0V -1V -2V -2V 0V 1V 2V vIN Class B, push-pull, inverting amplifier. -1V iD2 vOUT iD1 vG2 iD1 iD2 vG1 2mA 1mA 0mA -1mA -2mA 2V 1V 0V -1V -2V -2V -1V iD2 iD1 vG2 vG1 iD1 iD2 vOUT 2mA 1mA 0mA -1mA -2mA 0V 1V 2V vIN Class AB, push-pull, inverting amplifier. Fig.060-06
Comments: Note that there is significant distortion at vIN =0V for the Class B inverter Note that vOUT cannot reach the extreme values of VDD and VSS IOUT+(max) and IOUT-(max) is always less than VDD/RL or VSS/RL For vOUT = 0V, there is quiescent current flowing in M1 and M2 for Class AB
Page 060-9
Error Amplifier
vIN + +
R2 VSS
M2 iOUT vOUT CL M1 RL
Fig. 060-07
Error Amplifier
rds1||rds2 Rout = 1+Loop Gain Comments: Can achieve output resistances as low as 10. If the error amplifiers are not balanced, it is difficult to control the quiescent current in M1 and M2 Great linearity because of the strong feedback Can be efficient if operated in class B or class AB
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04) P.E. Allen - 2002 Page 060-10
R1
vIN
rds1||rds2 R1 gm1+gm2 1+R1+R2gds1+gds2+GL Let R1 = R2, RL = , IBias = 500A, W1/L1 = 100m/1m and W2/L2 = 200m/1m. Thus, gm1 = 3.316mS, gm2 = 3.162mS, rds1 = 50k and rds2 = 40k. 50k||40k 22.22k Rout = (Rout = 5.42k if RL = 1k) 3316+3162 = 1+0.5(143.9) = 304 1+0.5 25+20
Rout =
VSS
iOUT vOUT CL M1 RL
Fig. 060-08
Page 060-11
vout
Comments: Can use either substrate or lateral BJTs. Small-signal output resistance is 1/gm which can easily be less than 100. Unfortunately, only PNP or NPN BJTs are available but not both on a standard CMOS technology. In order for the BJT to sink (or source) large currents, the base current, iB, must be large. Providing large currents as the voltage gets to extreme values is difficult for MOSFET circuits to accomplish. If one considers the MOSFET driver, the emitter can only pull to within vBE+VON of the power supply rails. This value can be 1V or more.
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04) P.E. Allen - 2002 Page 060-12
PUSH-PULL BJT OUTPUT STAGES (Class AB and B) Simple Class B Output Stage
VCC
Q1 + vOUT VBE(on) VBE(on) VEE+VBE2+VCE1(sat) vOUT
VCC-VBE1
vIN
Q2
RL
vIN VCC+VBE1-VCE1(sat)
VEE
Q2 Saturates
Slope 1 Q1 off Q2 on
VEE+VBE2
Fig. 060-10
Class B operation: Two active devices are used to deliver the power instead of one. Each device conducts for alternate half cycles. Efficiency can approach 78.5% Can suffer from crossover distortion - the transition from one device to the other.
Page 060-13
VCC
IQ Q3 Q4
VCC
Q1 + vOUT Q2 Saturates
VCC-VBE1
Q1 Saturates
Slope 1
vIN VBE(on)
Q2 vIN
RL
VEE
VEE+VEB2
Fig. 060-11
IQ sets up the bias current in Q1 and Q2 when there is no input signal. Each transistor is biased so that there is a region in the middle where both are on (Class AB)
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04)
Power Considerations in the Class B Output Stage Voltage and current waveforms for a Class B amplifier:
vin
2T
VCC
IQ Q3 Q4 vin Q2 Q1
VCC
vout ic1 + vout -
T Vout(peak) 2T T ic1
ic2
RL
VEE
T T Ic2(peak)
Ic1(peak) 2T t t
ic2
2T
Fig. 060-12
Page 060-15
Efficiency Considerations of the Class-B Push-Pull Output Stage Load line for one device in a class-B stage:
iC1
VCC RL
Load Line
0.5VCC
VCC
Efficiency: 1 [Vout(peak)]2 PL = 2 RL
1 T Ic(peak) 2 VCC and Psupply = 2VCCIsupply = 2VCC T iC(t)dt = 2VCC = RL Vout(peak) 0 PL Vout(peak) = P =4 V max = 4 = 78.6% supply CC VCC -VCE(sat) Max. efficiency for the above class-B push-pull output stage is max =4 VCC
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04) P.E. Allen - 2002 Page 060-16
VCC
10 RL = 10k 5
VCC
IQ 3 1 Q3 vIN 5
Fig. 060-14
Q1
vOUT
+ vOUT -
Q2 RL
RL = 1k
-5
VEE
-10 0.6 0.61 0.62 0.63 0.64 vIN 0.65 0.66 0.67
709 Output Stage Voltage Transfer Function .MODEL BJTN NPN IS=1E-14 BF=100 VAF=50 .MODEL BJTP PNP IS=1E-14 BF=50 VAF=50 Q1 4 3 2 BJTN Q2 5 3 2 BJTP Q3 3 1 5 BJTN VCC 4 0 DC 10V VEE 5 0 DC -10V
VIN 1 5 RL 2 0 1KILOHM R1 4 3 20KILOHM .DC VIN 0.60 0.67 0.001 .PRINT DC V(2) .PROBE .END
This stage assumes that feedback will be used around the amplifier which will linearize the nonlinearity of the output stage.
ECE 6412 - Analog Integrated Circuits and Systems II P.E. Allen - 2002
Page 060-17
VCC
0 -5
Q17
0.63
0.64
vIN
0.65
0.66
0.67
741 Output Stage Voltage Transfer Function - RL = 1Kilohm .MODEL BJTN NPN IS=1E-14 BF=100 VAF=50 .MODEL BJTP PNP IS=1E-14 BF=50 VAF=50 Q23 8 1 3 BJTP Q20 8 3 2 BJTP Q14 7 5 2 BJTN Q17 1 9 8 BJTN Q18 5 4 3 BJTN Q19 5 5 4 BJTN Q13A 5 6 7 BJTP Q13B 1 6 7 BJTP 3.0
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04)
Q13C 6 6 7 BJTP VCC 7 0 DC 15V VEE 8 0 DC -15V IBIAS 6 0 220UA VIN 9 8 DC 0.645 R10 4 3 40KILOHM RL 2 0 1KILOHM .DC VIN 0.625 0.665 0.0005 .PRINT DC V(2) .PROBE .END
P.E. Allen - 2002 Page 060-18
Quasi-Complementary Output Stages Quasi-complementary connections are used to improve the performance of the PNP or PMOS transistor. Composite connections:
E VEB B Q1 IC1 Q2 IC C C D + IE B IC E + VEB VSG G M1 ID1 Q2 ID D
Fig. 060-16
IE
S + VSG G ID
PNP Equivalent:
PMOS Equivalent:
VEB K P W 1 IC = (1+2) IC1 = (1+2) Isexp V ID = (1+2) ID1 = (1+2) 2L (VGS-VT)2 t 1 The composite has the beta of an The composite has an enhanced K NPN
Page 060-19
Overload Protection For circuits that can provide large amounts of output current, it is necessary to provide short-circuit current protection. Example:
VCC
iB1 iC2 ii Q2 Q1 ILim RLim 0 iC1 iOUT RLim = 0
RLim iOUT
Fig. 060-17
Short-Circuit
0 0
ii
iOUT = iC1+iC2 iC1 iOUT = 1iB1= 1(ii -iC2) vBE2 iC1RLim But iC2 Is2exp V Is2exp V t t iC1RLim iOUT = 1ii - Is2exp V t As iOUT increases, Q2 turns on and pulls base current away from Q1 limiting the output current.
ECE 6412 - Analog Integrated Circuits and Systems II Lecture 060 Push-Pull Output Stages (1/11/04) P.E. Allen - 2002 Page 060-20
SUMMARY Requirements of Output Stages The objectives are to provide output power in form of voltage and/or current. In addition, the output amplifier should be linear and be efficient. Low output resistance is required to provide power efficiently to a small load resistance. High source/sink currents are required to provide sufficient output voltage rate due to large load capacitances. Types of output stages considered: Class B or AB stage with push-pull (maximum efficiency was 78.6%) Quasi-complementary devices help improve the performance of the p-type devices Protection circuits prevent large currents from flowing in the output devices For large load capacitors all that is required from an output stage is large current, the output resistance does not have to be small