VINAFIX.

COM
TSM103/A
DUAL OPERATIONAL AMPLIFIER AND
VOLTAGE REFERENCE
NOT FOR NEW DESIGN - REPLACED BY TSM103W
OPERATIONAL AMPLIFIER
■ LOW INPUT OFFSET VOLTAGE : 0.5mV
typ.for TSM103A
■ LOW SUPPLY CURRENT : 350µA/op.
(@ V CC = 5V)

om
■ MEDIUM BANDWIDTH (unity gain) : 0.9MHz
■ LARGE OUTPUT VOLTAGE SWING : 0V to

.c
(VCC - 1.5V)
■ INPUT COMMON MODE VOLTAGE RANGE
INCLUDES GROUND D

ia
■ WIDE POWER SUPPLY RANGE : 3 to 32V SO8
±1.5 TO ±16V (Plastic Micropackage)

es
VOLTAGE REFERENCE
■ FIXED OUTPUT VOLTAGE REFERENCE 2.5V
■ 0.4% AND 1% VOLTAGE PRECISION
■ SINK CURRENT CAPABILITY : 1 to 100mA
on
PIN CONNECTIONS (top view)

■ TYPICAL OUTPUT IMPEDANCE : 0.2Ω

nd

DESCRIPTION
-i

The TSM103 is a monolithic IC that includes one

independent op-amp and another op-amp for
which the non inverting input is wired to a 2.5V
si

fixed Voltage Reference. This device is offering Output 1 1 8 VCC+

OP1
space and cost saving in many applications like OP2
Inverting Input 1 2 7 Output 2
ni

power supply management or data acquisition

- + 6 Inverting Input 2
systems. Non-inverting Input 1 3

V - 4 + -
5 Non-inverting Input 2
k

CC VRef
ORDER CODE
te

Package
Part Number Temperature Range
D
w.

TSM103I/AI -40°C, +105°C •

ww

D = Small Outline Package (SO) - also available in Tape & Reel (DT)

January 2003 1/9

TSM103/A

VINAFIX.COM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage 36 V
Vid Differential Input Voltage 36 V
Vi Input Voltage -03. to +36 V
Toper Operating Free-air Temperature Range -55 to +125 °C
Tj Maximum Junction Temperature 150 °C
Rthja Thermal Resistance Junction to Ambient (SO package) 175 °C/W

ELECTRICAL CHARACTERISTICS
Symbol Parameter Min. Typ. Max. Unit

om
Total Supply Current, excluding Current in the
Voltage Reference

.c
VCC+ = 5V, no load
ICC 1.2 mA
Tmin. < Tamb < Tmax.
0.7
VCC+ = 30V, no load
2

ia
Tmin. < Tamb < Tmax

es
on
nd
-i
si
k ni
te
w.
ww

2/9
 TSM103/A

VINAFIX.COM
OPERATOR 2 (independent op-amp)
VCC+ = +5V, VCC = Ground, V o = 1.4V,T amb = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
Vio Input Offset Voltage mV
TSM103, Tamb = 25°C 1 4
Tmin. ≤ Tamb ≤ Tmax. 5
TSM103A, Tamb = 25°C 0.5 2
Tmin. ≤ Tamb ≤ Tmax. 3
DVio Input Offset Voltage Drift 7 µV/°C
Iio Input Offset Current 2 30 nA
Tmin. ≤ Tamb ≤ Tmax. 50
Iib Input Bias Current 20 150 nA

om
Tmin. ≤ Tamb ≤ Tmax 200
Avd Large Signal Voltage Gain V/mV
VCC = 15V, RL = 2k, Vo = 1.4V to 11.4V 50 100

.c
Tmin. ≤ Tamb ≤ Tmax. 25
SVR Supply Voltage Rejection Ratio dB

ia
VCC = 5V to 30V 65 100
Vicm Input Common Mode Voltage Range V
VCC = +30V - see note 1) 0 (VCC+) -1.5

es
Tmin. ≤ Tamb ≤ Tmax. 0 (VCC+) -2
CMR Common Mode Rejection Ratio 70 85 dB

Isource
Tmin. ≤ Tamb ≤ Tmax.
Output Current Source
on 60
mA
VCC = +15V, Vo = 2V, Vid = +1V 20 40
nd
Io Short Circuit to Ground mA
VCC = +15V 40 60
-i

Isink Output Current Sink mA

Vid = -1V,
VCC = +15V, Vo = 2V 10 20
si

VOH High Level Output Voltage V

VCC+ = 30V
ni

Tamb = 25°C, RL = 10k 27 28

Tmin. ≤ Tamb ≤ Tmax. 27

VOL Low Level Output Voltage mV

k

RL = 10k 5 20
te

20
Tmin. ≤ Tamb ≤ Tmax.
SR Slew Rate at Unity Gain V/µs
w.

Vi = 0.5 to 3V, VCC = 15V 0.2 0.4

RL = 2k, CL = 100pF, unity gain
GBP Gain Bandwidth Product MHz
ww

VCC = 30V,RL = 2k, CL = 100pF 0.5 0.9

f = 100kHz, Vin = 10mV
THD Total Harmonic Distortion %
f = 1kHz 0.02
AV = 20dB,RL = 2k, VCC = 30V
CL = 100pF, Vo = 2Vpp
1. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of
the common-mode voltage range is VCC+ - 1.5V.
But either of both inputs can go to +36V without damage.

3/9
TSM103/A

VINAFIX.COM
OPERATOR 1 (op-amp with non-inverting input connected to the internal Vref)
VCC+ = +5V, VCC- = Ground, Tamb = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
Vio Input Offset Voltage mV
Vicm = 0V
TSM103, Tamb = 25°C 1 4
Tmin. ≤ Tamb ≤ Tmax. 5
TSM103A, Tamb = 25°C 0.5 2
Tmin. ≤ Tamb ≤ Tmax. 3

DVio Input Offset Voltage Drift 7 µV/°C

Iib Input Bias Current nA

om
negative input 20
Avd Large Signal Voltage Gain V/mV
Vicm = 0V

.c
VCC = 15V, RL = 2k 100
SVR Supply Voltage Rejection Ratio dB
Vicm = 0V

ia
VCC+ = 5V to 30V 65 100
Isource Output Current Source mA

es
Vo = 2V
VCC = +15V, Vid = +1V 20 40
Io

Isink
Short Circuit to Ground
VCC = +15V
Output Current Sink
on 40 60
mA

mA
nd
Vid = -1V,
VCC = +15V, Vo = 2V 10 20
VOH High Level Output Voltage V
-i

VCC+ = 30V
Tamb = 25°C, RL = 10k 27
27 28
si

Tmin. ≤ Tamb ≤ Tmax.

VOL Low Level Output Voltage mV
5 20
ni

RL = 10k
20
Tmin. ≤ Tamb ≤ Tmax.
SR Slew Rate at Unity Gain V/µs
k

Vi = 0.5 to 2V, VCC = 15V 0.2 0.4

te

RL = 2k, CL = 100pF, unity gain

GBP Gain Bandwidth Product MHz
VCC = 30V,RL = 2k, CL = 100pF 0.5 0.9
w.

f = 100kHz, Vin = 10mV

THD Total Harmonic Distortion %
ww

f = 1kHz 0.02
AV = 20dB,RL = 2k, VCC = 30V
CL = 100pF, Vo = 2Vpp

4/9
 TSM103/A

VINAFIX.COM
VOLTAGE REFERENCE
Symbol Parameter Value Unit
Ik Cathode Current 1 to 100 mA

Symbol Parameter Min. Typ. Max. Unit

Vref Reference Input Voltage V
TSM103, Tamb = 25°C 2.475 2.5 2.525
Tmin. ≤ Tamb ≤ Tmax. 2.45 2.55
TSM103A, Tamb = 25°C 2.49 2.5 2.51
Tmin. ≤ Tamb ≤ Tmax. 2.48 2.52
∆Vref Reference Input Voltage Deviation Over Temperature mV
Range

om
VKA = Vref; Ik = 10mA
Tmin. ≤ Tamb ≤ Tmax. 7 30
Imin Minimum Cathode Current for Regulation mA

.c
VKA = Vref 0.5 1
|ZKA| Dynamic Impedance - note 1) 0.2 0.5 Ω

ia
VKA = Vref, ∆IK = 1 to 100mA, f < 1kHz
1. The dynamic impedance is defined as [Z KA| = ∆VKA/∆IK

es
on
nd
-i
si
k ni
te
w.
ww

5/9
TSM103/A

VINAFIX.COM
OPERATIONAL AMPLIFIERS

Unit Frequency = F(I)

Vcc=+/-15V, RL=2k, CL=100pF

1000

800
Unit Freq
Thousands

600

400

om
200

.c
-0.01 -0.005 0 0.005 0.01 0.015
source <= I (A) => sink

ia
es
GBP = F(I)
Vcc=+/-15V, RL=2k, CL=100pF

800
700
on
nd
600
Thousands

500
GBP

400
-i

300
200
100
si

0
-0.01 -0.005 0 0.005 0.01 0.015
ni

source <= I (A) => sink

k
te

Phase and Gain Margin = F(I)

Vcc=+/-15V, RL=2k, CL=100pF
60 0
w.

50 -2
Phase Margin (deg)
ww

-4
Gain Margin (dB)

40
-6
30
-8
20
-10

10 -12

0 -14
-0.01 -0.005 0 0.005 0.01 0.015
source <= I (A) => sink

6/9
 TSM103/A

VINAFIX.COM

Total Harmonic Distorsion THD = F(freq)

0.014
0.013
0.012
0.011
THD(%)

0.01
0.009
0.008
0.007
0.006

om
0.005
10 100 1000 10000

.c
Frequency (Hz)

ia
Noise = F(frequency)

es
70

60

on
Noise(nV/SQR(Hz))

50

40
nd
30

20
-i

10
si

0
0.01 0.1 1 10 100
Frequency (Hz)
k ni

Vio Distribution - Operator 1

te

Vcc+=5V, Vcc-=0V
70
w.

60
Distribution (%)

50
ww

40

30

20

10

0
-3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 3
Vio (mV)

7/9
TSM103/A

VINAFIX.COM
Vio Distribution - Operator 2
Vcc+=5V, Vcc-=0V
70

60
Distribution (%) 50

40

30

20

10

om
0
-3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 3

.c
Vio (mV)

ia
Vref = F(Ik)

es
3

2.5
on
Vref (V)

2
nd
1.5
-i

1
si

0.5
0.0002 0.002 0.02 0.2
Cathode Current Ik (Amps)
k ni

Vref Stability = f(I,C)

te

0.06

0.05 Stable
w.
Current (Amps)

0.04
ww

0.03
Unstable
0.02

0.01

0
1E-10 1E-9 1E-8 1E-7 1E-6 1E-5
Capacitor(F)

8/9
 TSM103/A

VINAFIX.COM
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)

om
.c
ia
es
Millimeters Inches
Dim.
Min. Typ. Max. Min. Typ. Max.
A
a1 0.1
1.75
0.25
on 0.004
0.069
0.010
a2 1.65 0.065
nd
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
-i

b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.020
si

c1 45° (typ.)
D 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
ni

e 1.27 0.050
e3 3.81 0.150
k

F 3.8 4.0 0.150 0.157

te

L 0.4 1.27 0.016 0.050

M 0.6 0.024
S 8° (max.)
w.
ww

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics

© 2003 STMicroelectronics - All Rights Reserved

STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom
http://www.st.com
9/9