Tlx84Xb High-Performance Current-Mode PWM Controllers: 1 Features

TL284xB, TL384xB
SLVS610C – AUGUST 2006 – REVISED OCTOBER 2024
TLx84xB High-Performance Current-Mode Pwm Controllers

1 Features the addition of an internal toggle flip-flop, which blanks
the output off every other clock cycle. The TL284xB-
• Low Start-Up Current (<0.5mA)
series devices are characterized for operation from
• Trimmed Oscillator Discharge Current
–40°C to 85°C. The TL384xB-series devices are
• Current Mode Operation to 500kHz
characterized for operation from 0°C to 70°C.
• Automatic Feed-Forward Compensation
• Latching PWM for Cycle-by-Cycle Current Limiting Package Information
• Internally Trimmed Reference With Undervoltage PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
Lockout D (SOIC, 8) 4.90mm × 6.00mm
• High-Current Totem-Pole Output Undervoltage
TLx84x D (SOIC, 14) 8.65mm × 6.00mm
Lockout With Hysteresis
P (PDIP, 8) 9.81mm × 9.43mm
• Double-Pulse Suppression
(1) For all available packages, see the orderable addendum at
2 Applications the end of the data sheet.
(2) The package size (length × width) is a nominal value and
• Switching regulators of any polarity includes pins, where applicable.
• Transformer-coupled DC/DC convertors
D (SOIC) OR P (PDIP) PACKAGE
3 Description (TOP VIEW)
COMP 1 8 VREF
The TL284xB and TL384xB series of control VFB 2 7 VCC
integrated circuits provide the features that are ISENSE 3 6 OUTPUT
RT/CT 4 5 GND
necessary to implement off-line or dc-to-dc fixed-
frequency current-mode control schemes, with a D (SOIC) PACKAGE
minimum number of external components. Internally (TOP VIEW)
implemented circuits include an undervoltage lockout COMP 1 14 VREF

(UVLO) and a precision reference that is trimmed for NC 2 13 NC
VFB 3 12 VCC
accuracy at the error amplifier input. Other internal NC 4 11 VC
circuits include logic to ensure latched operation, a ISENSE 5 10 OUTPUT
pulse-width modulation (PWM) comparator that also NC 6
7
9
8
GND
RT/CT POWER GROUND
provides current-limit control, and a totem-pole output
stage designed to source or sink high-peak current. NC − No internal connection
The output stage, suitable for driving N-channel

MOSFETs, is low when the output stage is in the off
state.
The TL284xB and TL384xB series are pin compatible
with the standard TL284x and TL384x with the
following improvements. The start-up current is
specified to be 0.5mA (max), while the oscillator
discharge current is trimmed to 8.3mA (typ). In
addition, during undervoltage lockout conditions, the
output has a maximum saturation voltage of 1.2V
while sinking 10mA (VCC = 5V).
Major differences between members of these series
are the UVLO thresholds and maximum duty-cycle
ranges. Typical UVLO thresholds of 16V (on) and
10V (off) on the TLx842B and TLx844B devices
make them ideally suited to off-line applications. The
corresponding typical thresholds for the TLx843B and
TLx845B devices are 8.4V (on) and 7.6V (off). The
TLx842B and TLx843B devices can operate to duty
cycles approaching 100%. A duty-cycle range of 0%
to 50% is obtained by the TLx844B and TLx845B by
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TL284xB, TL384xB
SLVS610C – AUGUST 2006 – REVISED OCTOBER 2024 www.ti.com
Table of Contents
1 Features............................................................................1 5.12 Supply Voltage Electrical Characteristics..................7
2 Applications..................................................................... 1 5.13 Typical Characteristics.............................................. 8
3 Description.......................................................................1 6 Detailed Description......................................................13
4 Pin Configuration and Functions...................................3 6.1 Functional Block Diagram......................................... 13
5 Specifications.................................................................. 4 7 Application and Implementation.................................. 14
5.1 Absolute Maximum Ratings........................................ 4 7.1 Application Information............................................. 14
5.2 ESD Ratings............................................................... 4 7.2 Shutdown Technique.................................................15
5.3 Recommended Operating Conditions.........................4 7.3 Open-Loop Laboratory Test Fixture.......................... 16
5.4 Thermal Information....................................................5 7.4 Typical Application.................................................... 16
5.5 Reference Section Electrical Characteristics.............. 5 8 Device and Documentation Support............................16
5.6 Oscillator Section Electrical Characteristics................5 8.1 Related Links............................................................ 16
5.7 Error-Amplifier Section Electrical Characteristics....... 6 8.2 Trademarks............................................................... 17
5.8 Current-Sense Section Electrical Characteristics....... 6 8.3 Electrostatic Discharge Caution................................17
5.9 Output Section Electrical Characteristics....................7 8.4 Glossary....................................................................17
5.10 Undervoltage-Lockout Section Electrical 9 Revision History............................................................ 17
Characteristics...............................................................7 10 Mechanical, Packaging, and Orderable
5.11 Pulse-Width Modulator Section Electrical Information.................................................................... 17
Characteristics...............................................................7
2 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TL284xB TL384xB

TL284xB, TL384xB
www.ti.com SLVS610C – AUGUST 2006 – REVISED OCTOBER 2024
4 Pin Configuration and Functions

D (SOIC) OR P (PDIP) PACKAGE
(TOP VIEW)
COMP 1 8 VREF
VFB 2 7 VCC
ISENSE 3 6 OUTPUT
RT/CT 4 5 GND
D (SOIC) PACKAGE
(TOP VIEW)
COMP 1 14 VREF
NC 2 13 NC
VFB 3 12 VCC
NC 4 11 VC
ISENSE 5 10 OUTPUT
NC 6 9 GND
RT/CT 7 8 POWER GROUND
NC − No internal connection
PIN
Type(1) DESCRIPTION
NAME D (14 pins) D or P (8 pins)
COMP 1 1 I/O Error amplifier compensation pin
GND 9 5 - Device power supply ground terminal
ISENSE 5 3 I Current sense comparator input
NC 2, 4, 6, 13 - - Do not connect
OUTPUT 10 6 O PWM Output
POWER
8 - - Output PWM ground terminal
GROUND
REF 14 8 O Oscillator voltage reference
RT/CT 7 4 I/O Oscillator RC input
VC 11 - - Output PWM positive voltage supply
VCC 12 7 - Device positive voltage supply
VFB 3 2 I Error amplifier input
(1) I = Input; O = Output; I/O = Input or Output
Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 3

TL284xB, TL384xB
5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
Low impedance source 30
VCC Supply voltage Self V
ICC < 30 mA
limiting
VI Analog input voltage range VFB and ISENSE –0.3 6.3 V
ICC Supply current 30 mA
IO Output current ±1 A
IO(sink) Error amplifier output sink current 10 mA
Output energy Capacitive load 5 μJ
TJ Virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) All voltages are with respect to the device GND terminal.
5.2 ESD Ratings
VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all ±3000
pins(1)
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification ±2000
JESD22-C101, all pins(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
MIN NOM MAX UNIT
VCC 30
VCC Supply voltage V
VC(1) 30
RT/CT 0 5.5
VI Input voltage V
VFB and ISENSE 0 5.5
OUTPUT 0 30
VO Output voltage V
POWER GROUND(1) –0.1 1
ICC Supply current, externally limited 25 mA
IO Average output current 200 mA
IO(ref) Reference output current –20 mA
fosc Oscillator frequency 100 500 kHz
TL284xB –40 85
TJ Operating free-air temperature °C
TL384xB 0 70
(1) The recommended voltages for VC and POWER GROUND apply only to the 14-pin D package.

TL284xB, TL384xB
5.4 Thermal Information

TLx84xB
THERMAL METRIC(1) D P D UNIT
8 PINS 8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 117.4 74.1 87.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
note.
5.5 Reference Section Electrical Characteristics
VCC = 15 V(1), RT = 10 kΩ, CT = 3.3 nF, over recommended operating free-air temperature range (unless otherwise specified)
TL284xB TL384xB
PARAMETER TEST CONDITIONS UNIT
MIN TYP(2) MAX MIN TYP(2) MAX
Output voltage IO = 1 mA, TJ = 25°C 4.95 5 5.05 4.9 5 5.1 V
Line regulation VCC = 12 V to 25 V 6 20 6 20 mV
Load regulation IO = 1 mA to 20 mA 6 25 6 25 mV
Average temperature
0.2 0.4 0.2 0.4 mV/°C
coefficient of output voltage
Output voltage, worst-case VCC = 12 V to 25 V,
4.9 5.1 4.82 5.18 V
variation IO = 1 mA to 20 mA
Output noise voltage f = 10 Hz to 10 kHz, TJ = 25°C 50 50 μV
Output-voltage long-term drift After 1000 h at TJ = 25°C 5 25 5 25 mV
Short-circuit output current –30 –100 –180 –30 –100 –180 mA
(1) Adjust VCC above the start threshold before setting VCC to 15 V.
(2) All typical values are at TJ = 25°C.
5.6 Oscillator Section Electrical Characteristics
(3)
TL284xB TL384xB
TJ = 25°C 47 52 57 47 52 57
TA = Tlow to Thigh 44 60 44 60
Initial accuracy kHz
TJ = 25°C, RT = 6.2 kΩ,
225 250 275 225 250 275
CT = 1 nF
Voltage stability VCC = 12 V to 25 V 0.2 1 0.2 1 %
Temperature stability 5 5 %
Amplitude Peak to peak 1.7 1.7 V
TJ = 25°C, RT/CT = 2 V 7.8 8.3 8.8 7.8 8.3 8.8
Discharge current mA
RT/CT = 2 V 7.5 8.8 7.6 8.8
(1) Adjust VCC above the start threshold before setting it to 15 V.

(3) Output frequency equals oscillator frequency for the TL3842B and TL3843B. Output frequency is one-half the oscillator frequency for
the TL3844B and TL3845B.

TL284xB, TL384xB
5.7 Error-Amplifier Section Electrical Characteristics

TL284xB TL384xB
Feedback input voltage COMP = 2.5 V 2.45 2.5 2.55 2.42 2.5 2.58 V
Input bias current –0.3 –1 –0.3 –2 μA
Open-loop voltage
VO = 2 V to 4 V 65 90 65 90 dB
amplification
Gain-bandwidth product 0.7 1 0.7 1 MHz
Supply-voltage rejection ratio VCC = 12 V to 25 V 60 70 60 70 dB
Output sink current VFB = 2.7 V, COMP = 1.1 V 2 6 2 6 mA
Output source current VFB = 2.3 V, COMP = 5 V –0.5 –0.8 –0.5 –0.8 mA
VFB = 2.3 V,
High-level output voltage 5 6 5 6 V
RL = 15 kΩ to GND
VFB = 2.7 V,
Low-level output voltage 0.7 1.1 0.7 1.1 V
RL = 15 kΩ to GND

5.8 Current-Sense Section Electrical Characteristics
TL284xB TL384xB
Voltage amplification(2) (3) 2.85 3 3.15 2.85 3 3.15 V/V
Current-sense comparator
COMP = 5 V 0.9 1 1.1 0.9 1 1.1 V
threshold(2)
Supply-voltage rejection
VCC = 12 V to 25 V 70 70 dB
ratio(2)
Input bias current –2 –10 –2 –10 μA
Delay time to output VFB = 0 V to 2 V 150 300 150 300 ns

(2) Measured at the trip point of the latch, with VFB at 0 V.
(3) Measured between ISENSE and COMP, with the input changing from 0 V to 0.8 V.

TL284xB, TL384xB
5.9 Output Section Electrical Characteristics

TL284xB TL384xB
IOH = –20 mA 13 13.5 13 13.5
High-level output voltage V
IOH = –200 mA 12 13.5 12 13.5
IOL = 20 mA 0.1 0.4 0.1 0.4
Low-level output voltage V
IOL = 200 mA 1.5 2.2 1.5 2.2
Rise time CL = 1 nF, TJ = 25°C 25 150 25 150 ns
Fall time CL = 1 nF, TJ = 25°C 25 150 25 150 ns
UVLO saturation VCC = 5 V, IOL = 1 mA 0.7 1.2 0.7 1.2 V

5.10 Undervoltage-Lockout Section Electrical Characteristics
TL284xB TL384xB
TLx842B, TLx844B 15 16 17 14.5 16 17.5
Start threshold voltage V
TLx843B, TLx845B 7.8 8.4 9 7.8 8.4 9
Minimum operating voltage TLx842B, TLx844B 9 10 11 8.5 10 11.5

V
after start-up TLx843B, TLx845B 7 7.6 8.2 7 7.6 8.2

5.11 Pulse-Width Modulator Section Electrical Characteristics
TL284xB TL384xB
TLx842B, TLx843B 92 96 100 92 96 100
Maximum duty cycle %
TLx844B, TLx845B 46 48 50 46 48 50
Minimum duty cycle 0 0 %

5.12 Supply Voltage Electrical Characteristics
TL284xB TL384xB
Start-up current 0.3 0.5 0.3 0.5 mA
Operating supply current VFB and ISENSE at 0 V 11 17 11 17 mA
Limiting voltage ICC = 25 mA 30 39 30 39 V


TL284xB, TL384xB
5.13 Typical Characteristics

30
25
ICC– Supply Current – mA

20
15
10
TL2842
TL2845
5
0
0 5 10 15 20 25 30 35 40 45
VCC– Supply Voltage – V
Figure 5-1. Supply Current vs Supply Voltage
100 200
AVOL – Open-Loop Voltage Gain – dB
80 150
Phase Margin – deg

60 Phase 100
40 50
20 0
Gain
VCC = 15 V
0 RL = 100 kX
kΩ -50
TA = 25°C
-20 -100
1 . E +0 1 1 . E +0 2 1 . E +0 3 1 . E +0 4 1 . E +0 5 1 . E +0 6 1 . E +0 7
10 100 1k 10k 100k 1M 10M
f – Frequency – Hz
Figure 5-2. Error Amplifier Open-Loop Gain And Phase vs Frequency

TL284xB, TL384xB
1.2
VIN = 15 V
Vth – Current-Sense Input Threshold – V

1
0.8
TA = 125°C
0.6
TA = 25°C
0.4
TA = -55°C
0.2
0
0 1 2 3 4 5 6 7 8
VO – Error Amplifier Output Voltage – V
Figure 5-3. Current-Sense Input Threshold vs Error Amplifier Output Voltage

9.2
9
8.8
8.6
IDISCHARGE(mA)
8.4
8.2
8
7.8
7.6
7.4
-75 -50 -25 0 25 50 75 100 125 150
Temperature (C)
Figure 5-4. Oscillator Discharge Current vs Temperature

TL284xB, TL384xB
-10
Reference Voltage Delta – mV

-20
TA = -40°C
-30
TA = 125°C
-40
TA = 25°C
-50
-60
0 20 40 60 80 100 120 140 160
Isrc – Source Current – mA
Figure 5-5. Reference Voltage vs Source Current
5.2
5.15
Vref – Reference Voltage – V
5.1
5.05
4.95
4.9
4.85
4.8
-55 -30 -5 20 45 70 95 120 145
TA – Temperature – °C
Figure 5-6. Reference Voltage vs Temperature

TL284xB, TL384xB
180
VIN = 15 V
160
ISC – Short-Circuit Current – mA

140
120
100
80
60
40
-55 -30 -5 20 45 70 95 120 145
TA – Temperature – °C
Figure 5-7. Reference Short-Circuit Current vs Temperature
10 0
Source Saturation
9 TA = 25°C -1
8 -2
TA = -55°C
Sink Saturation Voltage – V
7 -3
6 -4
5 -5
4 -6
Sink Saturation
3 -7
TA = -55°C
2 -8
1 TA = 25°C -9
0 -10
0 100 200 300 400 500 600 700 800
IO – Output Load Current – mA
Figure 5-8. Output Saturation Voltage vs Load Current

TL284xB, TL384xB
100
DMAX, Maximum Output Duty Cycle (%)

90
80
70
60
50
40
30
20
10
0.1 0.2 0.3 0.5 1 2 3 5 10
RT, Timing Resistor (kΩ)
Figure 5-9. Maximum Output Duty Cycle vs Timing Resistor

TL284xB, TL384xB
6 Detailed Description
6.1 Functional Block Diagram
7
VCC
34 V NOM UVLO
5-V VREF
8
5 − + EN VREF
GND
Internal
Bias
2.5 V
VREF
Good
Logic
4 6
RT/CT OSC OUTPUT
Error
Amplifier S
+ 2R
2 PWM
VFB − R
Latch
R 1V
1 Current-
COMP
Sense
3 Comparator
ISENSE

TL284xB, TL384xB
7 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
7.1 Application Information

The error-amplifier configuration circuit is shown in Figure 7-1.
2.5 V
Error 0.5 mA
Amplifier
VFB +
Zi −
COMP
Zf
A. Error amplifier can source or sink up to 0.5 mA.
Figure 7-1. Error-Amplifier Configuration
The current-sense circuit is shown in Figure 7-2.

Error
IS Amplifier
(see Note A) 2R
+
−
R 1V
Current-Sense
COMP Comparator
Rf ISENSE
RS Cf
GND
A. Peak current (IS) is determined by the formula: IS(max) = 1 V/RS

B. A small RC filter formed by resistor Rf and capacitor Cf may be required to suppress switch transients.
Figure 7-2. Current-Sense Circuit
The oscillator frequency is set using the circuit shown in Figure 7-3. The frequency is calculated as:
f = 1 / RTCT
For RT > 5 kΩ:
f ≉ 1.72 / RTCT

TL284xB, TL384xB
VREF
RT
RT/CT
CT
GND
Figure 7-3. Oscillator Section
7.2 Shutdown Technique

The PWM controller (see Figure 7-4) can be shut down by two methods: either raise the voltage at ISENSE above
1 V or pull the COMP terminal below a voltage two diode drops above ground. Either method causes the output
of the PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output
remains low until the next clock cycle after the shutdown condition at the COMP or ISENSE terminal is removed.
In one example, an externally latched shutdown can be accomplished by adding an SCR that resets by cycling
VCC below the lower UVLO threshold. At this point, the reference turns off, allowing the SCR to reset.
1 kΩ
VREF
COMP
Shutdown
330 Ω ISENSE
Shutdown 500 Ω
To Current-Sense
Resistor
Figure 7-4. Shutdown Techniques
A fraction of the oscillator ramp can be summed resistively with the current-sense signal to provide slope
compensation for converters requiring duty cycles over 50% (see Figure 7-5). Note that capacitor C forms a filter
with R2 to suppress the leading-edge switch spikes.
VREF
0.1 µF RT
RT/CT
CT
R1 ISENSE
R2
ISENSE
C
RSENSE
Figure 7-5. Slope Compensation

TL284xB, TL384xB
7.3 Open-Loop Laboratory Test Fixture

In the open-loop laboratory test fixture (see Figure 7-6), high peak currents associated with loads necessitate
careful grounding techniques. Timing and bypass capacitors should be connected close to the GND terminal
in a single-point ground. The transistor and 5-kΩ potentiometer sample the oscillator waveform and apply an
adjustable ramp to the ISENSE terminal.
REF
RT
4.7 kΩ A VCC
2N2222
100 kΩ VREF
COMP
0.1 µF
TL284xB
1-kΩ VFB VCC
TL384xB
Error Amplifier Adjust
0.1 µF 1 kΩ, 1 W
5 kΩ ISENSE OUTPUT OUTPUT
4.7 kΩ
ISENSE RT/CT
Adjust GND
GND
CT
Figure 7-6. Open-Loop Laboratory Test Fixture
7.4 Typical Application

7.4.1 Application Curves
100 100
VCC= 15 V
50
RT≥ 5 kΩ
50
30 TA= 25oC
20
30
RT,Timing Resistance(kΩ)
10 20
Dead Time(μs)
nF
C T = .2 nF
nF
nF
nF
nF
5
C T = nF
100
4.7
10
22
47
10 1
2
3 =
CT =
CT =
CT =
CT =
CT
2
5
1
0.5 3
0.3 2
0.2 VCC= 15 V
TA= 25oC
0.1 1
1 2 3 5 10 20 30 50 100 0.1 0.3 1 3 10 30 100 300 1000
CT,Timing Capacitance(nF) f,Frequency(kHz)
8 Device and Documentation Support

8.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 8-1. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TL284xB Click here Click here Click here Click here Click here

TL284xB, TL384xB
Table 8-1. Related Links (continued)

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TL384xB Click here Click here Click here Click here Click here
8.2 Trademarks
All trademarks are the property of their respective owners.
8.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
8.4 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
9 Revision History
Changes from Revision B (July, 2007) to Revision C (October, 2024) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document................. 1
• Changed ESD ratings, CDM rating from ±3000V to ±2000V.............................................................................. 4
• Changed thermal information for D-8, D-14, and P-8 packages........................................................................ 5
• Changed Electrical Char. table, TOTAL STANDBY CURRENT, VCC Zener voltage, typical value from 34V to
39V..................................................................................................................................................................... 5
• Changed in Electrical Char. table, Oscillator Section: at Tj=25C, min. value from 49kHz to 47kHz, max. value
from 55kHz to 57kHz.......................................................................................................................................... 5
• Changed in Electrical Char. table, Oscillator Section: at TA=Tlow to Thigh, min. value from 48kHz to 44kHz,
max. value from 56kHz to 60kHz........................................................................................................................5
• Changed in Electrical Char. table, OUTPUT Section: Rise and fall time, typical value from 50ns to 25ns........ 7
• Changed in Electrical Char. table, PWM: maximum duty cycle of TLx842/3B, minimum value from 94% to
92%.....................................................................................................................................................................7
• Changed in Electrical Char. table, PWM: maximum duty cycle of TLx844/5B, minimum value from 47% to
46%.....................................................................................................................................................................7
• Changed Part numbers edited............................................................................................................................7
• Updated the Typical Characteristics graphs for Idischarge and Ta, IVCC-Vcc, and Dmax and Rt............................. 8
• Updated Application Curves for tdeadtime-Ct and Rt-f.................................................................................... 16
10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 27-Sep-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TL2842BD OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 85 TL2842B

TL2842BD-8 OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 85 2842B
TL2842BDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TL2842B Samples
TL2842BDR-8 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 2842B Samples
TL2842BP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL2842BP Samples

TL2843BDRG4-8 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 2843B Samples
TL2843BP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 TL2843BP Samples

TL2844BDR ACTIVE SOIC D 14 2500 RoHS & Green Call TI | NIPDAU Level-1-260C-UNLIM -40 to 85 TL2844B Samples

TL3842BD OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 TL3842B

TL3842BD-8 OBSOLETE SOIC D 8 TBD Call TI Call TI 0 to 70 3842B
TL3842BDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL3842B Samples
Addendum-Page 1
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TL3842BDR-8 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 3842B Samples
TL3842BP OBSOLETE PDIP P 8 TBD Call TI Call TI 0 to 70 TL3842BP

TL3843BDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 TL3843B Samples
TL3843BP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 TL3843BP Samples

TL3844BDR ACTIVE SOIC D 14 2500 RoHS & Green Call TI | NIPDAU Level-1-260C-UNLIM 0 to 70 TL3844B Samples

TL3845BDR OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 TL3845B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 2
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL2843B :
• Automotive : TL2843B-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL2842BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL2842BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL2843BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL2843BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL2844BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL2844BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL2845BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL2845BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3842BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL3842BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3843BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL3843BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3844BDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TL3844BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL3845BDR-8 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
Pack Materials-Page 1
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL2842BDR SOIC D 14 2500 356.0 356.0 35.0
TL2842BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL2843BDR SOIC D 14 2500 356.0 356.0 35.0
TL2843BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL2844BDR SOIC D 14 2500 356.0 356.0 35.0
TL2844BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL2845BDR SOIC D 14 2500 356.0 356.0 35.0
TL2845BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL3842BDR SOIC D 14 2500 356.0 356.0 35.0
TL3842BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL3843BDR SOIC D 14 2500 356.0 356.0 35.0
TL3843BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL3844BDR SOIC D 14 2500 356.0 356.0 35.0
TL3844BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TL3845BDR-8 SOIC D 8 2500 353.0 353.0 32.0
TUBE
T - Tube
height L - Tube length
W - Tube
width
B - Alignment groove width

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TL2842BP P PDIP 8 50 506 13.97 11230 4.32
TL2843BP P PDIP 8 50 506 13.97 11230 4.32
TL2844BDR D SOIC 14 2500 507 8 3940 4.32
TL3843BP P PDIP 8 50 506 13.97 11230 4.32
TL3844BDR D SOIC 14 2500 507 8 3940 4.32
TL3844BP P PDIP 8 50 506 13.97 11230 4.32
TL3845BP P PDIP 8 50 506 13.97 11230 4.32
PACKAGE OUTLINE
D0014A SCALE 1.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
C
6.2
TYP SEATING PLANE
5.8
A PIN 1 ID 0.1 C
AREA
12X 1.27
14
1
8.75 2X
8.55 7.62
NOTE 3
7
8
0.51
14X
4.0 0.31
B 1.75 MAX
3.8 0.25 C A B
NOTE 4
0.25
TYP
0.13
SEE DETAIL A
0.25
GAGE PLANE
0.25
0 -8 1.27 0.10
0.40
DETAIL A
TYPICAL
4220718/A 09/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm, per side.
5. Reference JEDEC registration MS-012, variation AB.
www.ti.com
EXAMPLE BOARD LAYOUT
D0014A SOIC - 1.75 mm max height
14X (1.55) SYMM

1
14
14X (0.6)
12X (1.27)
SYMM
7 8
(R0.05)
TYP
(5.4)
LAND PATTERN EXAMPLE

SCALE:8X
SOLDER MASK METAL UNDER SOLDER MASK

METAL OPENING
OPENING SOLDER MASK
0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS
4220718/A 09/2016
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
14X (1.55) SYMM
1
14
14X (0.6)
12X (1.27)
SYMM
7 8
(5.4)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:8X
4220718/A 09/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1
.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]
4X (0 -15 )
4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK
EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55] SYMM
1
8
8X (.024)
[0.6] SYMM
(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
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Copyright © 2024, Texas Instruments Incorporated

Tlx84Xb High-Performance Current-Mode PWM Controllers: 1 Features

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TL284xB, TL384xB

SLVS610C – AUGUST 2006 – REVISED OCTOBER 2024

TLx84xB High-Performance Current-Mode Pwm Controllers

3 Description (TOP VIEW)

implemented circuits include an undervoltage lockout COMP 1 14 VREF

The output stage, suitable for driving N-channel

2 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

4 Pin Configuration and Functions

(1) I = Input; O = Output; I/O = Input or Output

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 3

4 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

5.4 Thermal Information

(1) Adjust VCC above the start threshold before setting it to 15 V.

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5

5.7 Error-Amplifier Section Electrical Characteristics

(1) Adjust VCC above the start threshold before setting it to 15 V.

(1) All typical values are at TJ = 25°C.

6 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

5.9 Output Section Electrical Characteristics

(1) All typical values are at TJ = 25°C.

Minimum operating voltage TLx842B, TLx844B 9 10 11 8.5 10 11.5

(1) All typical values are at TJ = 25°C.

(1) All typical values are at TJ = 25°C.

(1) All typical values are at TJ = 25°C.

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 7

5.13 Typical Characteristics

ICC– Supply Current – mA

Figure 5-1. Supply Current vs Supply Voltage

Phase Margin – deg

Figure 5-2. Error Amplifier Open-Loop Gain And Phase vs Frequency

8 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

Vth – Current-Sense Input Threshold – V

VO – Error Amplifier Output Voltage – V

Figure 5-3. Current-Sense Input Threshold vs Error Amplifier Output Voltage

Figure 5-4. Oscillator Discharge Current vs Temperature

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 9

Reference Voltage Delta – mV

Isrc – Source Current – mA

Figure 5-5. Reference Voltage vs Source Current

Figure 5-6. Reference Voltage vs Temperature

10 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

ISC – Short-Circuit Current – mA

Figure 5-7. Reference Short-Circuit Current vs Temperature

IO – Output Load Current – mA

Figure 5-8. Output Saturation Voltage vs Load Current

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11

DMAX, Maximum Output Duty Cycle (%)

Figure 5-9. Maximum Output Duty Cycle vs Timing Resistor

12 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TL284xB TL384xB

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 13

7 Application and Implementation

7.1 Application Information

A. Error amplifier can source or sink up to 0.5 mA.