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Gas Gauge IC With Alarm Output: Applications

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GG25L

Gas gauge IC with alarm output

Datasheet - production data

Applications
 Wearable
 Fitness and healthcare
 Portable medical equipment

Description
The GG25L includes the hardware functions
required to implement a low-cost gas gauge for
battery monitoring. The GG25L uses current
CSP (1.4 x 2.0 mm)
sensing, Coulomb counting and accurate
measurements of the battery voltage to estimate
the state-of-charge (SOC) of the battery. An
Features internal temperature sensor simplifies
implementation of temperature compensation.
 OptimGaugeTM algorithm
An alarm output signals a low SOC condition and
 0.25% accuracy battery voltage monitoring can also indicate low battery voltage. The alarm
 Coulomb counter and voltage-mode gas gauge threshold levels are programmable.
operations The GG25L offers advanced features to ensure
 Robust initial open-circuit-voltage (OCV) high performance gas gauging in all application
measurement at power up with debounce conditions.
delay
 Low battery level alarm output with
programmable thresholds
 Internal temperature sensor
 Battery swap detection
 Low power: 45 µA in power-saving mode, 2 µA
max in standby mode
 1.4 x 2.0 mm 10-bump CSP package

Table 1. Device summary


Order code Temperature range Package Packing Marking

GG25LJ (1) O22


-40 °C to +85 °C CSP-12 Tape and reel
GG25LAJ (2) O23
1. 4.35 V battery option
2. 4.20 V battery option

February 2014 DocID025995 Rev 1 1/28


This is information on a product in full production. www.st.com
Contents GG25L

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1 Battery monitoring functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1.2 Battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1.3 Internal temperature monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1.4 Current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.2 GG25L gas gauge architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2.1 Coulomb counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2.2 Voltage gas gauge algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.2.3 Mixed mode gas gauge system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.3 Low battery alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.4 Power-up and battery swap detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.5 Improving accuracy of the initial OCV measurement with 
the advanced functions of BATD/CD and RSTIO pins . . . . . . . . . . . . . . . 17
6.5.1 BATD and RSTIO pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7 I²C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.1 Read and write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.1 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2.2 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2/28 DocID025995 Rev 1


GG25L Block diagram

1 Block diagram

Figure 1. GG25L internal block diagram

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DocID025995 Rev 1 3/28


28
Pin assignment GG25L

2 Pin assignment

Table 2. GG25L pin description


Pin CSP
Pin name Type(1) Function
n° bump

Alarm signal output, open drain, 


1 A1 ALM I/OD
external pull-up with resistor
2 B1 SDA I/OD I²C serial data
3 C1 SCL I_D I²C serial clock
4 D1 GND Ground Analog and digital ground
5 D2 NC - NC
6 D3 CG I_A Current sensing input
7 C3 RSTIO I/OD Reset sense input & reset control output (open drain)
Battery charge inhibit (active high output)
8 B2 BATD/CD I/OA
Battery detection (input)
9 B3 VCC Supply Power supply
10 A3 VIN I_A Battery voltage sensing input
1. I = input, 0 = output, OD = open drain, A = analog, D = digital, NC = not connected

3 Absolute maximum ratings and operating conditions

Table 3. Absolute maximum ratings


Symbol Parameter Value Unit

VCCMAX Maximum voltage on VCC pin 6


V
VIO Voltage on I/O pins -0.3 to 6
TSTG Storage temperature -55 to 150
°C
TJ Maximum junction temperature 150
ESD Electrostatic discharge (HBM: human body model) 2 kV

Table 4. Operating conditions


Symbol Parameter Value Unit

VCC Operating supply voltage on VCC 2.7 to 4.5


V
VMIN Minimum voltage on VCC for RAM content retention 2.0
TOPER -40 to 85
Operating free air temperature range °C
TPERF -20 to 70

4/28 DocID025995 Rev 1


GG25L Electrical characteristics

4 Electrical characteristics

Table 5. Electrical characteristics (2.7 V < VCC < 4.5 V, -20C to 70C)
Symbol Parameter Conditions Min Typ Max Units

Supply
Average value over 4 s in
power-saving voltage 45 60
ICC Operating current consumption mode
Average value over 4 s in
100
mixed mode µA
Standby mode, 
ISTBY Current consumption in standby 2
inputs = 0 V
VCC < UVLOTH, 
IPDN Current consumption in power-down 1
inputs = 0 V
UVLOTH Undervoltage threshold (VCC decreasing) 2.5 2.6 2.7 V
UVLOHYST Undervoltage threshold hysteresis 100 mV
POR Power-on reset threshold (VCC decreasing) 2.0 V
Current sensing
Vin_gg Input voltage range -40 +40 mV
IIN Input current for CG pin 500 nA
ADC_res AD converter granularity 5.88 µV
ADC_offset AD converter offset CG = 0 V -3 3 LSB
ADC_time AD conversion time 500 ms

AD converter gain accuracy at full 25 °C 0.5


ADC_acc %
scale (using external sense resistor) Over temperature range 1
FOSC Internal time base frequency 32768 Hz
25 °C, VCC = 3.6 V 2
Osc_acc Internal time base accuracy Over temperature and %
2.5
voltage ranges
Cur_res Current register LSB value 5.88 µV

DocID025995 Rev 1 5/28


28
Electrical characteristics GG25L

Table 5. Electrical characteristics (2.7 V < VCC < 4.5 V, -20C to 70C) (continued)
Symbol Parameter Conditions Min Typ Max Units

Battery voltage and temperature measurement


Vin_adc Input voltage range VCC = 4.5 V 0 4.5 V
Voltage measurement 2.20 mV
LSB LSB value
Temperature measurement 1 °C
ADC_time AD conversion time 250 ms
2.7 V < Vin < 4.5 V, 
-0.25 +0.25
Volt_acc Battery voltage measurement accuracy VCC = Vin 25 °C %
Over temperature range -0.5 +0.5
Temp_acc Internal temperature sensor accuracy -3 3 °C
Digital I/O pins (SCL, SDA, ALM, RSTIO)
Vih Input logic high 1.2
Vil Input logic low 0.35 V
Vol Output logic low (SDA, ALM, RSTIO) Iol = 4 mA 0.4
BATD/CD pin
Vith Input threshold voltage 1.46 1.61 1.76
Vihyst Input voltage hysteresis 0.1
V
Output logic high  Vbat-
Voh Ioh = 3 mA
(charge inhibit mode enable) 0.4

6/28 DocID025995 Rev 1


GG25L Electrical characteristics

Table 6. I²C timing - VIO= 2.8 V, Tamb = -20 °C to 70 C (unless otherwise specified)
Symbol Parameter Min Typ Max Unit

Fscl SCL clock frequency 0 400 kHz


thd,sta Hold time (repeated) START condition 0.6
tlow LOW period of the SCL clock 1.3
thigh HIGH period of the SCL clock 0.6 µs
tsu,dat Setup time for repeated START condition 0.6
thd,dat Data hold time 0 0.9
tsu,dat Data setup time 100 ns
-
20+
tr Rise time of both SDA and SCL signals 300 ns
0.1Cb
20+
tf Fall time of both SDA and SCL signals 300 ns
0.1Cb
tsu,sto Setup time for STOP condition 0.6 µs
Bus free time between a STOP and
tbuf 1.3 µs
START condition
Cb Capacitive load for each bus line 400 pF

Figure 2. I²C timing diagram

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DocID025995 Rev 1 7/28


28
Application information GG25L

5 Application information

Figure 3. Example of an application schematic using the GG25L in mixed mode

Optional filter
IO voltage
VCC
C1 R1
VIN Other
SCL GG25L C2 detection
circuit
SDA Battery pack
ALM BATD/CD
R2
Rid
RSTIO
CG
GND Rcg

Table 7. External component list


Name Value Tolerance Comments

Rcg 5 to 50 mΩ 1% to 5% Current sense resistor (2% or better recommended)


C1 1 µF Supply decoupling capacitor
C2 220 nF Battery voltage input filter (optional)
R1 1 kΩ Battery voltage input filter (optional)
R2 1 kΩ Battery detection function

Figure 4. Example of an application schematic using the GG25L without current


sensing

Optional filter
IO voltage
VCC
C1 R1
Other
VIN C2 detection
SCL GG25L circuit
SDA Battery pack
ALM BATD/CD
R2
Rid
RSTIO
CG
GND

8/28 DocID025995 Rev 1


GG25L Application information

Table 8. External component list


Name Value Comments

C1 1 µF Supply decoupling capacitor


C2 220 nF
Battery voltage input filter (optional)
R1 1 kΩ
R2 1 kΩ Battery detection function

DocID025995 Rev 1 9/28


28
Functional description GG25L

6 Functional description

6.1 Battery monitoring functions

6.1.1 Operating modes


The monitoring functions include the measurement of battery voltage, current, and
temperature. A Coulomb counter is available to track the SOC when the battery is charging
or discharging at a high rate. A sigma-delta A/D converter is used to measure the voltage,
current, and temperature.
The GG25L can operate in two different modes with different power consumption (see
Table 9. Mode selection is made by the VMODE bit in register 0 (refer to Table 14 for
register 0 definition).

Table 9. GG25L operating modes


VMODE Description

0 Mixed mode, Coulomb counter is active, voltage gas gauge runs in parallel
Voltage gas gauge with power saving
1
Coulomb counter is not used. No current sensing.

In mixed mode, current is measured continuously (except for a conversion cycle every 4 s
and every 16 s seconds for measuring voltage and temperature respectively). This provides
the highest accuracy from the gas gauge.
In voltage mode with no current sensing, a voltage conversion is made every 4 s and a
temperature conversion every 16 s. This mode provides the lowest power consumption.
It is possible to switch between the two operating modes to get the best accuracy during
active periods, and to save power during standby periods while still keeping track of the
SOC information.

6.1.2 Battery voltage monitoring


Battery voltage is measured by using one conversion cycle of the A/D converter every 4 s.
The conversion cycle takes 213 = 8192 clock cycles. Using the 32768 Hz internal clock, the
conversion cycle time is 250 ms.
The voltage range is 0 to 4.5 V and resolution is 2.20 mV. Accuracy of the voltage
measurement is ±0.5% over the temperature range. This allows accurate SOC information
from the battery open-circuit voltage.
The result is stored in the REG_VOLTAGE register (see Table 13).

10/28 DocID025995 Rev 1


GG25L Functional description

6.1.3 Internal temperature monitoring


The chip temperature (close to the battery temperature) is measured using one conversion
cycle of the A/D converter every 16 s.
The conversion cycle takes 213 = 8192 clock cycles. Using the 32768 Hz internal clock, the
conversion cycle time is 250 ms. Resolution is 1° C and range is -40 to +125 °C.
The result is stored in the REG_TEMPERATURE register (see Table 13).

6.1.4 Current sensing


Voltage drop across the sense resistor is integrated during a conversion period and input to
the 14-bit sigma-delta A/D converter.
Using the 32768 Hz internal clock, the conversion cycle time is 500 ms for a 14-bit
resolution. The LSB value is 5.88 µV. The A/D converter output is in two’s complement
format.
When a conversion cycle is completed, the result is added to the Coulomb counter
accumulator and the number of conversions is incremented in a 16-bit counter.
The current register is updated only after the conversion closest to the voltage conversion
(that is: once per 4-s measurement cycle). The result is stored in the REG_CURRENT
register (see Table 13).

DocID025995 Rev 1 11/28


28
Functional description GG25L

6.2 GG25L gas gauge architecture

6.2.1 Coulomb counter


The Coulomb counter is used to track the SOC of the battery when the battery is charging or
discharging at a high rate. Each current conversion result is accumulated (Coulomb
counting) for the calculation of the relative SOC value based on the configuration register.
The system controller can control the Coulomb counter and set and read the SOC register
through the I²C control registers.

Figure 5. Coulomb counter block diagram

16-bit counter REG_COUNTER


register

REG_CURRENT
register

EOC
CC SOC
CC SOC register (internal)
CG calculator
AD converter
GND

REG_CC_CNF
register

The REG_CC_CNF value depends on battery capacity and the current sense resistor. It
scales the charge integrated by the sigma delta converter into a percentage value of the
battery capacity. The default value is 395 (corresponding to a 10 mΩ sense resistor and
1957 mAh battery capacity).
The Coulomb counter is inactive if the VMODE bit is set, this is the default state at power-
on-reset (POR) or reset (VMODE bit = 1).
Writing a value to the register REG_SOC (mixed mode SOC) forces the Coulomb counter
gas gauge algorithm to restart from this new SOC value.
REG_CC_CNF register is a 16-bit integer value and is calculated as shown in Equation 1:

Equation 1

REG_CC_CNF = Rsense  Cnom  49.556

Rsense is in mΩ and Cnom is in mAh.


Example: Rsense =10 mΩ, Cnom = 1650 mAh, REG_CC_CNF = 333

12/28 DocID025995 Rev 1


GG25L Functional description

6.2.2 Voltage gas gauge algorithm


No current sensing is needed for the voltage gas gauge. An internal algorithm precisely
simulates the dynamic behavior of the battery and provides an estimation of the OCV. The
battery SOC is related to the OCV by means of a high-precision reference OCV curve built
into the GG25L.
Any change in battery voltage causes the algorithm to track both the OCV and SOC values,
taking into account the non-linear characteristics and time constants related to the chemical
nature of the Li-Ion and Li-Po batteries.
A single parameter fits the algorithm to a specific battery. The default value provides good
results for most battery chemistries used in hand-held applications.

Figure 6. Voltage gas gauge block diagram

Voltage register

VM configuration

VIN
AD OCV value
converter Voltage mode
(VM)
algorithm To SOC
management

Reference
OCV OCV adjustment registers
curve

Voltage gas gauge algorithm registers


The REG_VM_CNF configuration register is used to configure the parameter used by the
algorithm based on battery characteristic. The default value is 321.
The REG_OCV register holds the estimated OCV value corresponding to the present
battery state.
The REG_OCVTAB registers are used to adjust the internal OCV table to a given battery
type.
The REG_VM_CNF register is a 12-bit integer value and is calculated from the averaged
internal resistance and nominal capacity of the battery as shown in Equation 2:

Equation 2
REG_VM_CNF = Ri  Cnom  977.78

Ri is in mΩ and Cnom is in mAh.


Example: Ri = 190 mΩ, Cnom =1650 mAh, REG_VM_CNF = 321

DocID025995 Rev 1 13/28


28
Functional description GG25L

6.2.3 Mixed mode gas gauge system


The GG25L provides a mixed mode gas gauge using both a Coulomb counter (CC) and a
voltage-mode (VM) algorithm to track the SOC of the battery in all conditions with optimum
accuracy. The GG25L directly provides the SOC information.
The Coulomb counter is mainly used when the battery is charging or discharging at a high
rate. Each current conversion result is accumulated (Coulomb counting) for the calculation
of the relative SOC value based on a configuration register.
The voltage-mode algorithm is used when the application is in low power consumption state.
The GG25L automatically uses the best method in any given application condition.
However, when the application enters standby mode, the GG25L can be put in power-
saving mode: only the voltage-mode gas gauge stays active, the Coulomb counter is
stopped and power consumption is reduced.

Figure 7. Mixed mode gas gauge block diagram

Voltage mode
gas gauge
(VM) SOC REG_SOC
management register
Coulomb Alarm
counter management
(CC)
REG_VM_ADJ
register
Parameter
tracking REG_CC_ADJ
register

The combination of the CC and VM algorithms provides optimum accuracy under all
application conditions. The voltage gas gauge cancels any long-term errors and prevents
the SOC drift problem that is commonly found in Coulomb counter only solutions.
Furthermore, the results of the two algorithms are continuously compared and adjustment
factors are calculated. This enables the application to track the CC and VM algorithm
parameters for long-term accuracy, automatically compensating for battery aging,
application condition changes, and temperature effects. Five registers are dedicated to this
monitoring:
 REG_CC_ADJ and REG_VM_ADJ are continuously updated. They are signed, 16-bit,
user-adjusted registers with LSB = 1/512 %.
 ACC_CC_ADJ and ACC_VM_ADJ are updated only when a method switch occurs.
They are signed, 16-bit user adjusted accumulators with LSB = 1/512%
 RST_ACC_CC_ADJ and RST_ACC_VM_ADJ bits in the REG_MODE register are
used to clear the associated counter.

14/28 DocID025995 Rev 1


GG25L Functional description

6.3 Low battery alarm


The ALM pin provides an alarm signal in case of a low battery condition. The output is an
open drain and an external pull-up resistor is needed in the application. Writing the
IO0DATA bit to 0 forces the ALM output low; writing the IO0DATA bit to 1 lets the ALM
output reflect the battery condition. Reading the IO0DATA bit gives the state of the ALM pin.
When the IO0DATA bit is 1, the ALM pin is driven low if either of the following two conditions
is met:
 The battery SOC estimation from the mixed algorithm is less than the programmed
threshold (if the alarm function is enabled by the ALM_ENA bit).
 The battery voltage is less than the programmed low voltage level (if the ALM_ENA bit
is set).
When a low-voltage or low-SOC condition is triggered, the GG25L drives the ALM pin low
and sets the ALM_VOLT or ALM_SOC bit in REG_CTRL.
The ALM pin remains low (even if the conditions disappear) until the software writes the
ALM_VOLT and ALM_SOC bits to 0 to clear the interrupt.
Clearing the ALM_VOLT or ALM_SOC while the corresponding low-voltage or low-SOC
condition is still in progress does not generate another interrupt; this condition must
disappear first and must be detected again before another interrupt (ALM pin driven low) is
generated for this alarm. Another alarm condition, if not yet triggered, can still generate an
interrupt.
Usually, the low-SOC alarm occurs first to warn the application of a low battery condition,
then if no action is taken and the battery discharges further, the low-voltage alarm signals a
nearly-empty battery condition.
At power-up, or when the GG25L is reset, the SOC and voltage alarms are enabled
(ALM_ENA bit = 1). The ALM pin is high-impedance directly after POR and is driven low if
the SOC and/or the voltage is below the default thresholds (1% SOC, 3.00 V voltage), after
the first OCV measurement and SOC estimation.
The REG_SOC_ALM register holds the relative SOC alarm level in 0.5 % units (0 to 100 %).
Default value is 2 (i.e. 1% SOC).
The REG_ALARM_VOLTAGE holds the low voltage threshold and can be programmed over
the full scale voltage range with 17.60 (2.20 * 8) mV steps. The default value is 170 (3.00 V).

DocID025995 Rev 1 15/28


28
Functional description GG25L

6.4 Power-up and battery swap detection


When the GG25L is powered up at first battery insertion, an automatic battery voltage
measurement cycle is made immediately after startup and debounce delay.
This feature enables the system controller to get the SOC of a newly inserted battery based
on the OCV measured just before the system actually starts.

Figure 8. Timing diagram at power-up

A battery swap is detected when the battery voltage drops below the undervoltage lockout
(UVLO) for more than 1 s. The GG25L restarts when the voltage goes back above UVLO, in
the same way as for a power-up sequence.
Such filtering provides robust battery swap detection and prevents restarting in case of short
voltage drops. This feature protects the application against high surge currents at low
temperatures.

Figure 9. Restart in case of battery swap

<1s >1s

VCC UVLO
POR

Short UVLO
event < 1s Long battery disconnection
No restart, events > 1s
No operation GG25L restarts
interuption

GAMS2502141520SG

Example: When BATD/CD is high (voltage above the 1.61 V threshold) for more than 1 s, a
battery swap is detected. The GG25L restarts when the BATD/CD level returns below the
threshold, in the same way as for a power-up sequence.
Using the 1-s filter prevents false battery swap detection if short contact bouncing occurs at
the battery terminals due to mechanical vibrations or shocks.

16/28 DocID025995 Rev 1


GG25L Functional description

6.5 Improving accuracy of the initial OCV measurement with the


advanced functions of BATD/CD and RSTIO pins
The advanced functions of the BATD/CD and RSTIO pins provide a way to ensure that the
OCV measurement at power-up is not affected by the application startup or by the charger
operation. This occurs as follows:
 The BATD/CD pin is driven high to VCC voltage which inhibits the charge function
(assuming that the BATD/CD signal is connected to disable input of the charger circuit).
 The RSTIO pin senses the system reset state and if the system reset is active (that is
RSTIO is low), the RSTIO is kept low until the end of the OCV measurement.
Figure 10 describes the BATD/CD and RSTIO operation at power-up. Please refer to the
block diagram of Figure 11 for the RSTI, RSTO, BATD_comp_out, and BATD_drive_high
signals.
At the end of the OCV measurement, the BATD/CD and RSTIO pin are released (high
impedance), the application can start and the charger is enabled.

Figure 10. BATD and RSTIO timing diagram at power-up


SOC Application can start,
OCV
calc. charge is enabled
meas.
delay

VCC UVLO
POR

BATD_comp_out 1.61V

BATD_drive_high

RSTI

RST0

Voltage
measurement

Voltage
register

SOC register

6.5.1 BATD and RSTIO pins


The GG25L provides platform synchronization signals to provide reliable SOC information in
different cases.
The BATD/CD pin senses the presence of the battery independently of the battery voltage
and it controls the battery charger to inhibit the charge during the initial OCV measurement.
The RSTIO pin can be used to delay the platform startup during the first OCV measurement
at battery insertion.

DocID025995 Rev 1 17/28


28
Functional description GG25L

Figure 11. BATD and RSTIO


VCC

BATD_drive_high
BATD/CD
+
BATD_comp_out
1.61 V -

RSTIO RSTI
RSTO

The BATD/CD pin used as a battery detector is an analog I/O.The input detection threshold
is typically 1.61 V.
BATD/CD is also an output connected to VCC level when active. Otherwise, it is high
impedance.
The RSTIO signal is used to control the application system reset during the initial OCV
measurement. The RSTIO pin is a standard I/O pin with open drain output.
BATD/CD can be connected to the NTC sensor or to the identification resistor of the battery
pack. The GG25L does not provide any biasing voltage or current for the battery detection.
An external pull-up resistor or another device has to pull the BATD/CD pin high when the
battery is removed.

Figure 12. BATD/CD pin connection when used as battery detector

GG25L GG25L Other biasing


and/or detection
circuit
(>1 M)
Ru Battery
Battery pack pack
BATD/CD BATD/CD
1K 1K
Rid Rid

BATD resistor biasing BATD biasing by external circuitry

18/28 DocID025995 Rev 1


GG25L I²C interface

7 I²C interface

7.1 Read and write operations


The I²C interface is used to control and read the current accumulator and registers. It is
compatible with the Philips I²C Bus® (version 2.1). It is a slave serial interface with a serial
data line (SDA) and a serial clock line (SCL).
 SCL: input clock used to shift data
 SDA: input/output bidirectional data transfers
A filter rejects the potential spikes on the bus data line to preserve data integrity.
The bidirectional data line supports transfers up to 400 Kbit/s (fast mode). The data are
shifted to and from the chip on the SDA line, MSB first.
The first bit must be high (START) followed by the 7-bit device address and the read/write
control bit. Bits DevADDR0 to DevADDR2 are factory-programmable, the default device
address value being 1110 000 (AddrID0 = AddrID1 = AddrID2 = 0). The GG25L then sends
an acknowledge at the end of an 8-bit long sequence. The next eight bits correspond to the
register address followed by another acknowledge.
The data field is the last 8-bit long sequence sent, followed by a last acknowledge.

Table 10. Device address format


bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0

1 1 1 0 DevADDR2 DevADDR1 DevADDR0 R/W

Table 11. Register address format


bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0

RegADDR7 RegADDR6 RegADDR5 RegADDR4 RegADDR3 RegADDR2 RegADDR1 RegADDR0

Table 12. Register data format


bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0

DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0

DocID025995 Rev 1 19/28


28
I²C interface GG25L

Figure 13. Read operation

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20/28 DocID025995 Rev 1


GG25L I²C interface

7.2 Register map

7.2.1 Register map


The register space provides 28 control registers, 1 read-only register for device ID, 16
read/write RAM working registers reserved for the gas gauge algorithm, and 16 OCV
adjustment registers. Mapping of all registers is shown in Table 13. Detailed descriptions of
registers 0 (REG_MODE) and 1 (REG_CTRL) are shown in Table 14 and Table 15. All
registers are reset to default values at power-on or reset, and the PORDET bit in register
REG_CTRL is used to indicate the occurrence of a power-on reset.

Table 13. Register map


Address Soft
Name Type POR Description LSB
(decimal) POR

Control registers 0 to 23
REG_MODE 0 R/W Mode register
REG_CTRL 1 R/W Control and status register
REG_SOC 2-3 R/W Gas gauge relative SOC 1/512%
Number of conversions 
REG_COUNTER 4-5 R 0x00 0x00
(2 bytes)
Battery current value 
REG_CURRENT 6-7 R 0x00 0x00 5.88 µV
(2 bytes)
Battery voltage value 
REG_VOLTAGE 8-9 R 0x00 0x00 2.2 mV
(2 bytes)
REG_TEMPERATURE 10 R 0x00 0x00 Temperature data 1 °C
Coulomb counter adjustment
REG_CC_ADJ_HIGH 11 R/W 0x00 0x00
factor
1/2%
Voltage mode adjustment
REG_VM_ADJ_HIGH 12 R/W 0x00 0x00
factor
REG_OCV 13-14 R/W 0x00 0x00 OCV register (2 bytes) 0.55 mV
Coulomb counter gas gauge
REG_CC_CNF 15-16 R/W 395 395
configuration
Voltage gas gauge algorithm
REG_VM_CNF 17-18 R/W 321 321
parameter
SOC alarm level 
REG_ALARM_SOC 19 R/W 0x02 0x02 1/2%
(default = 1%)
Battery low voltage alarm
REG_ALARM_VOLTAGE 20 R/W 0xAA 0xAA 17.6 mV
level (default is 3 V)
Current threshold for the
REG_CURRENT_THRES 21 R/W 0x0A 0x0A 47.04 µV
relaxation counter
REG_RELAX_COUNT 22 R 0x78 0x78 Relaxation counter
Relaxation counter max
REG_RELAX_MAX 23 R/W 0x78 0x78
value
REG_ID 24 R 0x14 0x14 Part type ID = 14h

DocID025995 Rev 1 21/28


28
I²C interface GG25L

Table 13. Register map (continued)


Address Soft
Name Type POR Description LSB
(decimal) POR

Coulomb counter adjustment


REG_CC_ADJ_LOW 25 R/W 0x00 0x00
factor
Voltage mode adjustment
REG_VM_ADJ_LOW 26 R/W 0x00 0x00
factor
1/512%
Coulomb Counter correction
ACC_CC_ADJ 27-28 R/W 0x00 0x00
accumulator
Voltage mode correction
ACC_VM_ADJ 29-30 R/W 0x00 0x00
accumulator
RAM registers 32 to 47
Working register 0 for gas
REG_RAM0 32 R/W Random Unchanged
gauge
... ... ...
Working register 15 for gas
REG_RAM15 47 R/W Random Unchanged
gauge
OCV adjustment
registers
OCV adjustment table 
REG_OCVTAB 48 to 63 R/W 0x00 0x00 0.55 mV
(16 registers)

22/28 DocID025995 Rev 1


GG25L I²C interface

7.2.2 Register description


Values held in consecutive registers (such as the charge value in the REG_SOC register
pair) are stored with high bits in the first register and low bits in the second register. The
registers must be read with a single I²C access to ensure data integrity. It is possible to read
multiple values in one I²C access. All values must be consistent.
The SOC data are coded in binary format and the LSB of the low byte is 1/512 %. The
battery current is coded in 2’s complement format and the LSB value is 5.88 µV. The battery
voltage is coded in 2’s complement format and the LSB value is 2.20 mV. The temperature
is coded in 2’s complement format and the LSB value is 1°C.

Table 14. REG_MODE - address 0


Name Position Type Def. Description

0: Mixed mode (Coulomb counter active)


VMODE 0 R/W 1
1: Power saving voltage mode
Write 1 to clear ACC_VM_ADJ and
CLR_VM_ADJ 1 R/W 0 REG_VM_ADJ. 
Auto clear bit if GG_RUN = 1
Write 1 to clear ACC_CC_ADJ and REG_CC_ADJ
CLR_CC_ADJ 2 R/W 0
Auto clear bit if GG_RUN = 1
Alarm function
ALM_ENA 3 R/W 1 0: Disabled
1: Enabled
0: Standby mode. Accumulator and counter
registers are frozen, gas gauge and battery
GG_RUN 4 R/W 0
monitor functions are in standby.
1: Operating mode.
Forces the mixed mode relaxation timer to switch
to the Coulomb counter mode.
FORCE_CC 5 R/W 0
Write 1, self clear to 0
Relaxation counter = 0
Forces the mixed mode relaxation timer to switch
to voltage gas gauge mode.
FORCE_VM 6 R/W 0
Write 1, self clear to 0
Relaxation counter = Relax_max
7 Unused

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28
I²C interface GG25L

Table 15. REG_CTRL - address 1


Name Position Type Def. Description

ALM pin status


R X 0 = ALM input is low
1 = ALM input is high
IO0DATA 0
ALM pin output drive
W 1 0 = ALM is forced low
1 = ALM is driven by the alarm conditions
0: no effect
GG_RST 1 W 0 1: resets the conversion counter
GG_RST is a self-clearing bit.
Voltage mode active
GG_VM 2 R 0 0 = REG_SOC from Coulomb counter mode
1 = REG_SOC from Voltage mode
Battery removal or UVLO detection bit. 
BATFAIL 3 R/W 0 Write 0 to clear 
(Write 1 is ignored)
Power on reset (POR) detection bit
R 1 0 = no POR event occurred
1 = POR event occurred
Soft reset
PORDET 4 0 = release the soft-reset and clear the POR
detection bit,
W 0
1 = assert the soft-reset and set the POR detection
bit. 
This bit is self clearing.
Set with a low-SOC condition. 
ALM_SOC 5 R/W 0
Cleared by writing 0.
Set with a low-voltage condition. 
ALM_VOLT 6 R/W 0
Cleared by writing 0.
7 Unused

24/28 DocID025995 Rev 1


GG25L Package information

8 Package information

In order to meet environmental requirements, ST offers these devices in different grades of


ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

Figure 15. Flip Chip CSP 1.40 x 2.04 mm package mechanical drawing

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area” typically 0.1 mm in diameter and/or a missing bump.
2. The terminal A1, on the back side, is identified by a distinguishing feature - for instance, by a circular “clear

DocID025995 Rev 1 25/28


28
Package information GG25L

area” typically 0.2 mm in diameter depending on the die size.

Table 16. Flip Chip CSP 1.4 x 2.04 mm package mechanical data
Dimensions

Symbol Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A 0.545 0.600 0.655 0.021 0.024 0.026


A1 0.165 0.200 0.235 0.006 0.008 0.009
A2 0.330 0.350 0.370 0.013 0.014 0.015
b 0.220 0.260 0.300 0.009 0.010 0.012
D 1.98 2.01 2.04 0.078 0.079 0.080
D1 1.20 0.047
E 1.34 1.37 1.40 0.053 0.054 0.055
E1 0.800 0.031
e 0.360 0.400 0.440 0.014 0.016 0.017
fD 0.395 0.405 0.415 0.016 0.016 0.016
fE 0.275 0.285 0.295 0.011 0.011 0.012
G 0.050 0.002
ccc 0.050 0.002

Figure 16. Flip Chip CSP 1.4 x 2.04 mm footprint recommendation

26/28 DocID025995 Rev 1


GG25L Revision history

9 Revision history

Table 17. Document revision history


Date Revision Changes

28-Feb-2014 1 Initial release

DocID025995 Rev 1 27/28


28
GG25L

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