Lmx39-N, Lm2901-N, Lm3302-N Low-Power Low-Offset Voltage Quad Comparators

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LM139-N, LM239-N, LM2901-N, LM3302-N, LM339-N

SNOSBJ3E – NOVEMBER 1999 – REVISED DECEMBER 2014
LMx39-N, LM2901-N, LM3302-N Low-Power Low-Offset Voltage Quad Comparators

1 Features 3 Description
•
1 Wide Supply Voltage Range The LMx39-N series consists of four independent
precision voltage comparators with an offset voltage
• LM139/139A Series 2 to 36 VDC or ±1 to ±18 VDC specification as low as 2 mV maximum for all four
• LM2901-N: 2 to 36 VDC or ±1 to ±18 VDC comparators. These comparators were designed
• LM3302-N: 2 to 28 VDC or ±1 to ±14 VDC specifically to operate from a single power supply
• Very Low Supply Current Drain (0.8 mA) — over a wide range of voltages. Operation from split
power supplies is also possible and the low power
Independent of Supply Voltage
supply current drain is independent of the magnitude
• Low Input Biasing Current: 25 nA of the power supply voltage. These comparators also
• Low Input Offset Current: ±5 nA have a unique characteristic in that the input
• Offset Voltage: ±3 mV common-mode voltage range includes ground, even
though they are operated from a single power supply
• Input Common-Mode Voltage Range Includes voltage.
GND
The LMx39-N series was designed to directly
• Differential Input Voltage Range Equal to the
interface with TTL and CMOS. When operated from
Power Supply Voltage both plus and minus power supplies, the devices
• Low Output Saturation Voltage: 250 mV at 4 mA directly interface with MOS logic— where the low
• Output Voltage Compatible With TTL, DTL, ECL, power drain of the LM339 is a distinct advantage over
MOS, and CMOS Logic Systems standard comparators.
• Advantages: Device Information(1)
– High-Precision Comparators PART NUMBER PACKAGE BODY SIZE (NOM)
– Reduced VOS Drift Overtemperature LM139-N
CDIP (14) 19.56 mm × 6.67 mm
– Eliminates Need for Dual Supplies LM239-N
– Allows Sensing Near GND SOIC (14) 8.65 mm × 3.91 mm
LM2901-N
– Compatible With All Forms of Logic PDIP (14) 19.177 mm × 6.35 mm
– Power Drain Suitable for Battery Operation CDIP (14) 19.56 mm × 6.67 mm
LM339-N SOIC (14) 8.65 mm × 3.91 mm
2 Applications PDIP (14) 19.177 mm × 6.35 mm
• Limit Comparators (1) For all available packages, see the orderable addendum at
the end of the datasheet.
• Simple Analog-to-Digital Converters (ADCs)
• Pulse, Squarewave, and Time Delay Generators One-Shot Multivibrator With Input Lock Out
• Wide Range VCO; MOS Clock Timers
• Multivibrators and High-Voltage Digital Logic
Gates
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SNOSBJ3E – NOVEMBER 1999 – REVISED DECEMBER 2014 www.ti.com
Table of Contents
1 Features .................................................................. 1 7.2 Functional Block Diagram ....................................... 10
2 Applications ........................................................... 1 7.3 Feature Description................................................. 10
3 Description ............................................................. 1 7.4 Device Functional Modes........................................ 11
4 Revision History..................................................... 2 8 Application and Implementation ........................ 12
8.1 Application Information............................................ 12
5 Pin Configuration and Functions ......................... 3
8.2 Typical Applications ................................................ 12
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4 9 Power Supply Recommendations...................... 19
6.2 ESD Ratings.............................................................. 4 10 Layout................................................................... 19
6.3 Recommended Operating Conditions....................... 5 10.1 Layout Guidelines ................................................. 19
6.4 Thermal Information .................................................. 5 10.2 Layout Example .................................................... 19
6.5 Electrical Characteristics: LM139A, LM239A, 11 Device and Documentation Support ................. 20
LM339A, LM139......................................................... 6 11.1 Related Links ........................................................ 20
6.6 Electrical Characteristics: LM239, LM339, LM2901, 11.2 Trademarks ........................................................... 20
LM3302 ..................................................................... 7 11.3 Electrostatic Discharge Caution ............................ 20
6.7 Typical Characteristics .............................................. 8 11.4 Glossary ................................................................ 20
7 Detailed Description ............................................ 10 12 Mechanical, Packaging, and Orderable
7.1 Overview ................................................................. 10 Information ........................................................... 20
4 Revision History
Changes from Revision D (March 2013) to Revision E Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision C (March 2013) to Revision D Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 10
2 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated
Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

www.ti.com SNOSBJ3E – NOVEMBER 1999 – REVISED DECEMBER 2014
5 Pin Configuration and Functions
J, D and NFF Package

14-Pin CDIP, SOIC, PDIP
Top View
14-Pin CLGA Package

Top View
Pin Functions
PIN
I/O DESCRIPTION
NO. NAME
1 OUTPUT2 O Output, Channel 2
3 V+ P Positive Supply
4 INPUT1- I Inverting Input, Channel 1
5 INPUT1+ I Noninverting Input, Channel 1
12 GND P Ground
Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 3

6 Specifications
6.1 Absolute Maximum Ratings (1)
MIN MAX UNIT
LM139N, LM239N, LM339N, LM2901N 36
Supply Voltage, V+
LM3302N 28
(2)
LM139N, LM239N, LM339N, LM2901N 36
Differential Input Voltage (2)
VDC
LM3302N 28
LM139N, LM239N, LM339N, LM2901N −0.3 36
Input Voltage
LM3302 –0.3 28
(3)
Input Current (VIN<−0.3 VDC) 50 mA
Power Dissipation (4) PDIP 1050
Cavity DIP 1190 mW
SOIC Package 760
Output Short-Circuit to GND (5) Continuous
Lead Temperature (Soldering, 10 seconds) 260
PDIP Package (10 seconds) 260
Soldering Information Vapor Phase (60 seconds) 215 °C
SOIC Package
Infrared (15 seconds) 220
Storage temperature, Tstg −65 150
(1) Refer to RETS139AX for LM139A military specifications and to RETS139X for LM139 military specifications.
(2) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDC below
the magnitude of the negative power supply, if used) (at 25°C).
(3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go
to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive
and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3 VDC (at
25°C).
(4) For operating at high temperatures, the LM339/LM339A, LM2901, LM3302 must be derated based on a 125°C maximum junction
temperature and a thermal resistance of 95°C/W which applies for the device soldered in a printed circuit board, operating in a still air
ambient. The LM239-N and LM139-N must be derated based on a 150°C maximum junction temperature. The low bias dissipation and
the “ON-OFF” characteristic of the outputs keeps the chip dissipation very small (PD≤100 mW), provided the output transistors are
allowed to saturate.
(5) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 20 mA independent of the magnitude of V+.
6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±600 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
LM139N, LM239N, LM339N, LM2901N 2 36
Single Supply
LM3302N 2 28
Supply Voltage V
LM139N, LM239N, LM339N, LM2901N ±1 ±18
Dual Supply
LM3302N ±1 ±14
LM139/LM139A −55 125
LM2901/LM3302 −40 85
Operating Temperature °C
LM239/LM239A −25 85
LM339/LM339A 0 70
6.4 Thermal Information

LM139-N, LM2901-N, LM2901-N,
LM239-N, LM339-N LM339-N
LM339-N
THERMAL METRIC (1) UNIT
J D NFF
14 PINS
RθJA Junction-to-ambient thermal resistance 95 95 95 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: LM139A, LM239A, LM339A, LM139

(V+=5 VDC, TA = 25°C (1) unless otherwise stated)
LM139A LM239A, LM339A LM139
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
Input Offset Voltage See (2) 1.0 2.0 1.0 2.0 2.0 5.0 mVDC
Input Bias Current IIN(+) or IIN(−) with Output in 25 100 25 250 25 100 nADC
Linear Range (3), VCM=0 V
Input Offset Current IIN(+) − IIN(−), VCM= 0 V 3.0 25 5.0 50 3.0 25 nADC
Input Common-Mode V+=30 VDC (LM3302,
Voltage Range 0 V+−1.5 0 V+−1.5 0 V+−1.5 VDC
V+ = 28 VDC) (4)
Supply Current (LM3302, V+ = 28 VDC), RL = ∞
0.8 2.0 0.8 2.0 0.8 2.0 mADC
on all Comparators
+
(LM3302, V = 28 VDC), RL =
1.0 2.5 1.0 2.5 mADC
∞, V+ = 36 V
Voltage Gain RL≥15 kΩ, V+ = 15 VDC
50 200 50 200 50 200 V/mV
VO = 1 VDC to 11 VDC
Large Signal VIN = TTL Logic Swing, VREF =
Response Time
1.4 VDC, VRL = 5 VDC, 300 300 300 ns
RL = 5.1 kΩ
Response Time VRL = 5 VDC, RL = 5.1 kΩ (5) 1.3 1.3 1.3 μs
Output Sink Current VIN(−) = 1 VDC, VIN(+) = 0,
6.0 16 6.0 16 6.0 16 mADC
VO ≤ 1.5 VDC
Saturation Voltage VIN(−) = 1 VDC, VIN(+) = 0,
250 400 250 400 250 400 mVDC
ISINK ≤ 4 mA
Output Leakage VIN(+) = 1 VDC, VIN(−) = 0,
Current 0.1 0.1 0.1 nADC
VO = 5 VDC
Input Offset Voltage See (2) 4.0 4.0 9.0 mVDC
Input Offset Current IIN(+)−IIN(−), VCM = 0 V 100 150 100 nADC
Input Bias Current IIN(+) or IIN(−) with Output in 300 400 300 nADC
Linear Range, VCM = 0 V (3)
Input Common-Mode V+=30 VDC (LM3302), 0 V+−2.0 0 V+−2.0 0 V+−2.0
+ (4)
VDC
Voltage Range V = 28 VDC)
Saturation Voltage VIN(−)=1 VDC, VIN(+) = 0,
700 700 700 mVDC
ISINK ≤ 4 mA
Output Leakage VIN(+) = 1 VDC, VIN(−) = 0,
Current VO = 30 VDC, (LM3302, 1.0 1.0 1.0 μADC
VO = 28 VDC)
Differential Input Keep all VIN's ≥ 0 VDC (or V−, if
36 36 36 VDC
Voltage used) (6)
(1) These specifications are limited to −55°C ≤ TA ≤ 125°C, for the LM139/LM139A. With the LM239/LM239A, all temperature specifications
are limited to −25°C ≤ TA ≤ 85°C, the LM339/LM339A temperature specifications are limited to 0°C ≤ TA ≤ 70°C, and the LM2901,
LM3302 temperature range is −40°C ≤ TA ≤ 85°C.
(2) At output switch point, VO≃1.4 VDC, RS = 0 Ω with V+ from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+ from 5 VDC to 28 VDC.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end
of the common-mode voltage range is V+ −1.5V at 25°C, but either or both inputs can go to 30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(5) The response time specified is a 100-mV input step with 5-mV overdrive. For larger overdrive signals 300 ns can be obtained, see
typical performance characteristics section.
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow

6.6 Electrical Characteristics: LM239, LM339, LM2901, LM3302

(V+ = 5 VDC, TA = 25°C (1) unless otherwise stated)
LM239, LM339 LM2901 LM3302
PARAMETER TEST CONDITIONS MI TYP MAX MIN TYP MAX MIN TYP MAX UNIT
N
Input Offset Voltage See (2) 2.0 5.0 2.0 7.0 3 20 mVDC
Input Bias Current IIN(+) or IIN(−) with Output in Linear nADC
25 250 25 250 25 500
Range (3), VCM=0 V
Input Offset Current IIN(+)−IIN(−), VCM = 0 V 5.0 50 5 50 3 100 nADC
Input Common-Mode V+ = 30 VDC (LM3302, VDC
0 V+−1.5 0 V+−1.5 0 V+−1.5
Voltage Range V+ = 28 VDC) (4)
Supply Current (LM3302, V+ = 28 VDC) RL = ∞ on mADC
0.8 2.0 0.8 2.0 0.8 2.0
all Comparators
(LM3302, V+ = 28 VDC) RL = ∞, V+ mADC
1.0 2.5 1.0 2.5 1.0 2.5
= 36 V
Voltage Gain RL ≥ 15 kΩ, V+ = 15 VDC V/mV
50 200 25 100 2 30
VO = 1 VDC to 11 VDC
Large Signal VIN = TTL Logic Swing, VREF = ns
Response Time
1.4 VDC, VRL = 5 VDC, 300 300 300
RL = 5.1 kΩ,
Response Time VRL = 5 VDC, RL = 5.1 kΩ (5) 1.3 1.3 1.3 μs
Output Sink Current VIN(−)= 1 VDC, VIN(+) = 0, mADC
6.0 16 6.0 16 6.0 16
VO ≤ 1.5 VDC
Saturation Voltage VIN(−) = 1 VDC, VIN(+) = 0, mVDC
250 400 250 400 250 500
ISINK ≤ 4 mA
Output Leakage VIN(+) = 1 VDC,VIN(−) = 0, nADC
Current 0.1 0.1 0.1
VO = 5 VDC
Input Offset Voltage See (2) 9.0 9 15 40 mVDC
Input Offset Current IIN(+)− IIN(−), VCM = 0 V 150 50 200 300 nADC
Input Bias Current IIN(+) or IIN(−) with Output in 400 200 500 1000 nADC
Linear Range, VCM = 0V (3)
Input Common-Mode V+ = 30 VDC (LM3302, V+ = 28 VDC
V+−2.0 0 V+−2.0 0 V+−2.0
VDC)
Voltage Range See (4)
Saturation Voltage VIN(−) = 1 VDC, VIN(+) = 0, mVDC
700 400 700 700
ISINK ≤ 4 mA
Output Leakage VIN(+) = 1 VDC, VIN(−) = 0, VO = 30 μADC
1.0 1.0 1.0
Current VDC, (LM3302, V O = 28 VDC)
Differential Input Keep all VIN's ≥ 0 VDC (or V−, if VDC
36 36 28
Voltage used) (6)
(1) These specifications are limited to −55°C ≤ TA ≤ 125°C, for the LM139/LM139A. With the LM239/LM239A, all temperature specifications
are limited to −25°C ≤ TA ≤ 85°C, the LM339/LM339A temperature specifications are limited to 0°C ≤ TA ≤ 70°C, and the LM2901,
LM3302 temperature range is −40°C ≤ TA ≤ 85°C.
(2) At output switch point, VO≃1.4 VDC, RS = 0 Ω with V+ from 5 VDC to 30 VDC; and over the full input common-mode range (0 VDC to V+
−1.5 VDC), at 25°C. For LM3302, V+ from 5 VDC to 28 VDC.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end
of the common-mode voltage range is V+ −1.5V at 25°C, but either or both inputs can go to 30 VDC without damage (25V for LM3302),
independent of the magnitude of V+.
(5) The response time specified is a 100-mV input step with 5-mV overdrive. For larger overdrive signals 300 ns can be obtained, see
typical performance characteristics section.
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3 VDC (or 0.3 VDCbelow

6.7 Typical Characteristics
6.7.1 LM139/LM239/LM339, LM139A/LM239A/LM339A, LM3302
Figure 1. Supply Current Figure 2. Input Current
Figure 3. Output Saturation Voltage Figure 4. Response Time for Various Input Overdrives –
Negative Transition
Figure 5. Response Time for Various Input Overdrives –

Positive Transition

6.7.2 LM2901
Figure 6. Supply Current Figure 7. Input Current
Figure 8. Output Saturation Voltage Figure 9. Response Time for Various Input Overdrives –
Negative Transition
Figure 10. Response Time for Various Input Overdrives –

Positive Transition

7 Detailed Description
7.1 Overview
The LM139/LM239/LM339 family of devices is a monolithic quad of independently functioning comparators
designed to meet the needs for a medium-speed, TTL compatible comparator for industrial applications. Since no
antisaturation clamps are used on the output such as a Baker clamp or other active circuitry, the output leakage
current in the OFF state is typically 0.1 nA. This makes the device ideal for system applications where it is
desired to switch a node to ground while leaving it totally unaffected in the OFF state. Other features include
single supply, low voltage operation with an input common mode range from ground up to approximately one volt
below VCC . The output is an uncommitted collector so it may be used with a pullup resistor and a separate
output supply to give switching levels from any voltage up to 36V down to a V CE SAT above ground
(approximately 100 mV), sinking currents up to 16 mA. The open collector output configuration allows the device
to be used in wired-OR configurations, such as a window comparators.
In addition it may be used as a single pole switch to ground, leaving the switched node unaffected while in the
OFF state. Power dissipation with all four comparators in the OFF state is typically 4 mW from a single 5-V
supply (1 mW/comparator).
7.2 Functional Block Diagram
7.3 Feature Description

The LMx39-N series are high-gain, wide bandwidth devices which, like most comparators, can easily oscillate if
the output lead is inadvertently allowed to capacitively couple to the inputs through stray capacitance. This shows
up only during the output voltage transition intervals as the comparator changes states. Reducing the input
resistors to < 10 kΩ reduces the feedback signal levels and finally, adding even a small amount (1 to 10 mV) of
positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not
possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during the
small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise
and fall times, hysteresis is not required.
The differential input voltage may be larger than V+ without damaging the device. Protection should be provided
to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input clamp diode can be
used as shown in the applications section.
The output of the LMx39-N series is the uncommitted collector of a grounded-emitter NPN output transistor.
Many collectors can be tied together to provide an output OR'ing function. An output pullup resistor can be
connected to any available power supply voltage within the permitted supply voltage range and there is no
restriction on this voltage due to the magnitude of the voltage which is applied to the V+ terminal of the LM139A
package. The output can also be used as a simple SPST switch to ground (when a pullup resistor is not used).

Feature Description (continued)

The amount of current which the output device can sink is limited by the drive available (which is independent of
V+) and the β of this device. When the maximum current limit is reached (approximately 16 mA), the output
transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is
limited by the approximately 60-Ω RSAT of the output transistor. The low offset voltage of the output transistor (4
mV) allows the output to clamp essentially to ground level for small load currents.
7.4 Device Functional Modes

A basic comparator circuit is used for converting analog signals to a digital output. The output is HIGH when the
voltage on the non-inverting (+IN) input is greater than the inverting (-IN) input. The output is LOW when the
voltage on the noninverting (+IN) input is less than the inverting (-IN) input. The inverting input (-IN) is also
commonly referred to as the "reference" or "VREF" input.
All pins of any unused comparators should be tied to the negative supply.
The bias network of the LMx39-N series establishes a drain current which is independent of the magnitude of the
power supply voltage over the range of from 2 VDC to 30 VDC.

8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information

The LM139-N is specified for operation from 2.0 V to 36 V (±1V to ±18V) over the temperature range of –55°C to
125°C. While it may seem like a comparator has a well-defined and somewhat limited functionality as a '1-bit
ADC', a comparator is a versatile component which can be used for many functions.
Refer to AN-74 LM139/LM239/LM339 A Quad of Independently Functioning Comparators (SNOA654) for
additional application information on use of the LM139-N.
8.2 Typical Applications

8.2.1 Basic Comparator
Figure 11. Basic Comparator Schematic
8.2.1.1 Design Requirements

The basic usage of a comparator is to indicate when a specific analog signal has exceeded some predefined
threshold. In this application, the negative input is tied to a reference voltage, and the positive input is connected
to the input signal. The output is pulled up with a resistor to the logic supply voltage, V+.
For an example application, the supply voltage is 5 V. The input signal varies between 1 V and 3 V, and we want
to know when the input exceeds 2.5 V. For this example, we would set the VREF to 2.5 V.
8.2.1.2 Application Curve
Figure 12. Basic Comparator Response

Typical Applications (continued)

8.2.2 System Examples
Figure 13. Driving CMOS Figure 14. Driving TTL

(V+ = 5.0 VDC) (V+ = 5.0 VDC)
Figure 15. AND Gate Figure 16. OR Gate

(V+ = 5.0 VDC) (V+ = 5.0 VDC)
Figure 17. One-Shot Multivibrator Figure 18. Bi-Stable Multivibrator

(V+= 15 VDC) (V+= 15 VDC)

Figure 19. One-Shot Multivibrator with Input Lock Figure 20. Pulse Generator
Out (V+= 15 VDC)
(V+= 15 VDC)
Figure 21. Large Fan-In AND Gate Figure 22. ORing the Outputs
(V+= 15 VDC) (V+= 15 VDC)

Figure 23. Time Delay Generator Figure 24. Non-Inverting Comparator with
(V+= 15 VDC) Hysteresis
(V+= 15 VDC)
Figure 25. Inverting Comparator With Hysteresis Figure 26. Squarewave Oscillator
(V+= 15 VDC) (V+= 15 VDC)

Figure 27. Basic Comparator Figure 28. Limit Comparator

(V+= 15 VDC) (V+= 15 VDC)
* Or open-collector logic gate without pullup resistor
Figure 29. Comparing Input Voltages of Opposite Figure 30. Output Strobing
Polarity (V+= 15 VDC)
(V+= 15 VDC)

250 mVDC ≤ VC ≤ +50 VDC

700 Hz ≤ fO ≤ 100 kHz
Figure 31. Crystal Controlled Oscillator Figure 32. Two-Decade High-Frequency VCO
(V+= 15 VDC) V+ = +30 VDC
Figure 33. Transducer Amplifier Figure 34. Zero Crossing Detector (Single Power
(V+= 15 VDC) Supply)
(V+= 15 VDC)


8.2.2.1 Split-Supply Applications
Figure 35. MOS Clock Driver Figure 36. Zero Crossing Detector
(V+ = +15 VDC and V− = −15 VDC) (V+ = +15 VDC and V− = −15 VDC)
Figure 37. Comparator With a Negative Reference

(V+ = +15 VDC and V− = −15 VDC)

9 Power Supply Recommendations

Even in low-frequency applications, the LM139-N can have internal transients which are extremely quick. For this
reason, bypassing the power supply with 1.0 µF to ground will provide improved performance; the supply bypass
capacitor should be placed as close as possible to the supply pin and have a solid connection to ground. The
bypass capacitors should have a low ESR.
10 Layout
10.1 Layout Guidelines

Try to minimize parasitic impedances on the inputs to avoid oscillation. Any positive feedback used as hysteresis
should place the feedback components as close as possible to the input pins. Take care to ensure that the
output pins do not couple to the inputs. This can occur through capacitive coupling if the traces are too close and
lead to oscillations on the output.
The optimum bypass capacitor placement is closest to the V+ and ground pins. Take care to minimize the loop
area formed by the bypass capacitor connection between V+ and ground. The ground pin should be connected
to the PCB ground plane at the pin of the device. The feedback components should be placed as close to the
device as possible minimizing strays.
10.2 Layout Example
Figure 38. Layout Example

11 Device and Documentation Support
11.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
LM139-N Click here Click here Click here Click here Click here
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 11-Sep-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
LM139AJ/PB ACTIVE CDIP J 14 25 Non-RoHS Call TI Level-1-NA-UNLIM -55 to 125 LM139AJ Samples
& Green
LM139J/PB ACTIVE CDIP J 14 25 Non-RoHS Call TI Level-1-NA-UNLIM -55 to 125 LM139J Samples
& Green
LM239J ACTIVE CDIP J 14 25 Non-RoHS Call TI Level-1-NA-UNLIM -25 to 85 LM239J Samples
& Green
LM2901M/NOPB ACTIVE SOIC D 14 55 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LM2901M Samples
LM2901MX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LM2901M Samples
LM2901N/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM -40 to 85 LM2901N Samples
LM339AM/NOPB ACTIVE SOIC D 14 55 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 LM339AM Samples
LM339AMX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 LM339AM Samples
LM339AN/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM 0 to 70 LM339AN Samples
LM339M/NOPB ACTIVE SOIC D 14 55 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 LM339M Samples
LM339MX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 LM339M Samples
LM339N/NOPB ACTIVE PDIP N 14 25 RoHS & Green NIPDAU Level-1-NA-UNLIM 0 to 70 LM339N Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 11-Sep-2024
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM139-N, LM2901-N :
• Automotive : LM2901-Q1
• Space : LM139-SP
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 31-Oct-2024
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2901MX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1
LM339AMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1
LM339MX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1
Pack Materials-Page 1
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2901MX/NOPB SOIC D 14 2500 367.0 367.0 35.0
LM339AMX/NOPB SOIC D 14 2500 367.0 367.0 35.0
LM339MX/NOPB SOIC D 14 2500 367.0 367.0 35.0
TUBE
T - Tube
height L - Tube length
W - Tube
width
B - Alignment groove width

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
LM139AJ/PB J CDIP 14 25 502 14 11938 4.32
LM139J/PB J CDIP 14 25 502 14 11938 4.32
LM239J J CDIP 14 25 502 14 11938 4.32
LM2901M/NOPB D SOIC 14 55 495 8 4064 3.05
LM2901N/NOPB N PDIP 14 25 502 14 11938 4.32
LM339AM/NOPB D SOIC 14 55 495 8 4064 3.05
LM339AN/NOPB N PDIP 14 25 502 14 11938 4.32
LM339M/NOPB D SOIC 14 55 495 8 4064 3.05
LM339N/NOPB N PDIP 14 25 502 14 11938 4.32
PACKAGE OUTLINE
J0014A SCALE 0.900
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
PIN 1 ID A 4X .005 MIN

(OPTIONAL) [0.13] .015-.060 TYP
[0.38-1.52]
1
14
12X .100
[2.54] 14X .014-.026
14X .045-.065 [0.36-0.66]
[1.15-1.65]
.010 [0.25] C A B
.754-.785
[19.15-19.94]
7 8
B .245-.283 .2 MAX TYP .13 MIN TYP

[6.22-7.19] [5.08] [3.3]
C SEATING PLANE
.308-.314
[7.83-7.97]
AT GAGE PLANE
.015 GAGE PLANE

[0.38]
0 -15 14X .008-.014

TYP [0.2-0.36]
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
www.ti.com
EXAMPLE BOARD LAYOUT
J0014A CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
(.300 ) TYP
[7.62] SEE DETAIL B
SEE DETAIL A
1 14
12X (.100 )
[2.54]
SYMM
14X ( .039)
[1]
7 8
SYMM
LAND PATTERN EXAMPLE

NON-SOLDER MASK DEFINED
SCALE: 5X
.002 MAX (.063)

[0.05] [1.6]
ALL AROUND METAL
( .063)
SOLDER MASK [1.6]
OPENING
METAL
SOLDER MASK .002 MAX

(R.002 ) TYP [0.05]
OPENING
[0.05] ALL AROUND
DETAIL A DETAIL B
SCALE: 15X 13X, SCALE: 15X
4214771/A 05/2017
www.ti.com
PACKAGE OUTLINE
D0014A SCALE 1.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
C
6.2
TYP SEATING PLANE
5.8
A PIN 1 ID 0.1 C
AREA
12X 1.27
14
1
8.75 2X
8.55 7.62
NOTE 3
7
8
0.51
14X
4.0 0.31
B 1.75 MAX
3.8 0.25 C A B
NOTE 4
0.25
TYP
0.13
SEE DETAIL A
0.25
GAGE PLANE
0.25
0 -8 1.27 0.10
0.40
DETAIL A
TYPICAL
4220718/A 09/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm, per side.
5. Reference JEDEC registration MS-012, variation AB.
www.ti.com
EXAMPLE BOARD LAYOUT
D0014A SOIC - 1.75 mm max height
14X (1.55) SYMM

1
14
14X (0.6)
12X (1.27)
SYMM
7 8
(R0.05)
TYP
(5.4)
LAND PATTERN EXAMPLE

SCALE:8X
SOLDER MASK METAL UNDER SOLDER MASK

METAL OPENING
OPENING SOLDER MASK
0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND
NON SOLDER MASK SOLDER MASK

DEFINED DEFINED
SOLDER MASK DETAILS
4220718/A 09/2016
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0014A SOIC - 1.75 mm max height
14X (1.55) SYMM
1
14
14X (0.6)
12X (1.27)
SYMM
7 8
(5.4)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:8X
4220718/A 09/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2024, Texas Instruments Incorporated

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LM139-N, LM239-N, LM2901-N, LM3302-N, LM339-N

LMx39-N, LM2901-N, LM3302-N Low-Power Low-Offset Voltage Quad Comparators

Changes from Revision C (March 2013) to Revision D Page

• Changed layout of National Data Sheet to TI format ........................................................................................................... 10

2 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

5 Pin Configuration and Functions

J, D and NFF Package

14-Pin CLGA Package

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 3

6.2 ESD Ratings

4 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

6.3 Recommended Operating Conditions

6.4 Thermal Information

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 5

6.5 Electrical Characteristics: LM139A, LM239A, LM339A, LM139

6 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

6.6 Electrical Characteristics: LM239, LM339, LM2901, LM3302

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 7

6.7 Typical Characteristics

6.7.1 LM139/LM239/LM339, LM139A/LM239A/LM339A, LM3302

Figure 1. Supply Current Figure 2. Input Current

Figure 5. Response Time for Various Input Overdrives –

8 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

Figure 6. Supply Current Figure 7. Input Current

Figure 10. Response Time for Various Input Overdrives –

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 9

7.2 Functional Block Diagram

7.3 Feature Description

10 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

Feature Description (continued)

7.4 Device Functional Modes

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 11

8 Application and Implementation

8.1 Application Information

8.2 Typical Applications

Figure 11. Basic Comparator Schematic

8.2.1.1 Design Requirements

8.2.1.2 Application Curve

Figure 12. Basic Comparator Response

12 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

Typical Applications (continued)

Figure 13. Driving CMOS Figure 14. Driving TTL

Figure 15. AND Gate Figure 16. OR Gate

Figure 17. One-Shot Multivibrator Figure 18. Bi-Stable Multivibrator

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 13

Typical Applications (continued)

14 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM139-N LM239-N LM2901-N LM3302-N LM339-N

Typical Applications (continued)

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 15

Typical Applications (continued)