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    19ES4CCLIC

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    rohit adhikary

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    19ES4CCLIC

    Uploaded by

    rohit adhikary
    6 views2 pages

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    6 views2 pages

    19ES4CCLIC

    Uploaded by

    rohit adhikary

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    © All Rights Reserved
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    of 2

    Question Paper

    Exam Date & Time: 12-Oct-2020 (09:30 AM - 01:00 PM)

    BMS COLLEGE OF ENGINEERING

    Autonomous Institute Affiliated to VTU, Supplementary Semester End Main Examinations, October 2020
    Linear Integrated Circuits [19ES4CCLIC]
    Marks: 100 Duration: 210 mins.

    Electrical Cluster, Sem: IV


    Answer all the questions.
    Instructions:
    1. Answer FIVE full questions using the given internal choice
    2. Missing data, if any, may be suitably assumed

    1) Discuss the concepts of Virtual ground and virtual short in op-amp circuits that employ negative (6)
    feedback.
    a)
    b) Derive an expression for the closed-loop gain of a Non-inverting amplifier, and design one to amplify (8)
    input DC signals by a gain of 250.
    c) An op-amp having a slew rate of 0.75 V/µs is used to build an amplifier for a gain of 100. If the input (6)
    is a sinewave of peak-to-peak amplitude 50mV, determine the maximum frequency of operation
    possible, without distortion.
    [OR] Define CMRR and PSRR of Op-amps and specify their ideal and typical practical values. (4)
    2)
    a)
    b) Design an Instrumentation amplifier for a gain of 1000, also deriving an expression for the gain. (8)
    c) Realize a non-saturating type of precision half-wave rectifier and explain its operation with (8)
    waveforms and transfer curve.
    3) Design a Schmitt trigger circuit for a Hysteresis of 6V. Use an op-amp with a power supply of ±12V. (8)
    Draw the transfer curve and mark the LTP and UTP points.
    a)
    b) Design a Monostable multivibrator using op-amp to obtain a pulse of width 10ms. (6)
    c) Design an RC phase shift oscillator to obtain a sinusoidal signal of frequency 2.5 kHz, and an (6)
    approximate Vo(pp) of 26V.
    4) Explain the operation of a Series voltage regulator, and define any two of its important performance (8)
    parameters.
    a)
    b) Design a regulator using LM723 to obtain a regulated output of +10V from an unregulated input of (8)
    20V±10%. The circuit should also be short circuit protected when the load current reaches
    1.50Amps.
    c) Design a I order Butterworth LPF for a cut-off frequency of 1kHz and a pass-band gain of 5. (4)
    5) Define the following specifications of digital to analog converters with suitable illustrations. (i) (6)
    Resolution (ii) Monotonicity (iii) Differential non-linearity
    a)
    b) Derive an expression for the output voltage of a 3-bit R-2R type of DAC, in terms of the binary (10)

    Page #1
    inputs.
    c) How are Analog to Digital converters classified ? (4)
    [OR] Explain the operation of a Dual-slope ADC and show how the digital output is related to the analog (10)
    6) input voltage.
    a)
    b) A 10-bit Successive approximation ADC with a full scale input of +5V uses a clock of frequency (4)
    1MHz. Calculate the conversion time for an analog input of 2.5V ?
    c) Implement a 2-bit flash type of A to D converter and explain its operation. (6)
    7) Draw the internal diagram of a 555 timer and explain all the pin functions (8)

    a)
    b) Compare the characteristics of any two types of Phase detectors used in PLLs. (6)
    c) Using a block schematic, explain how PLL can be used as a frequency multiplier. (6)

    -----End-----

    Page #2

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