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Samsung NP-R510 LYON-Internal Schematic Diagram

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-이 문서는삼성전자의

이 문서는 삼성전자의 기술 기술자산으로


자산으로 승인자만이
승인자만이 사용할사용할수 있습니다 수 있습니다- -
- This
ThisDocument
Documentcan
can
notnot used
be be without
used Samsung's
without authorization
Samsung's -
authorization -

8. Block Diagram and Schematic

8-1

8_Block Diagram and Schematic_en1 1


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

FAN CPU
Charging
Clocking Mobile Processor DC/DC DC/DC
D Circuit D
CK-505 IMVP-6
Penryn-6M
Thermal FSB 1067
Sensor
478pin ON BOARD
EMC2102
L2 Cache : 6/3MB
VCCP / DC-DC
FSB
HDMI 667/800 MT/S

DDR II

g
Channel A (Reverse) DDR II 667/800
MCH-M Dual channel
SODIMM 0
DDR II Power
LCD Cantiga-GM DDR II

n
LCD
Channel B (Reverse) DDR II 667/800 SODIMM 1

l
CRT

u
1299 FCBGA
CRT

a
C C

s i
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

Direct Media Interface CLINK

t
x4, 1.5V
USB 0,2,6 USB 0,2,6
LOM
8. Block Diagram and Schematic

RJ11/RJ45 Combo

m
RJ45
88E8055

n
PCIE x1 Lane 4

ANT
USB 5
Bluetooth

a e
ICH9-M

8-2
PCIE x1 Lane 1 ANT
676 BGA Mini Card 1

S fid
HDAUDIO USB 8
High Definition Audio Camera

Aud. Audio HD Primary


AMP
ALC262 12P
PCIE x1 Lane 3
Express Card

n
RJ11 MDC HD Secondary USB 4

B Modem B
RJ11/RJ45 Combo

o
HP
USB 10
MIC-IN SPI ROM
SPI
2 IN 1 SD/MMC

C
AU6371

LPC
Internal MIC
SATA 0
4P
SATA HDD

SATA ODD SATA 1

Touch
MICOM PAD
3.3V LPC, 33MHz
SPKR R
H8S-2110B
TMKBC (TBD) KBD

A SPKR L A
80 Port

LED
SAMSUNG

8_Block Diagram and Schematic_en2 2


ELECTRONICS

4 3 2 1

SRP Sheet Number: 2 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V P1.5V

P3.3V
B28
BLM18PG181SN1 B521
BLM18PG181SN1
D B29 D
FSA FSB FSC VDD_SRC_IO VDD_CPU_IO VDD_PLL3_IO VDD_IO
BLM18PG181SN1 VDD_REF VDD_48 VDD_PCI VDD_PLL3 VDD_SRC VDD_CPU
HOST CLK nostuff
BSEL0 BSEL1 BSEL2

10V

10V

10V

10V

10V

10V

10V

10V

10V

10V

10V

10V
0 0 0 266 MHz

10000nF

10000nF

10000nF

10000nF

4700nF

4700nF
6.3V
6.3V

6.3V

6.3V
0 0 1 333 MHz

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

10V
10V
0 1 0 200 MHz
0 1 1 400 MHz

g
C321

C663

C319

C664

C345

C347

C341

C318

C320

C300

C662

C340

C339

C344

C343

C342

C346

C661
1 0 0 133 MHz
1 0 1 100 MHz
1 1 0 166 MHz

n
1 1 1 RSVD P3.3V

u al
1%

1%
U10
nostuff IDTCV179BNLG

s i
nostuff

10K

10K
19 4
VDD_IO VDD_REF
33 16
VDD_SRC_IO1 VDD_48

t
R220 33 1% 43 9
CLK3_FM48 nostuff 52
VDD_SRC_IO2 VDD_PCI
23
C R219 33 1% 56
VDD_SRC_IO3 VDD_PLL3 C

R238

R217
CLK3_USB48 VDD_CPU_IO
- This Document can not be used without Samsung's authorization -

27 46
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VDD_PLL3_IO VDD_SRC
R218 2.2K 62

m
CPU1_BSEL0 VDD_CPU

n
55
CPU1_BSEL1 NC
CPU1_BSEL2 R236 10K 1% CLK3_48MHZ_R CPU0
61
CLK0_HCLK0
8. Block Diagram and Schematic

17 60
USB_FS_A CPU0# CLK0_HCLK0#
R211 33 1% 64

a
CLK3_ICH14 FSB_TESTMODE

e
5 58
REF_FS_C_TEST_SEL CPU1_MCH
57 CLK0_HCLK1
CLK3_14MHZ_R CPU1_MCH# CLK0_HCLK1#
44
CHP3_CPUSTP# 45
CPUSTOP#
40
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
39
SRC11#_CLKREQG# LOM3_CLKREQ#

S fid
R210 0 63
CLK3_PWRGD CLKPWRGD_PWRDN#
41

8-3
CLK3_PCIF_R SRC10
R239 22.6 1% 14 42
CLK3_PCLKICH PCIF_5_ITP_EN SRC10#
R215 47 5% CLK3_PCI4_R 13 37
CLK3_DBGLPC PCI_4_SEL_LCDCLK# SRC9
38 CLK1_PCIELOM
To reduce PCI noise nearby USB port 12
SRC9# CLK1_PCIELOM#
PCI_3
(08.04.15) 54
SRC8_ITP CLK1_EXPCARD
CLK3_PCLKMICOM R214 22.6 1% CLK3_PCI2_R 11
PCI_2 SRC8#_ITP#
53
CLK1_EXPCARD#

n
R213 475 1% 10 51
MCH3_CLKREQ# PCI_1_CLKREQ_B# SRC7_CLKREQF#
50
EXP3_CLKREQ#
R212 475 1% 8
SRC7#_CLKREQE# MIN3_CLKREQ#
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48
SRC6 CLK1_MINIPCIE

o
7 47
SMB3_CLK 6
SCL SRC6# CLK1_MINIPCIE#
B SMB3_DATA SDA
34 B
3
SRC4
35 CLK1_MCH3GPLL
2
XTAL_IN SRC4# CLK1_MCH3GPLL#
XTAL_OUT
31
1%
1%

C
18
SRC3_CLKREQC#
32
CLK1_PCIEICH
0.047nF

59
VSS_48 SRC3#_CLKREQD# CLK1_PCIEICH#
VSS_CPU
10K

10K
22 28
15
VSS_IO SRC2
29
CLK1_SATA
CLK1_SATA#
1

VSS_PCI SRC2#
26
C788

VSS_PLL3
1 24
2801-004667
30
VSS_REF LCDCLK_27M
25 CLK1_DREFSSCLK
R237

R216

Y4 VSS_SRC1 LCDCLK#_27M_SS CLK1_DREFSSCLK#


14.31818MHz 36
C352 VSS_SRC2
C351 49 20
0.018nF 0.018nF
VSS_SRC3 SRC0_DOT96
21
CLK1_DREFCLK
SRC0#_DOT96# CLK1_DREFCLK#

1205-003159

This part is 64pin QFN package.


Place 14.318MHz within
500mils of CK-505
CLK REQ DEVICE SRC PORT
CLK REQ A SATA SRC2
CLK REQ B GMCH SRC4
A CLK REQ E MINI CARD SRC6 A
CLK REQ F LOM3_CLKREQ# SRC8

SEL_LCDCLK* Pin 20/21 Pin 24/25


SAMSUNG

8_Block Diagram and Schematic_en3 3


ELECTRONICS
LOW DOT_96/DOT_96# PEG_CLK/PEG_CLK#

HIGH SRC_0/SRC_0# 27M & 27M_SS

4 3 2 1

SRP Sheet Number: 53 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

P1.05V

R177

g
CPU500-1 56 CPU500-2
PENRYN PENRYN
1/4 2/4
CPU1_A#(16:3) CPU1_D#(15:0) CPU1_D#(47:32)
3 J4 H1 0 E22 Y22 32

n
A3# ADS# CPU1_ADS# D0# D32#
4 L5 E2 1 F24 AB24 33
A4# BNR# CPU1_BNR# D1# D33#
5 L4 G5 2 E26 V24 34
A5# BPRI# CPU1_BPRI# D2# D34#

l
6 K5 3 G22 V26 35
A6# D3# D35#
7 M3 F1 4 F23 V23 36
A7# BR0# D4# D36#

0
CPU1_BREQ#

ADDR GROUP
u
8 N2 5 G25 T22 37
A8# D5# D37#
9 J1 H5 6 E25 U25 38
A9# DEFER# CPU1_DEFER# D6# D38#
10 N3 F21 7 E23 U23 39

a
A10# DRDY# CPU1_DRDY# D7# D39#
11 P5 E1 K24 Y25

DATA GRP 0

DATA GRP 2
8 40
A11# DBSY# CPU1_DBSY# D8# D40#
12 P2 9 G24 W22 41

s i
A12# D9# D41#
13 L2 D20 10 J24 Y23 42

CONTROL
A13# IERR# D10# D42#
14 P4 B3 11 J23 W24 43
A14# INIT# CPU1_INIT# D11# D43#

t
15 P1 12 H22 W25 44
A15# D12# D44#
16 R1 H4 13 F26 AA23 45
C M1
A16# LOCK# CPU1_LOCK#
14 K22
D13# D45#
AA24 46
C
CPU1_ADSTB0# ADSTB0# D14# D46#
- This Document can not be used without Samsung's authorization -

C1 15 H23 AB25 47
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

RESET# CPU1_CPURST# D15# D47#


F3 J26 Y26

m
RS0# DSTBN0# DSTBN2#

n
CPU1_RS0# CPU1_DSTBN0# CPU1_DSTBN2#
F4 H26 AA26
CPU1_A#(35:17) RS1# CPU1_RS1# CPU1_DSTBP0# DSTBP0# DSTBP2# CPU1_DSTBP2#
17 Y2 G3 H25 U22
A17# RS2# CPU1_RS2# CPU1_DBI0# DINV0# DINV2# CPU1_DBI2#
18 U5 G2
8. Block Diagram and Schematic

A18# TRDY# CPU1_TRDY# CPU1_D#(31:16) CPU1_D#(63:48)


19 R3 16 N22 AE24 48

a
A19# D16# D48#

e
20 W6 G6 17 K25 AD24 49
A20# HIT# CPU1_HIT# D17# D49#
21 U4 E4 18 P26 AA21 50
A21# HITM# CPU1_HITM# D18# D50#
22 Y5 19 R23 AB22 51
A22# D19# D51#
23 U1 A6 20 L23 AB21 52
A23# A20M# CPU1_A20M# D20# D52#
24 R4 A5 21 M24 AC26 53

1
A24# FERR# CPU1_FERR# D21# D53#

S fid
ADDR GROUP
25 T5 C4 22 L22 AD20 54
A25# IGNNE# CPU1_IGNNE# D22# D54#
T3 M23 AE22

8-4
26 23 55
A26# D23# D55#

ICH
W2 D5 24 P25 AF23

DATA GRP 1

DATA GRP 3
27 56
A27# STPCLK# CPU1_STPCLK# D24# D56#
28 W5 C6 25 P23 AC25 57
A28# LINT0 CPU1_INTR D25# D57#
29 Y4 B4 26 P22 AE21 58
A29# LINT1 CPU1_NMI D26# D58#
30 U2 A3 27 T24 AD21 59
A30# SMI# CPU1_SMI# D27# D59#
31 V4 28 R24 AC22 60
A31# CPU1_REQ#(4:0) D28# D60#
32 W3 K3 0 29 L25 AD23 61
A32# REQ0# D29# D61#
33 AA4 H2 1 30 T25 AF22 62
A33# REQ1# D30# D62#
34 AB2 K2 2 31 N25 AC23 63

n
A34# REQ2# D31# D63#
35 AA3 J3 3 L26 AE25
A35# REQ3# CPU1_DSTBN1# DSTBN1# DSTBN3# CPU1_DSTBN3#
V1 L1 4 M26 AF24
CPU1_ADSTB1# ADSTB1# REQ4# CPU1_DSTBP1# DSTBP1# DSTBP3# CPU1_DSTBP3#
N24 AC20
CPU1_DBI1# DINV1# DINV3# CPU1_DBI3#
0143854500

o
0143854500
B B

C
CPU Socket : 3704-001153
M5
SUPLECODE
1
MNT1 2
MNT2 3
MNT3 4
MNT4

CPU Mount

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 54 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CPU500-3
PENRYN P1.5V
3/4
A22 B26
CLK0_HCLK0 BCLK0 VCCA_1

H CLK
A21 C26
CLK0_HCLK0# BCLK1 VCCA_2 C589
C590
D
CPU1_SLP#
D7
B5
SLP# VCCP_1
K6
J6
10nF
10000nF
6.3V CPU Core Voltage Table IMVP-6
D
CPU1_DPSLP# E5
DPSLP# VCCP_2
M6
CPU1_DPRSTP# D24
DPRSTP# VCCP_3
N6
CPU1_DPWR# D6
DPWR# VCCP_4
T6
CPU1_PWRGDCPU AE6
35-C1
PWRGOOD VCCP_5
R6 Active/Deeper Sleep
CPU1_PSI# PSI# VCCP_6 Active Mode Deeper Sleep/Extended Deeper Sleep
CPU1_VID(6:0) VCCP_7
K21 Dual Mode Region Dual Mode Region
6 AE2 J21
VID_6 VCCP_8 P1.05V
5 AF3 M21
P1.05V VID_5 VCCP_9
4 AE3 N21 VID(6:0) Voltage VID(6:0) Voltage VID(6:0) Voltage

g
VID_4 VCCP_10
3 AF4 T21
VID_3 VCCP_11 0 0 0 0 0 0 0 1.5000 V 0 1 0 1 0 0 0 1.0000 V 1 0 1 0 0 0 1 0.4875 V
2 AE5 R21 EC15
1 AF5
VID_2 VCCP_12
V21 C279 C278 C277 C242 C241 C240 0 0 0 0 0 0 1 1.4875 V 0 1 0 1 0 0 1 0.9875 V 1 0 1 0 0 1 0 0.4750 V
R176 VID_1 VCCP_13 220uF 100nF 100nF 100nF 100nF 100nF 100nF 0 0 1
0 AD6 W21 2.5V 0 0 0 0 1 0 1.4750 V 1 0 1 0 1 0 0.9750 V 0 1 0 0 1 1 0.4625 V
56 VID_0 VCCP_14 AD 10V 10V 10V 10V 10V 10V 0 0 0 0 0 1 1 1.4625 V 0 1 0 1 0 1 1 0.9625 V 1 0 1 0 1 0 0 0.4500 V
V6

n
VCCP_15 0 0 0 0 1 0 0 1.4500 V 0 1 0 1 1 0 0 0.9500 V 1 0 1 0 1 0 1 0.4375 V
D21 G21
PROCHOT# VCCP_16

THERMAL
A24 0 0 0 0 1 0 1 1.4375 V 0 1 0 1 1 0 1 0.9375 V 1 0 1 0 1 1 0 0.4250 V
CPU2_THERMDA THRMDA 0 0 1

l
B25 AC1 0 0 0 1 1 0 1.4250 V 1 0 1 1 1 0 0.9250 V 0 1 0 1 1 1 0.4125 V
P1.05V CPU2_THERMDC C7
THRMDC PREQ#
AC2 0 0 0 0 1 1 1 1.4125 V 0 1 0 1 1 1 1 0.9125 V 1 0 1 1 0 0 0 0.4000 V
CPU1_THRMTRIP# THERMTRIP# PRDY# 0 0 0 1 0 0 0 1.4000 V 0 1 1 0 0 0 0 0.9000 V 1 0 1 1 0 0 1 0.3875 V

u
AC4
BPM3# 0 0 0 1 0 0 1 1.3875 V 0 1 1 0 0 0 1 0.8875 V 1 0 1 1 0 1 0 0.3750 V
C21 AD1

XDP/ITP SIGNALS
CPU1_BSEL2 B23
BSEL2 BPM2#
AD3 0 0 0 1 0 1 0 1.3750 V 0 1 1 0 0 1 0 0.8750 V 1 0 1 1 0 1 1 0.3625 V

a
R169 CPU1_BSEL1 BSEL1 BPM1# 0 0 0 1 0 1 1 1.3625 V 0 1 1 0 0 1 1 0.8625 V 1 0 1 1 1 0 0 0.3500 V
1K B22 AD4
1%
CPU1_BSEL0 BSEL0 BPM0# 0 0 0 1 1 0 0 1.3500 V 0 1 1 0 1 0 0 0.8500 V 1 0 1 1 1 0 1 0.3375 V

s i
AD26 AC5 0 0 0 1 1 0 1 1.3375 V 0 1 1 0 1 0 1 0.8375 V 1 0 1 1 1 1 0 0.3250 V
GTLREF TCK
AA6
CPU1_TCK 0 0 0 1 1 1 0 1.3250 V 0 1 1 0 1 1 0 0.8250 V 1 0 1 1 1 1 1 0.3125 V
TDI CPU1_TDI 0 0 0 1 1 1 1 1.3125 V 0 1 1 0 1 1 1 0.8125 V 1 1 0 0 0 0 0 0.3000 V

t
R170 R187 54.9 1% Y1
COMP3 TDO
AB3
0 0 1 0 0 0 0 1.3000 V 0 1 1 1 0 0 0 0.8000 V 1 1 0 0 0 0 1 0.2875 V
C 2K R186 27.4 1% AA1
COMP2 TMS
AB5
CPU1_TMS C
0 0 1 0 0 0 1 1.2875 V 0 1 1 1 0 0 1 0.7875 V 1 1 0 0 0 1 0 0.2750 V
1% R171 54.9 1% U26 AB6
R172 COMP1 TRST# CPU1_TRST# 0 0 1 0 0 1 0 1.2750 V 0 1 1 1 0 1 0 0.7750 V 1 1 0 0 0 1 1 0.2625 V
- This Document can not be used without Samsung's authorization -

27.4 1% R26 C20


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

COMP0 DBR# ITP3_DBRRESET# 0 0 1 0 0 1 1 1.2625 V 0 1 1 1 0 1 1 0.7625 V 1 1 0 0 1 0 0 0.2500 V

m n
AF7 M4 0 0 1 0 1 0 0 1.2500 V 0 1 1 1 1 0 0 0.7500 V 1 1 0 0 1 0 1 0.2375 V
CPU1_VCCSENSE 8-C1 11-D3 #3 AE7
VCCSENSE RSVD_1
N5 0 0 1 0 1 0 1 1.2375 V 0 1 1 1 1 0 1 0.7375 V 1 1 0 0 1 1 0 0.2250 V
CPU1_VSSSENSE VSSSENSE RSVD_2 0 0 1 0 1 1 0 1.2250 V 0 1 1 1 1 1 0 0.7250 V 1 1 0 0 1 1 1 0.2125 V
8. Block Diagram and Schematic

8-C1 11-C3 #3 T2
RSVD_3 0 0 1 0 1 1 1 1.2125 V 0 1 1 1 1 1 1 0.7125 V 1 1 0 1 0 0 1
0 0.2000 V
C23 V3

a
TEST1 RSVD_4 0 0 1 1 0 0 0 1.2000 V 1 0 0 0 0 0 0 0.7000 V 1 1 0 1 0 0 1 0.1875 V

e
D25 B2

RSVD
TEST2 RSVD_5 0 0 1 1 0 0 1 1.1875 V 1 0 0 0 0 0 1 0.6875 V 1 1 0 1 0 1 0 0.1750 V
C24 D2
1%
1%

TEST3 RSVD_6 0 0 1 1 0 1 0 1.1750 V 1 0 0 0 0 1 0 0.6750 V 1 1 0 1 0 1 1 0.1625 V


AF26 D22
TEST4 RSVD_7 0 0 1 1 0 1 1 1.1625 V 1 0 0 0 0 1 1 0.6625 V 1 1 0 1 1 0 0 0.1500 V
AF1 D3
TEST5 RSVD_8 0 0 1 1 1 0 0 1.1500 V 1 0 0 0 1 0 0 0.6500 V 1 1 0 1 1 0 1 0.1375 V
A26 F6
1K
1K

TEST6 RSVD_9

S fid
0 0 1 1 1 0 1 1.1375 V 1 0 0 0 1 0 1 0.6375 V 1 1 0 1 1 1 0 0.1250 V
nostuff
nostuff

C3
TEST7 0 0 1 1 1 1 0 1.1250 V 1 0 0 0 1 1 0 0.6250 V 1 1 0 1 1 1 1 0.1125 V

8-5
0 0 1 1 1 1 1 1.1125 V 1 0 0 0 1 1 1 0.6125 V 1 1 1 0 0 0 0 0.1000 V
0 1 0 0 0 0 0 1.1000 V 1 0 0 1 0 0 0 0.6000 V 1 1 1 0 0 0 1 0.0875 V
R174
R173

0143854500 0 1 0 0 0 0 1 1 0 0 1 0 0 1 0.5875 V 1 1 1 0 0 1 0 0.0750 V


1.0875 V
0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V
0 1 0 0 0 1 1 1.0625 V 1 0 0 1 0 1 1 0.5625 V 1 1 1 0 1 0 0 0.0500 V
0 1 0 0 1 0 0 1.0500 V 1 0 0 1 1 0 0 0.5500 V 1 1 1 0 1 0 1 0.0375 V
0 1 0 0 1 0 1 1.0375 V 1 0 0 1 1 0 1 0.5375 V 1 1 1 0 1 1 0 0.0250 V
0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V

n
CPU Socket : 3704-001153 0 1 0 0 1 1 1 1.0125 V 1
1
0
1
0
0
1
1
0
1
0
1
0
1
0
0.5125 V
0.5000 V
1
1
1
1
1
1
1
1
0
0
0
1
0
0
1
0.0000 V
0.0000 V
1 1 1 1 0 1 0 0.0000 V
Deeper Slp 1 1 1 1 0 1 1 0.0000 V
Active 1 1 1 1 1 0 0 0.0000 V

o
DPRSLPVR 0 DPRSLPVR 1 1 1 1 1 1 0 1 0.0000 V
B DPRSTP* 0 1 1 1 1 1 1 0 0.0000 V
FSC FSB FSA FRQ DPRSTP* 1 1 1 1 1 1 1 1 0.0000 V
0 0 0 266M PSI2* 0 or 1 PSI2* 0 or 1
*"1111111" : 0V power good asserted.
P1.05V 0 1 0 200M

C
0 1 1 166M

*Yonah Processor (2.33 GHz / 800 MHz : TBD)


54.9 1%

54.9

GTLREF : Keep the Voltage divider within 0.5"


of the first GTLREF0 pin with Zo=55ohm trace.
near the CPU Minimize coupling of any switching signals to this net.
R569
R574

COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)


trace shorter than 1/2" to their respective Banias socket pins.

CPU1_TDI GND test points within 100mil of the VCC/VSSsense at the end of the line.
CPU1_TMS Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
CPU1_TCK (preferred 50mil) from any other signal. And GND via 100mil away
54.9 1%

CPU1_TRST#
54.9 1%

from each of the VCC/VSS test point vias.

A A

SAMSUNG
R571
R572

8_Block Diagram and Schematic_en5 5


ELECTRONICS

4 3 2 1

SRP Sheet Number: 55 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

M22
M25

N23
N26

R22
K23
K26

P21
P24
L21
L24

M2

M5
N1

N4

R2
K4

P3
P6
L3
L6
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
A11 K1
VSS_1 CPU_CORE CPU_CORE VSS_120
A14 J5
VSS_2 VSS_119
A16 J25
VSS_3 VSS_118
A19 J22

g
VSS_4 VSS_117
A2 A10 AE9 J2
VSS_5 VCC_1 VCC_51 VSS_116
A23 A12 AF10 H6
VSS_6 VCC_2 VCC_52 VSS_115
A25 A13 AF12 H3
VSS_7 VCC_3 VCC_53 VSS_114
A4 A15 AF14 H24
VSS_8 VCC_4 VCC_54 VSS_113
A8 A17 AF15 H21

n
VSS_9 VCC_5 VCC_55 VSS_112
AA11 A18 AF17 G4
VSS_10 VCC_6 VCC_56 VSS_111
AA14 A20 AF18 G26
VSS_11 VCC_7 VCC_57 VSS_110

l
AA16 A7 AF20 G23
VSS_12 VCC_8 VCC_58 VSS_109
AA19 A9 AF9 G1
VSS_13 VCC_9 CPU500-4 VCC_59 VSS_108

nostuff

nostuff

nostuff
CPU_CORE

u
AA2 AA10 B10 F8
VSS_14 VCC_10 VCC_60 VSS_107
AA22 AA12 B12 F5
AA25
VSS_15
AA13 PENRYN
VCC_11 VCC_61
B14
VSS_106
F25

a
VSS_16 VCC_12 VCC_62 VSS_105
AA5 AA15 B15 F22
VSS_17 VCC_13 VCC_63 VSS_104
AA8 AA17 B17 F2

s i
AB1
VSS_18
VSS_19
AA18 VCC_14
VCC_15
4/4 VCC_64
VCC_65
B18
VSS_103
VSS_102
F19

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF
AB11 AA20 B20 F16

20%

20%

20%

20%

20%

20%

20%

20%

20%

20%

20%

20%

20%
VSS_20 VCC_16 VCC_66 VSS_101

t
AB13 AA7 B7 F13
VSS_21 VCC_17 VCC_67 VSS_100
AB16 AA9 B9 F11
C AB19
VSS_22
AB10
VCC_18 VCC_68
C10
VSS_99
E8
C
VSS_23 VCC_19 VCC_69 VSS_98
- This Document can not be used without Samsung's authorization -

AB26 AB12 C12 E6


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VSS_24 VCC_20 VCC_70 VSS_97


C257

C255

C258

C254

C256

C261

C281

C243

C276

C283

C280

C263

C244
AB4 AB14 C13 E3

m
VSS_25 VCC_21 VCC_71 VSS_96

n
AB8 AB15 C15 E24
VSS_26 VCC_22 VCC_72 VSS_95
AC11 AB17 C17 E21
VSS_27 VCC_23 VCC_73 VSS_94
AC14 AB18 C18 E19
8. Block Diagram and Schematic

VSS_28 VCC_24 VCC_74 VSS_93


AC16 AB20 C9 E16

a
VSS_29 VCC_25 VCC_75 VSS_92

e
AC19 AB7 D10 E14
VSS_30 VCC_26 VCC_76 VSS_91
AC21 AB9 D12 E11
R573 100 1%
AC24
VSS_31
AC10
VCC_27 VCC_77
D14
VSS_90
D8
CPU1_VCCSENSE AC3
VSS_32
AC12
VCC_28 VCC_78
D15
VSS_89
D4
VSS_33 VCC_29 VCC_79 VSS_88
AC6 AC13 D17 D26
VSS_34 VCC_30 VCC_80 VSS_87

S fid
22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF

22000nF
AC8 AC15 D18 D23
20%

20%

20%

20%

20%

20%

20%

20%

20%

20%
VSS_35 VCC_31 VCC_81 VSS_86
AD11 AC17 D9 D19

8-6
VSS_36 VCC_32 VCC_82 VSS_85
AD13 AC18 E10 D16
VSS_37 VCC_33 VCC_83 VSS_84
AD16 AC7 E12 D13
VSS_38 VCC_34 VCC_84 VSS_83
AD19 AC9 E13 D11
VSS_39 VCC_35 VCC_85 VSS_82
C264

C259

C260

C262

C266

C284

C239

C275

C282

C265
AD2 AD10 E15 D1
VSS_40 VCC_36 VCC_86 VSS_81
AD22 AD12 E17 C8
VSS_41 VCC_37 VCC_87 VSS_80
AB23 AD14 E18 C5
R570 100 1%
AD25
VSS_42
AD15
VCC_38 VCC_88
E20
VSS_79
C25
CPU1_VSSSENSE AD5
VSS_43
AD17
VCC_39 VCC_89
E7
VSS_78
C22

n
VSS_44 VCC_40 VCC_90 VSS_77
AD8 AD18 E9 C2
VSS_45 VCC_41 VCC_91 VSS_76
AE1 AD7 F10 C19
VSS_46 VCC_42 VCC_92 VSS_75
nostuff

nostuff

AE11 AD9 F12 C16


nostuff

nostuff

nostuff
VSS_47 VCC_43 VCC_93 VSS_74
AE14 AE10 F14 C14
VSS_48 VCC_44 VCC_94 VSS_73

o
AE16 AE12 F15 C11
VSS_49 VCC_45 VCC_95 VSS_72
AE19 AE13 F17 B8
VSS_50 VCC_46 VCC_96 VSS_71
B AE23
VSS_51
AE15
VCC_47 VCC_97
F18
VSS_70
B6 B
AE26 AE17 F20 B24
VSS_52 VCC_48 VCC_98 VSS_69
AE4 AE18 F7 B21
VSS_53 VCC_49 VCC_99 VSS_68
6x 330 uF : CPU VR side AE8 AE20 F9 B19

C
VSS_54 VCC_50 VCC_100 VSS_67
AF11 B16
VSS_55 VSS_66
AF13 B13
VSS_56 VSS_65
AF16 B11
VSS_57 VSS_64
AF19 AF8
VSS_58 VSS_63
AF2 AF6
VSS_59 VSS_62
AF21 AF25
CPU Socket : 3704-001153

VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_60 VSS_61

Y6
Y3
Y24
Y21
W4
W26
W23
W1
V5
V25
V22
V2
U6
U3
U24
U21
T4
T26
T23
T1
R5
R25
A A

SAMSUNG

8_Block Diagram and Schematic_en6 6


ELECTRONICS

4 3 2 1

SRP Sheet Number: 56 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

THERMAL SENSOR & FAN CONTROL

g
P5.0V P3.3V_AUX P3.3V P3.3V_AUX

n
R54

10K 1%

10K 1%

10K 1%

10K 1%
49.9

l
1%
TP963

u
C70 C86 C84
10000nF 100nF 100nF

a
6.3V 10V 10V

R57

R58

R56

R70
U6

s i
EMC2102
1 22
VDD_3V SMDATA KBC3_THERM_SMDATA

t
24 23
VDD_5V_1 SMCLK KBC3_THERM_SMCLK
27
C VDD_5V_2
19
C
14
ALERT#
12 THM3_ALERT#
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

KBC3_PWRGD 16
POWER_OK SYS_SHDN# THM3_STP#

m
RESET#

n
2
DN1 CPU2_THERMDC
10
FAN_MODE DP1
3 C85
25
8. Block Diagram and Schematic

0.47nF
FAN5_VDD 26
FAN_1
4
CPU2_THERMDA 10mil width and 10mil spacing.

a
FAN_2 DN2

e
28 5
FAN3_FDBACK# TACH DP2
13 6
CPU3_THRMTRIP# THERMTRIP# DN3
7
TP968 DP3 2
R67 0 9
SHDN_SEL

S fid
P3.3V_AUX 11
TRIP_SET CLK_SEL
17 C591 MMBT3904
nostuff 18 2.2nF 1 Q510

8-7
CLK_IN
8 3
NC_1
R69 15
NC_2 GND
20 P3.3V
R1 200K 21 29
NC_3 THRM_PAD TP967
1%
Opposite side of CPU. Line Width = 20 mil
TP969 R55
10K J507
R68 SMBUS Address 7Ah 1% HDR-4P-SMD
R2

n
51.1K FAN5_VDD 1
1%
2
93 degree C FAN3_FDBACK# 3
TP965
4
R71 5
C68 MNT1

o
20K 6
10000nF MNT2
1%
6.3V
B 3711-000922
B

TRIP_SET pin voltage = (T-75)/21

C
3.3 * [R2/(R1+R2)] = (T-75)/21 P1.05V

R72
2K
1%

RHE Support (Top)


CPU3_THRMTRIP#
3
nostuff
nostuff 1 Q14
MMBT3904
TP964
2
CPU1_THRMTRIP#
M6 M3 M4 M2 M1
HEAD HEAD HEAD HEAD HEAD
DIA DIA DIA DIA DIA
LENGTH LENGTH LENGTH LENGTH LENGTH

nostuff

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
BA61-01090A|screw-115-4t-h0250 BA61-01090A|screw-115-4t-h0250 BA61-01090A|screw-115-4t-h0250

M6
SAMSUNG
ELECTRONICS
Internal : nostuff
External : stuff

4 3 2 1

SRP Sheet Number: 64 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL P1.05V P1.05V
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. EC7
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS C196 C137
220uF 22000nF C190 C188 100nF
EXCEPT AS AUTHORIZED BY SAMSUNG. 2.5V 220nF 220nF EC4
AD 20% 10V C133 C117 C118
470nF C135 4700nF 4700nF 220uF
2200nF 2.5V
16V 10V 10V AD

AM33
AG24
AG25
AG26
AG33
AG34
AC26
AC28
AC33
AC34

AH23
AH25
AH28
AA28
AA33
AA34
AB34

AE26
AE33

AK33
AF23
AF25
AF28
AF33

AJ23
AJ26
AJ33

W33
U33
U34

U10
U11
U12
U13
CPU1_A#(35:3)

V33
V34

Y33
Y34
T32

T10
T11
T12
T13

U1

U2
U3
U5
U6
U7
U8
U9
V1
V2
V3
T2
T5
T6
T7
T8
T9
D CPU1_D#(63:0) 22-D2 A14 3
D
H_A#_3
0 F2 C15

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
4
H_D#_0 H_A#_4
1 G8 F16 5
H_D#_1 H_A#_5
2 F8 H13 6
H_D#_2 H_A#_6
3 E6 C18 7
H_D#_3 H_A#_7
4 G2 M16 8
H_D#_4 H_A#_8
5 H6 J13 9
H_D#_5 H_A#_9
6 H2 P16 10
H_D#_6 VCC CORE VTT H_A#_10
7 F6 R16 11
H_D#_7 H_A#_11
8 D4 N17 12

g
H_D#_8 H_A#_12
9 H3 M13 13
H_D#_9 H_A#_13
10 M9 E17 14
H_D#_10 H_A#_14
11 M11 P17 15
H_D#_11 H_A#_15
12 J1 F17 16

HOST ADDRESS BUS


H_D#_12 H_A#_16
13 J2 G20 17

n
P1.05V H_D#_13 H_A#_17
14 N12 B19 18
H_D#_14 H_A#_18
15 J6 J16 19
H_D#_15 H_A#_19

l
16 P2 E20 20
H_D#_16 H_A#_20
R78 17 L2 H16 21
H_D#_17 H_A#_21

u
221 18 R2 J20 22
H_D#_18 H_A#_22
1% 19 N9 L17 23
H_D#_19 H_A#_23
20 L6 A17 24

a
MCH1_HXSWING H_D#_20 H_A#_24

R555
21
22
M5
J3
H_D#_21 U509-1 H_A#_25
B17
L16
25
26

s i
C580 23 N2
H_D#_22 H_A#_26
C21 27
100
1%
100nF
10V
24 R1
H_D#_23
H_D#_24 EB88CTGM H_A#_27
H_A#_28
J17 28

t
25 N5 H20 29
H_D#_25 H_A#_29
26 N6 B18 30
C 27 P13
H_D#_26
H_D#_27 1 OF 5 H_A#_30
H_A#_31
K17 31
C
- This Document can not be used without Samsung's authorization -

28 N8 B20 32
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

H_D#_28 H_A#_32
29 L7 F21 33

m
H_D#_29 H_A#_33

n
HOST DATA BUS
30 N10 K21 34
H_D#_30 H_A#_34
31 M3 L20 35
H_D#_31 H_A#_35
32 Y3
8. Block Diagram and Schematic

H_D#_32
33 AD14 H12

a
H_D#_33 H_ADS# CPU1_ADS#

e
34 Y6 B16
35 Y10
H_D#_34 H_ADSTB#_0
G17 CPU1_ADSTB0#
36 Y12
H_D#_35 H_ADSTB#_1
A9
CPU1_ADSTB1#
37 Y14
H_D#_36 H_BNR#
F11 CPU1_BNR#
38 Y7
H_D#_37 H_BPRI#
G12
CPU1_BPRI#
H_D#_38 H_BREQ# CPU1_BREQ#

S fid
39 W2
P1.05V H_D#_39
AA8 E9

8-8
40
41 Y9
H_D#_40 H_DEFER#
B10
CPU1_DEFER#
42 AA13
H_D#_41 H_DBSY#
J11 CPU1_DBSY#
43 AA9
H_D#_42 H_DPWR#
F9
CPU1_DPWR#
R79 H_D#_43 H_DRDY# CPU1_DRDY#
1K 44 AA11
H_D#_44
1% 45 AD11 H9
46 AD10
H_D#_45 H_HIT#
E12
CPU1_HIT#
MCH1_HVREF 47 AD13
H_D#_46 H_HITM#
H11
CPU1_HITM#
48 AE12
H_D#_47 H_LOCK#
C9
CPU1_LOCK#

n
R77 H_D#_48 H_TRDY# CPU1_TRDY#
2K 49 AE9
H_D#_49
1% 50 AA2 AH7
51 AD8
H_D#_50 HPLL_CLK AH6 CLK0_HCLK1

HOST CONTROL
52 AA3
H_D#_51 HPLL_CLK# CLK0_HCLK1#
H_D#_52

o
53 AD3 J8
54 AD7
H_D#_53 H_DINV#_0
L3
CPU1_DBI0#
B 55 AE14
H_D#_54 H_DINV#_1
Y13
CPU1_DBI1# B
56 AF3
H_D#_55 H_DINV#_2
Y1 CPU1_DBI2#
57 AC1
H_D#_56 H_DINV#_3 CPU1_DBI3#
H_D#_57
58 AE3 L10

C
59 AC3
H_D#_58 H_DSTBN#_0
M7
CPU1_DSTBN0#
60 AE11
H_D#_59 H_DSTBN#_1
AA5
CPU1_DSTBN1#
61 AE8
H_D#_60 H_DSTBN#_2
AE6
CPU1_DSTBN2#
62 AG2
H_D#_61 H_DSTBN#_3 CPU1_DSTBN3#
H_D#_62
63 AD6 L9
H_D#_63 H_DSTBP#_0
M8
CPU1_DSTBP0#
C12 H_DSTBP#_1
AA6 CPU1_DSTBP1#
CPU1_CPURST# E11
H_CPURST# H_DSTBP#_2
AE5
CPU1_DSTBP2#
CPU1_SLP# H_CPUSLP#
CFG H_DSTBP#_3 CPU1_DSTBP3#
NC CPU1_REQ#(4:0)
C5 B15 0
MCH1_HXSWING E3
H_SWING H_REQ#_0
K13 1
H_RCOMP H_REQ#_1
R81 24.9 1% F13 2
H_REQ#_2
B11 B13 3
MCH1_HVREF H_DVREF H_REQ#_3

VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
1608 A11 B14 4

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
H_AVREF H_REQ#_4
A8 B6
VTTLF

VTTLF_1 H_RS#_0 CPU1_RS0#


CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
AB2 F12
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9

L1
VTTLF_2 H_RS#_1
C8
CPU1_RS1#
VTTLF_3 H_RS#_2 CPU1_RS2#
470nF
470nF
470nF
16V
16V
16V

*POCAFEB-12 Only (Remove in MP Model)


T25
R25

AC29
AC30
AC32

AH32
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

AA29
AA30
AA32
AB30

AE29
AE30
AE32
AF30
AG29
AG30
AG32
AH29
AH30

AJ29
AJ32
AK23
AK24
AK25
AK26
AK28
AK29
AK30
AK32
AL26
AL28
AL29
AL30
AL32
AM30
AM32
U30
U32
V29
V30
W29
W30
W32
Y29
Y30
Y32
Current Setting (def. : default Option)
CFG# Low High P1.05V
C579
C110
C114

CPU1_BSEL0
A CFG(5) DMIx2 DMIx4 (def.) CPU1_BSEL1 A
CFG(6) iTPM Host Interface Enable iTPM Host Interface Disable (def.) CPU1_BSEL2
R93
CFG(7) ME Crypto no confidentiality ME Crypto confidentiality (def.) 2.2K
CFG(9) PEG Reversal (def.) Normal nostuff SAMSUNG

8_Block Diagram and Schematic_en8 8


CFG(10) PCIE Loop Back Enable PCIE Loop Back Disable(def)
iTPM option ELECTRONICS
CFG(16) Dynamic ODT Disabled Dynamic ODT Enabled (def.)
CFG(19) DMI Lane Normal (def.) DMI Lane Reversal
CFG(20) SDVO or PCIE X1 SDVO and PCIE X1
Only(def.) Simultaneously

4 3 2 1

SRP Sheet Number: 57 of 64

WWW.AliSaler.Com
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -

8. Block Diagram and Schematic

A
B
C
D

CRT3_RED
CRT3_GREEN
CRT3_BLUE

HDA3_HDMI_SDO
HDA3_HDMI_SDI2
HDA3_HDMI_RST#
HDA3_HDMI_SYNC
HDA3_HDMI_BCLK
LCD1_ACLK#
LCD1_ACLK
LCD1_ADATA2
LCD1_ADATA1
LCD1_ADATA0
LCD1_ADATA2#
LCD1_ADATA1#
LCD1_ADATA0#
LCD3_BRIT
MCH3_BKLTEN
MCH3_LCDVDDON
LCD3_EDID_DATA
LCD3_EDID_CLK
CRT3_VSYNC
CRT3_HSYNC
CRT3_DDCDATA
CRT3_DDCCLK

C127 0.012nF
C128 0.012nF
C129 0.012nF

R87 150 1%

Default : TV Disable
R86 150 1%

4
4

R139
R138

R89 150 1%

R136
R91
R90
R88

R561
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS

EXCEPT AS AUTHORIZED BY SAMSUNG.

R137
SAMSUNG ELECTRONICS CO’S PROPERTY.
THIS DOCUMENT CONTAINS CONFIDENTIAL

33
1.02kohm
40.2 1%
40.2 1%
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS

1%
1K
1%

75 1%
75 1%
75 1%

2.4K 1%

C29
B29
B30
A28
B28
E38
E37
B43
C44
B37
A37
K37
F37
G38
B42
J37
G37
H38
A41
C41
C40
B40
F40
D45
H48
A40
G40
E46
H47
L32
G32
M29
M33
M32
J33
K33
H24
K25
H25
F25
E32
C31
G29
E29
J28
G28
E28
L29
J29
J32
H32

TV_RTN

HDA_SDI
TVB_DAC
TVA_DAC

TVC_DAC
CRT_RED

HDA_SDO
LVDS_IBG
CRT_IRTN

L_VDD_EN

HDA_RST#
CRT_BLUE

HDA_BCLK
LVDS_VBG

HDA_SYNC
L_BKLT_EN

LVDSB_CLK
LVDSA_CLK
L_DDC_CLK
CRT_VSYNC
CRT_HSYNC

CRT_GREEN

L_CTRL_CLK

LVDSB_CLK#
LVDSA_CLK#

LVDS_VREFL
L_DDC_DATA

LVDS_VREFH
L_BKLT_CTRL
L_CTRL_DATA
CRT_DDC_CLK

CRT_TVO_IREF

LVDSB_DATA_3
LVDSB_DATA_2
LVDSB_DATA_1
LVDSB_DATA_0
LVDSA_DATA_3
LVDSA_DATA_2
LVDSA_DATA_1
LVDSA_DATA_0
TV_DCONSEL_1
TV_DCONSEL_0
CRT_DDC_DATA

LVDSB_DATA#_3
LVDSB_DATA#_2
LVDSB_DATA#_1
LVDSB_DATA#_0
LVDSA_DATA#_3
LVDSA_DATA#_2
LVDSA_DATA#_1
LVDSA_DATA#_0

IGFX_CORE
P1.05V

AD
TV VGA

2.5V
HDA LVDS

EC3
220uF
A43 H44
NC_1 PEG_RX#_0
A44 J46

20%
NC_2 PEG_RX#_1
A46 L44

C116
NC_3 PEG_RX#_2
A47 L40
NC_4 PEG_RX#_3

22000nF
A5 N41
NC_5 PEG_RX#_4
A6 P48
NC_6 PEG_RX#_5
B4 AE16 AA15 N44
NC_7 VCC_AXG_NCTF_8 VCC_AXG_1 PEG_RX#_6
B45 AE17 AA20 T43
PEG_RX#_7

6.3V
NC_8 VCC_AXG_NCTF_9 VCC_AXG_2
B47 AE19 AA21 U43

C136
NC_9 VCC_AXG_NCTF_10 VCC_AXG_3 PEG_RX#_8
B48 AF16 AA23 Y43

10000nF
NC_10 VCC_AXG_NCTF_11 VCC_AXG_4 PEG_RX#_9
BC1 AF17 AA24 Y48
NC_11 VCC_AXG_NCTF_12 VCC_AXG_5 PEG_RX#_10
BC48 AF19 AA25 Y36
NC_12 VCC_AXG_NCTF_13 VCC_AXG_6 PEG_RX#_11

C
BD1 AG16 AB15 AA43

3
3

NC_13 VCC_AXG_NCTF_14 VCC_AXG_7 PEG_RX#_12

6.3V
BD48 AG17 AB20 AD37

C115
1000nF
NC_14 VCC_AXG_NCTF_15 VCC_AXG_8 PEG_RX#_13
VGA1_HDMI_HPD#

BE2 AG19 AB23 AC47


NC_15 VCC_AXG_NCTF_16 VCC_AXG_9 PEG_RX#_14
BE47 AH16 AB25 AD39
NC_16 VCC_AXG_NCTF_17 VCC_AXG_10 PEG_RX#_15
BF1 AH17 AC20
NC_17 VCC_AXG_NCTF_18 VCC_AXG_11
BF3 AH19 AC21 H43

16V
NC_18 VCC_AXG_NCTF_19 VCC_AXG_12 PEG_RX_0
BF46 AJ16 J44

C140
AC23

470nF
NC_19 VCC_AXG_NCTF_20 VCC_AXG_13 PEG_RX_1
BF48 AJ19 AC24 L43
NC_20 VCC_AXG_NCTF_21 VCC_AXG_14 PEG_RX_2
a
BG1 AK16 AE15 L41

o
BG2
NC_21
AK17
VCC_AXG_NCTF_22 VCC_AXG_15
AE20
PEG_RX_3
N40

10V
NC_22 VCC_AXG_NCTF_23 VCC_AXG_16 PEG_RX_4
BG4 AK19 P47

C187
AE21

100nF
NC
NC_23 VCC_AXG_NCTF_24 VCC_AXG_17 PEG_RX_5
BG45 AK20 AE23 N43
NC_24 VCC_AXG_NCTF_25 VCC_AXG_18 PEG_RX_6
BG47 AK21 AE24 T42
NC_25 VCC_AXG_NCTF_26 VCC_AXG_19 PEG_RX_7
BG48 AL16 AE25 U42
NC_26 VCC_AXG_NCTF_27 VCC_AXG_20 PEG_RX_8
BH2 AL19 AF15 Y42

10V
NC_27 VCC_AXG_NCTF_28 VCC_AXG_21 PEG_RX_9
BH3 AL21 AF20 W47

C134
100nF
NC_28 VCC_AXG_NCTF_29 VCC_AXG_22 PEG_RX_10
BH43 AM16 AG15 Y37
NC_29 VCC_AXG_NCTF_30 VCC_AXG_23 PEG_RX_11
PCIE GFX

GFX VCC

n
BH44 AM17 AG21 AA42
NC_30 VCC_AXG_NCTF_31 VCC_AXG_24 PEG_RX_12
BH46 AM19 AH15 AD36
NC_31 VCC_AXG_NCTF_32 VCC_AXG_25 PEG_RX_13
BH47 AM20 AH20 AC48
NC_32 VCC_AXG_NCTF_33 VCC_AXG_26 PEG_RX_14
BH5 AM21 AJ15 AD40
m

NC_33 VCC_AXG_NCTF_34 VCC_AXG_27 PEG_RX_15


BH6 U16 AJ21
NC_34 VCC_AXG_NCTF_35 VCC_AXG_28
C3 U19 AL15 J41 C220 100nF
NC_35 VCC_AXG_NCTF_36 VCC_AXG_29 PEG_TX#_0
C46 U20 AM14 M46C226 100nF
NC_36 VCC_AXG_NCTF_37 VCC_AXG_30 PEG_TX#_1
2 OF 5

C48 U21 AM15 M47C227 100nF


U509-2

NC_37 VCC_AXG_NCTF_38 VCC_AXG_31 PEG_TX#_2


0 1 2 3

D2 V16 AN14 M40C223 100nF


NC_38 VCC_AXG_NCTF_39 VCC_AXG_32 PEG_TX#_3
D47 V17 M42
GFX VCC NCTF

T14
NC_39 VCC_AXG_NCTF_40 VCC_AXG_33 PEG_TX#_4
E1 V19 T16 R48
NC_40 VCC_AXG_NCTF_41 VCC_AXG_34 PEG_TX#_5
s

E48 V21 T17 N38


NC_41 VCC_AXG_NCTF_42 VCC_AXG_35 PEG_TX#_6
EB88CTGM

F1 V23 U14 T40


NC_42 VCC_AXG_NCTF_43 VCC_AXG_36 PEG_TX#_7
F48 V24 U15 U37
NC_43 VCC_AXG_NCTF_44 VCC_AXG_37 PEG_TX#_8
V25 V15 U40
VCC_AXG_NCTF_45 VCC_AXG_38 PEG_TX#_9
V26 Y15 Y40
VCC_AXG_NCTF_46 VCC_AXG_39 PEG_TX#_10
AH10 V28 Y21 AA46
RSVD_1 VCC_AXG_NCTF_47 VCC_AXG_40 PEG_TX#_11
AH12 W16 Y24 AA37
S fid

RSVD_2 VCC_AXG_NCTF_48 VCC_AXG_41 PEG_TX#_12


AH13 W17 Y26 AA40
RSVD_3 VCC_AXG_NCTF_49 VCC_AXG_42 PEG_TX#_13
AH9 W19 AD43
u

RSVD_4 VCC_AXG_NCTF_50 PEG_TX#_14


AK34 W20 AC46
RSVD_5 RSVD11 VCC_AXG_NCTF_51 PEG_TX#_15
AL34 W21
RSVD_6 RSVD10 VCC_AXG_NCTF_52
AM35 W23 J42 C221 100nF
RSVD_7 RSVD13 VCC_AXG_NCTF_53 PEG_TX_0
2 AN35 W24 AA16 L46 C225 100nF
2

RSVD_8 RSVD12 VCC_AXG_NCTF_54 VCC_AXG_NCTF_1 PEG_TX_1


AY21 W25 AA19 M48C229 100nF
RSVD_9 VCC_AXG_NCTF_55 VCC_AXG_NCTF_2 PEG_TX_2
0 1 2 3

B2 W26 AB16 M39C222 100nF


RSVD_10 VCC_AXG_NCTF_56 VCC_AXG_NCTF_3 PEG_TX_3
B31 W28 AB17 M43
RSVD_11 VCC_AXG_NCTF_57 VCC_AXG_NCTF_4 PEG_TX_4
ME Debug Port
RSVD

BF18 Y16 AB19 R47


RSVD_12 VCC_AXG_NCTF_58 VCC_AXG_NCTF_5 PEG_TX_5
BF23 Y17 AC16 N37
n

RSVD_13 VCC_AXG_NCTF_59 VCC_AXG_NCTF_6 PEG_TX_6


BG23 Y19 AC17 T39
GFX VCC NCTF

RSVD_14 VCC_AXG_NCTF_60 VCC_AXG_NCTF_7 PEG_TX_7


BH18 U36
RSVD_15 PEG_TX_8
K12 U39
RSVD_16 PEG_TX_9
M1 Y39
RSVD_17 PEG_TX_10
M36 Y46
RSVD_18 PEG_TX_11
n

N36 AA36
RSVD_19 PEG_TX_12
R33 AA39
RSVD_20 PEG_TX_13
T24 AD42
RSVD_21 PEG_TX_14
g

T33 AD46
RSVD_22 PEG_TX_15
t
PEG1_TXP(3:0)
PEG1_TXN(3:0)

#4
i
PCIE GFX

MISC PM ME CLK DMI


P3.3V

R142
a

TSATN#
ICH_SYNC#
CLKREQ#
SDVO_CTRLDATA
SDVO_CTRLCLK
RSTIN#
PWROK

DDPC_CTRLDATA
DDPC_CTRLCLK
PM_EXT_TS#_1
PM_EXT_TS#_0
THERMTRIP#
DPRSLPVR
PM_DPRSTP#
PM_SYNC#
CL_VREF
CL_RST#
CL_PWROK
CL_DATA
CL_CLK
PEG_CLK#
PEG_CLK
DPLL_REF_SSCLK#
DPLL_REF_SSCLK
DPLL_REF_CLK#
DPLL_REF_CLK
DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0
DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0
DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0
DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
GFX_VR_EN
GFX_VID_4
GFX_VID_3
GFX_VID_2
GFX_VID_1
GFX_VID_0
PEG_COMPO
PEG_COMPI

10K
l
B7

T20
F43
F41
F33
T36
T37

B12
K36
E36
P32
E43
E41
A38
B38
E33
B32
B33

H36
N28
N33
R32
R29
C34

G36
G33

M28
AJ35

AT11
AT40
AF46
AE44
AE46
AE43
AE35
AE48
AE38
AE40
AE47
AE37
AE41

AH34
AN36
AH36
AH37
AH43
AD35
AH42
AH40
AH39

R85
1%

R80
1608

100

R144

1
1

R146

R143
R92

56
R141
R145
R140
DMI1_TXP_3
DMI1_TXP_2
DMI1_TXP_1
DMI1_TXP_0
DMI1_TXN_3
DMI1_TXN_2
DMI1_TXN_1
DMI1_TXN_0

DMI1_RXP_3
DMI1_RXP_2
DMI1_RXP_1
DMI1_RXP_0
DMI1_RXN_3
DMI1_RXN_2
DMI1_RXN_1
DMI1_RXN_0

0
0
0
KBC3_PWRGD

P1.05V
CLK1_DREFCLK

10K
10K
CHP3_CL_CLK_0
CLK1_DREFCLK#

CLK1_MCH3GPLL

MCH3_CLKREQ#
nostuff
nostuff
CHP3_CL_RST_0#
CHP3_CL_DATA_0
CLK1_MCH3GPLL#
CLK1_DREFSSCLK

4.7K
49.9 1%

PLT3_RST#
CLK1_DREFSSCLK#

CPU1_DPRSTP#
CHP3_DPRSLPVR
CHP3_PM_SYNC#

KBC3_PWRGD

P3.3V
1%
1%
10V
C192
100nF

MCH3_CLKREQ#

MCH3_ICHSYNC#
MCH3_HDMI_CLK
P1.05V_PEG

P3.3V

MCH3_HDMI_DATA
P1.05V

1K

1%
1%

499
TP921

SAMSUNG
R148
R147

MCH3_EXTTS1#
MCH3_EXTTS0#
CPU1_THRMTRIP#

ELECTRONICS
A
B
C
D

SRP Sheet Number: 58 of 64

8-9

8_Block Diagram and Schematic_en9 9


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS PLACE EACH CAP NEAR AV42 PIN
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. MEM1_ADQ(63:0) MEM1_VREF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 C198 C233
100nF 100nF
10V 10V

AW36
AM38

AM44
AM42

AM11

AM13
AN38

AN43
AN44
AU40

AN41
AN39
AU44
AU42

BD43

BC40

BD38

BD13
AU11
BC11

AU13

BD12
BC12

AU10

AN10

AN12
AV39
AY44
BA40

AV41
AY43
BB41

AY37

AV37

AY38
BB38
AV36

BA12

AV13

BA11
AT38

AT36
R556 499 1%

AJ38
AJ41

AJ36
AJ40

AJ11
AJ12
AM5
BD9

AN8
AU5
AU6
BB9
BA9

AV9

AY8
BA6
AV5
AV7
AT9

AT5

AJ9
AJ8
nostuff
nostuff
D MEM1_ABS(2:0) 0 BD21 BF17
D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SA_BS_0 SM_REXT
1 BG18 AV42
2 AT25
SA_BS_1 SM_VREF MEM1_VREF SM_PWROK
SA_BS_2
BC36 DDR2 : GND
MEM1_ADM(7:0) 0 AM37
SM_DRAMRST#
AR36
SA_DM_0 SM_PWROK DDR3 : Connect to VRM.
1 AT41
SA_DM_1
2 AY41 BG16
3 AU39
SA_DM_2 SB_CAS#
AU17
MEM1_BCAS#
4 BB12
SA_DM_3 SB_RAS#
BF14
MEM1_BRAS#
SA_DM_4 SYSTEM MEMORY A SB_WE# MEM1_BWE#
5 AY6

g
SA_DM_5
6 AT7 AV16
7 AJ5
SA_DM_6 SB_CS#_0
AR13
MEM1_CS2#
SA_DM_7 SB_CS#_1 MEM1_CS3#
MEM1_ADQS#(7:0) 0 AJ43 BF15
1 AT43
SA_DQS#_0 SB_ODT_0
AY13
MEM1_ODT2

n
2 BA44
SA_DQS#_1 SB_ODT_1 MEM1_ODT3
SA_DQS#_2
3 BD37 AY36
SA_DQS#_3 SB_CKE_0 MEM1_CKE2

l
4 AY12 BB36
5 BD8
SA_DQS#_4 SB_CKE_1 MEM1_CKE3
SA_DQS#_5

u
6 AU9 AV24
7 AM8
SA_DQS#_6 SB_CK_0
AU24
CLK1_MCLK2
SA_DQS#_7 SB_CK#_0
AU20
CLK1_MCLK2#

a
MEM1_ADQS(7:0) 0 AJ44
SB_CK_1
AV20
CLK1_MCLK3
SA_DQS_0 SB_CK#_1 CLK1_MCLK3#
1 AT44
U509-3

s i
2 BA43
SA_DQS_1
AM47 0 MEM1_BDM(7:0)
SA_DQS_2 SB_DM_0
3 BC37 AY47 1
SA_DQS_3
EB88CTGM SB_DM_1

t
SYSTEM MEMORY A
4 AW12 BD40 2
SA_DQS_4 SB_DM_2
5 BC8 BF35 3
C 6 AU8
SA_DQS_5 SB_DM_3
BG11 4
C
SA_DQS_6
3 OF 5 SB_DM_4
- This Document can not be used without Samsung's authorization -

7 AM7 BA3 5
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

SA_DQS_7 SB_DM_5
AP1 6

m
MEM1_AMA(14:0) SB_DM_6

n
0 BA21 AK2 7
SA_MA_0 SB_DM_7
1 BC24
2 BG24
SA_MA_1
AL46 0
MEM1_BDQS#(7:0)
8. Block Diagram and Schematic

SA_MA_2 SB_DQS#_0
3 BH24 AV47 1

a
SA_MA_3 SB_DQS#_1

e
4 BG25 BH41 2
SA_MA_4 SB_DQS#_2
5 BA24 BH37 3
SA_MA_5 SB_DQS#_3
6 BD24 BG9 4
SA_MA_6 SB_DQS#_4
7 BG27 BC2 5

SYSTEM MEMORY B
SA_MA_7 SB_DQS#_5
8 BF25 AT2 6
SA_MA_8 SB_DQS#_6

S fid
9 AW24 AN5 7

8-10
SA_MA_9 SB_DQS#_7
10 BC21
11 BG26
SA_MA_10
AL47 0
MEM1_BDQS(7:0)
SA_MA_11 SB_DQS_0
12 BH26 AV48 1
SA_MA_12 SB_DQS_1
13 BH17 BG41 2
SA_MA_13 SB_DQS_2
14 AY25 BG37 3
SA_MA_14 SB_DQS_3
BH9 4
SB_DQS_4
BD20 BB2 5
MEM1_ACAS# BB20
SA_CAS# SB_DQS_5
AU1 6
MEM1_ARAS# AY20
SA_RAS# SB_DQS_6
AN6 7

n
MEM1_AWE# SA_WE# SB_DQS_7
BA17 AV17 0
MEM1_BMA(14:0)
MEM1_CS0# AY16
SA_CS#_0 SB_MA_0
BA25 1
MEM1_CS1# SA_CS#_1 SB_MA_1
BC25 2
SB_MA_2

o
BD17 AU25 3
MEM1_ODT0 AY17
SA_ODT_0 SB_MA_3
AW25 4
B MEM1_ODT1 SA_ODT_1 SB_MA_4
BB28 5 B
SB_MA_5
BC28 AU28 6
MEM1_CKE0 AY28
SA_CKE_0 SB_MA_6
AW28 7
P1.8V_AUX MEM1_CKE1 SA_CKE_1 SB_MA_7
AT33 8

C
SB_MA_8
AP24 BD33 9
CLK1_MCLK0 AR24
SA_CK_0 SB_MA_9
BB16 10
CLK1_MCLK0# AT21
SA_CK#_0 SB_MA_10
AW33 11
R95 CLK1_MCLK1 SA_CK_1 SYSTEM MEMORY B SB_MA_11
80.6 AR21 AY33 12
1% CLK1_MCLK1# SA_CK#_1 SB_MA_12
BH15 13
SB_MA_13
BG22 AU33 14
SM_RCOMP SB_MA_14
BH21
SM_RCOMP# MEM1_BBS(2:0)
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
BC16
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9

0
SB_BS_0
BF28 BB17 1
R96 SM_RCOMP_V_OH SB_BS_1
BH28 BB33 2
80.6 SM_RCOMP_V_OL SB_BS_2
1%
AH46

AU47
AU46

AR47

BC47
BC46
BC44

BC41

BH35

BH40

BH34
BH14

BH11

BH12
AK47

AP47
AP46
AJ46
AJ48
AM48
AP48

BA48
AY48
AT47

BA47

BG43
BF43
BE45

BF40
BF41
BG38
BF38

BG35

BG39
BG34

BG12

BG8

BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
P1.8V_AUX
Route as short as possible

R151 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
1K MEM1_BDQ(63:0)
1%

C143 C144
R150 10nF 2200nF
A 3.01K A
1%
SM_RCOMP : 20 ohm to VSS
Teenah SM_RCOMP# : 20 ohm to P1.8V_AUX
SAMSUNG

8_Block Diagram and Schematic_en10 10


R149 C201 C202 SM_RCOMP : 80 ohm to P1.5V_AUX ELECTRONICS
1K 10nF 2200nF Cantiga
1%
SM_RCOMP# : 80 ohm to VSS

4 3 2 1

SRP Sheet Number: 59 of 64

WWW.AliSaler.Com
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -

8. Block Diagram and Schematic

8-11

8_Block Diagram and Schematic_en11 11


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

AM12
AM34
AM36
AM39
AM41
AM43
AM46

AN11
AN13
AN16
AN21
AN29
AN37
AN40
AN42
AN47

AR25
AR28
AR33
AR46
AR48

AU16

AU21
AU36
AU38
AU41
AU43
AU48
AK15

AP21

AV10
AV12
AV25
AV28
AT10
AT12
AT17
AT20
AT24
AT28
AT37
AT39
AT42
AL33
AL48
AJ25
AJ28
AJ34
AJ37
AJ39
AJ42
AJ47

AM1

AM6
AM9

AN7
AN9

AR2

AU2

AU7
D D

AP2

AT6
AT8
AL3
AJ7
A12

VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_1
A15 AV3
VSS_2 VSS_136
A18 AV33
VSS_3 VSS_137
A20 AV40
VSS_4 VSS_138
A23 AV43
VSS_5 VSS_139
A29 VSS AV46
VSS_6 VSS_140
A31 AV6
VSS_7 VSS_141
A34 F38 M44 AV8
VSS_8 VSS_241 VSS_295 VSS_142
AA1 F44 M6 AW17
VSS_9 VSS_242 VSS_296 VSS_143
AA10 F46 N11 AW2
VSS_10 VSS_243 VSS_297 VSS_144
AA12 F5 N13 AW20
VSS_11 VSS_244 VSS_298 VSS_145
AA14 G11 N16 AW21
VSS_12 VSS_245 VSS_299 VSS_146

g
AA26 G13 N20 AW37
VSS_13 VSS_246 VSS_300 VSS_147
AA35 G16 N25 AW47
VSS_14 VSS_247 VSS_301 VSS_148
AA38 G21 N29 AY11
VSS_15 VSS_248 VSS_302 VSS_149
AA41 G24 N32 AY24
VSS_16 VSS_249 VSS_303 VSS_150
AA44 G25 N39 AY42

n
VSS_17 VSS_250 VSS_304 VSS_151
AA7 G41 N42 AY46
VSS_18 VSS_251 VSS_305 VSS_152
AB21
AB24
VSS_19
G47
G9
VSS_252 U509-5 VSS_306
N47
N7
VSS_153
AY7
B23

l
VSS_20 VSS_253 VSS_307 VSS_154
AB26
AB28
VSS_21
H1
H17
VSS_254 EB88CTGM VSS_308
P1
P28
VSS_155
B26
B34

u
VSS_22 VSS_255 VSS_309 VSS_156
AB33 H28 P3 B36
AB47
VSS_23
H29
VSS_256
5 OF 5 VSS_310
P33
VSS_157
B39

a
VSS_24 VSS_257 VSS_311 VSS_158
AC15 H33 P36 B41
VSS_25 VSS_258 VSS_312 VSS_159
AC2 H37 P46 B8
C C

s
VSS_26 VSS_259 VSS_313 VSS_160

i
AC25 H40 R17 B9
VSS_27 VSS_260 VSS_314 VSS_161
- This Document can not be used without Samsung's authorization -

AD12 H46 R21 BA13


- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VSS_28 VSS_261 VSS_315 VSS_162


AD2 H5 R24 BA16

t
VSS_29 VSS_262 VSS_316 VSS_163
AD38 J12 R3 BA2
VSS_30 VSS_263 VSS_317 VSS_164
AD41 J21 R46 BA20
VSS_31 VSS_264 VSS_318 VSS_165
AD44 J24 T29 BA28
8. Block Diagram and Schematic

VSS_32 VSS_265 VSS_319 VSS_166


AD47 J25 T35 BA33

m
VSS_33 VSS_266 VSS_320 VSS_167

n
AD5 J36 T38 BA38

VSS

VSS
VSS_34 VSS_267 VSS_321 VSS_168
AD9 J38 T41 BA46

VSS
VSS_35 VSS_268 VSS_322 VSS_169
AE10 J43 T44 BA5

VSS
VSS_36 VSS_269 VSS_323 VSS_170
AE13 J5 T47 BB11
VSS_37 VSS_270 VSS_324 VSS_171

a
AE2 J7 U24 BB25

e
VSS_38 VSS_271 VSS_325 VSS_172
AE28 K16 U25 BB37

8-12
VSS_39 VSS_272 VSS_326 VSS_173
AE34 K2 U28 BB40
VSS_40 VSS_273 VSS_327 VSS_174
AE36 K20 U29 BB47
VSS_41 VSS_274 VSS_328 VSS_175
AE39 K24 U35 BB8
VSS_42 VSS_275 VSS_329 VSS_176

S fid
AE42 K28 U38 BC13
VSS_43 VSS_276 VSS_330 VSS_177
AE7 K29 U41 BC17
VSS_44 VSS_277 VSS_331 VSS_178
AF2 K32 U44 BC20
VSS_45 VSS_278 VSS_332 VSS_179
AF21 L12 V46 BC3
VSS_46 VSS_279 VSS_333 VSS_180
AF24 L13 W15 BC33
VSS_47 VSS_280 VSS_334 VSS_181
AF26 L24 W34 BC38
VSS_48 VSS_281 VSS_335 VSS_182
AF34 L25 Y11 BC43
VSS_49 VSS_282 VSS_336 VSS_183
AF47 L33 Y2 BC9
VSS_50 VSS_283 VSS_337 VSS_184
AG20 L36 Y20 BD11
VSS_51 VSS_284 VSS_338 VSS_185
AG23 L39 Y23 BD25

n
VSS_52 VSS_285 VSS_339 VSS_186
AG28 L42 Y25 BD28
VSS_53 VSS_286 VSS_340 VSS_187
AH11 L47 Y28 BD36
VSS_54 VSS_287 VSS_341 VSS_188
B AH2
VSS_55
L5
VSS_288 VSS_342
Y35
VSS_189
BD41 B
AH21 L8 Y38 BD46
VSS_56 VSS_289 VSS_343 VSS_190
AH24 M10 Y41 BD6

o
VSS_57 VSS_290 VSS_344 VSS_191
AH26 M17 Y44 BE4
VSS_58 VSS_291 VSS_345 VSS_192
AH33 M2 Y47 BF12
VSS_59 VSS_292 VSS_346 VSS_193
AH35 M21 Y5 BF24
VSS_60 VSS_293 VSS_347 VSS_194
AH38 M41 Y8 BF26
VSS_61 VSS_294 VSS_348 VSS_195
AH41 BF34
VSS_62 VSS_196

C
AH44 TV & LVDS BF37
VSS_63 VSS VSS SCB VSS NCTF VSS VSS_197
AH5 BF44
VSS_64 VSS_198
AH8 BF9
VSS_65 VSS_199
AJ10 BG10
VSSA_DAC_BG

VSS_66 VSS_200
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
AJ13 BG13
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9

VSS_67 VSS_201
VSSA_LVDS

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5

AJ2 BG14
VSS_68 VSS_202
AJ20 BG15
VSS_349
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_69 VSS_203
AJ24 BG17
VSS_70 VSS_204
BG19
VSS_205
B25

J47

A3
A48
BH1
BH48
C1

AA17
AB29
AB32
AC19
AF29
AF32
AJ17
AJ30
AL17
AL20
AM29
U17
U23
U26
V20
V32

AJ6
BG21
BG28
BG33
BG36
BG40
BG42
BG6
BH23
BH25
BH38
BH8
C11
C14
C17
C20
C26
C28
C32
C37
C38
C43
C6
E13
E16
E24
E25
E40
E8
F20
F24
F28
F29
F3
F32
F36
A A

8_Block Diagram and Schematic_en12 12


SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 61 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. DDR SO-DIMM #0
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. Height : 5.2mm (Reverse)

D D

MEM1_ADQ(63:0)

P0.9V

DDR500-1

g
MEM1_AMA(14:0) 0 R109 56
DDR2-SODIMM-200P-RVS ME POWER RAIL UNDER ME ENABLE
1 R106 56
MEM1_AMA(14:0)
1/2 2 R115 56
0 102
A0 DQ0
5 0 3 R99 56
1 101 7 1 4 R108 56

n
A1 DQ1 P1.8V_AUX
2 100
A2 DQ2
17 2 5 R105 56
3 99
DQ3
19 3 6 R111 56
A3

l
4 98
DQ4
4 4 7 R156 56
A4
5 97
A5 DQ5
6 5 DDR500-2 8 R107 56

u
6 94
DQ6
14 6
DDR2-SODIMM-200P-RVS 9 R154 56
A6
7 92 16 7 10 R101 56
8 93
A7 DQ7
23 8 2/2 11 R158 56

a
A8 DQ8
9 91
A9 DQ9
25 9 112
VDD1 VSS16
18 12 R155 56
10 105 35 10 111 24 13 R114 56

s i
A10_AP DQ10 VDD2 VSS17
11 90
DQ11
37 11 117
VDD3 VSS18
41 14 R157 56
A11
12 89 20 12 96 53
A12 DQ12 P3.3V VDD4 VSS19

t
13 116 22 13 95 42 R112 56
A13 DQ13 VDD5 VSS20 MEM1_CS0#
C 14 86
A14 DQ14
36 14 118
VDD6 VSS21
54
MEM1_CS1# R104 56
C
84 38 15 81 59
A15 DQ15 VDD7 VSS22
R153
- This Document can not be used without Samsung's authorization -

85 43 16 82 65 56
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

MEM1_ABS(2) A16_BA2 DQ16 C104 VDD8 VSS23 MEM1_CKE0


45 17 C105 87 60 R159 56

m
DQ17 100nF VDD9 VSS24 MEM1_CKE1

n
107 55 18 2200nF 103 66
MEM1_ABS(0) BA0 DQ18 10V VDD10 VSS25
MEM1_ABS(1) 106
BA1 DQ19
57 19 88
VDD11 VSS26
127
MEM1_ODT0 R110 56
R102
8. Block Diagram and Schematic

44 20 104 139 56
110
DQ20 VDD12 VSS27
128
MEM1_ODT1
46 21

a
MEM1_CS0# S0* DQ21 VSS28

e
115 56 22 199 145 R98 56
MEM1_CS1# S1* DQ22
58 23
VDDSPD VSS29
165 MEM1_ABS(0) R116 56
DQ23 VSS30 MEM1_ABS(1)
30 61 24 83 171 R152 56
CLK1_MCLK0 32
CK0 DQ24
63 25 120
NC1 VSS31
172 MEM1_ABS(2)
CLK1_MCLK0# CK0* DQ25 NC2 VSS32
CLK1_MCLK1 164
CK1 DQ26
73 26
MCH3_EXTTS0#
50
NC3 VSS33
177
MEM1_ACAS# R100 56

S fid
166 75 27 69 187 R113 56

8-13
CLK1_MCLK1# CK1* DQ27 NC4 VSS34 MEM1_ARAS#
MEM1_CKE0 79
CKE0 DQ28
62 28 163
NCTEST VSS35
178
MEM1_AWE# R103 56
80 64 29 190
MEM1_CKE1 CKE1 DQ29
74 30 1
VSS36
9
DQ30
76
MEM1_VREF VREF VSS37
21
113 31
MEM1_ACAS# 108 CAS* DQ31
123 32 C271 C270 201
VSS38
33
MEM1_ARAS# 109
RAS* DQ32
125 33
100nF 2200nF
202
GND0 VSS39
155
MEM1_AWE# WE* DQ33
135 34
10V GND1 VSS40
34
DQ34 VSS41
R73 10K 1% 198
SA0 DQ35
137 35 47
VSS1 VSS42
132
R74 10K 1% 200 124 36 133 144

n
SA1 DQ36 VSS2 VSS43
197 126 37 183 156 Place one cap close to every 2 pull-up resistors terminated to P0.9V
SMB3_CLK 195
SCL DQ37
134 38 77
VSS3 VSS44
168
SMB3_DATA SDA DQ38
136 39 12
VSS4 VSS45
2
DQ39 VSS5 VSS46
114 141 40 48 3
MEM1_ODT0 ODT0 DQ40 VSS6 VSS47

o
119 143 41 184 15
MEM1_ODT1 ODT1 DQ41
151 42 78
VSS7 VSS48
27
B MEM1_ADM(7:0) DQ42
153 71
VSS8 VSS49
39 B
0 10 43
1 26
DM0 DQ43
140 44 72
VSS9 VSS50
149 Place one cap close to every 2 pull-up resistors terminated to P0.9V
DM1 DQ44 VSS10 VSS51 P0.9V
2 52 142 45 121 161
DM2 DQ45 VSS11 VSS52
3 67 152 46 122 28

C
DM3 DQ46 VSS12 VSS53
4 130 154 47 196 40
DM4 DQ47 VSS13 VSS54
5 147 157 48 193 138 nostuff
DM5 DQ48 VSS14 VSS55
6 170 159 49 8 150 C157 C209 C208 C153 C152 C151 C150 C154 C211 C158 C210 C156 C155 nostuff
DM6 DQ49 VSS15 VSS56
7 185 173 50 162 nostuff
DM7 DQ50 VSS57
175 51 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF nostuff
MEM1_ADQS(7:0) 0 13
DQ51
158 52
DQS0 DQ52 3709-001341 nostuff
1 31 160 53 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V nostuff
DQS1 DQ53
2 51 174 54
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57
6 169 189 58
DQS6 DQ58 ME POWER RAIL UNDER ME ENABLE
7 188 191 59
DQS7 DQ59
180 60 EMC Solution(’07.10.18)
MEM1_ADQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29
DQS*1 DQ62
192 62 Place near SO-DIMM0
2 49 194 63 nostuff nostuff P1.8V_AUX
DQS*2 DQ63
3 68 CONTACT-PLATE-EMI

EMI502
CONTACT-PLATE-EMI

EMI500
DQS*3 EMI

EMI
4 129
DQS*4
5 146 EC5
DQS*5 C207 C212 C149 C161
6 167
DQS*6 220uF C159 C206 C147 C148 C213 100nF 100nF 100nF 100nF
7 186 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF
DQS*7 AD 10V 10V 10V 10V

A 3709-001341 A
Tyco/Foxcn : 3709-001341
Suyin : 3709-001502
SAMSUNG

8_Block Diagram and Schematic_en13 13


ELECTRONICS

4 3 2 1

SRP Sheet Number: 62 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS DDR SO-DIMM #1
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Height : 9.2mm (Reverse)

D D

MEM1_BDQ(63:0) P0.9V
ME POWER RAIL UNDER ME ENABLE
MEM1_BMA(14:0) 0 R129 56
1 R117 56
2 R133 56

g
DDR501-1 3 R118 56
P1.8V_AUX 4 R134 56
DDR2-SODIMM-200P-RVS 5 R162 56
MEM1_BMA(14:0)
1/2 DDR501-2 6 R165 56
0 102 5 0
DDR2-SODIMM-200P-RVS 7 R132 56

n
A0 DQ0
1 101 7 1 8 R119 56
2 100
A1
A2
DQ1
DQ2
17 2 2/2 9 R160 56

l
3 99
A3 DQ3
19 3 112
VDD1 VSS16
18 10 R120 56
4 98
A4 DQ4
4 4 111
VDD2 VSS17
24 11 R166 56

u
5 97
A5 DQ5
6 5 117
VDD3 VSS18
41 12 R163 56
6 94
A6 DQ6
14 6 96
VDD4 VSS19
53 13 R126 56
7 92 16 7 P3.3V 95 42 14 R167 56

a
A7 DQ7 VDD5 VSS20
8 93 23 8 118 54
A8 DQ8 VDD6 VSS21
9 91 25 9 81 59 R127 56

s i
10 105
A9 DQ9
35 10 82
VDD7 VSS22
65 MEM1_CS2# R125 56
11 90
A10_AP DQ10
37 11 87
VDD8 VSS23
60
MEM1_CS3#
A11 DQ11 C106 VDD9 VSS24

t
12 89 20 12 C107 103 66 R164 56
A12 DQ12 100nF VDD10 VSS25 MEM1_CKE2
C 13 116
A13 DQ13
22 13
10V
2200nF 88
VDD11 VSS26
127
MEM1_CKE3 R168 56
C
14 86 36 14 104 139
A14 DQ14 VDD12 VSS27
R131
- This Document can not be used without Samsung's authorization -

84 38 15 128 56
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

A15 DQ15 VSS28 MEM1_ODT2


85 43 16 199 145 R124 56

m
MEM1_BBS(2) A16_BA2 DQ16 VDDSPD VSS29 MEM1_ODT3

n
45 17 165
DQ17 VSS30
MEM1_BBS(0) 107
BA0 DQ18
55 18 83
NC1 VSS31
171
MEM1_BBS(0) R121 56
106 57 19 120 172 R128 56
8. Block Diagram and Schematic

MEM1_BBS(1) BA1 DQ19 NC2 VSS32 MEM1_BBS(1)


44 20 50 177 R161 56

a
DQ20 MCH3_EXTTS1# NC3 VSS33 MEM1_BBS(2)

e
110 46 21 69 187
MEM1_CS2# 115
S0* DQ21
56 22 163
NC4 VSS34
178 R123 56
MEM1_CS3# S1* DQ22 NCTEST VSS35 MEM1_BCAS#
58 23 190 R130 56
30
DQ23
61 24 1
VSS36
9 MEM1_BRAS# R122 56
CLK1_MCLK2 32
CK0 DQ24
63 25
MEM1_VREF VREF VSS37
21
MEM1_BWE#
CLK1_MCLK2# CK0* DQ25 VSS38

S fid
164 73 26 201 33

8-14
CLK1_MCLK3 CK1 DQ26 C272 GND0 VSS39
CLK1_MCLK3# 166
CK1* DQ27
75 27
100nF C273 202
GND1 VSS40
155
79 62 28 2200nF 34
MEM1_CKE2 80
CKE0 DQ28
64 29
10V
47
VSS41
132
MEM1_CKE3 CKE1 DQ29
74 30 133
VSS1 VSS42
144
DQ30 VSS2 VSS43
113 76 31 183 156
P3.3V MEM1_BCAS# 108
CAS* DQ31
123 32 77
VSS3 VSS44
168
MEM1_BRAS# 109
RAS* DQ32
125 33 12
VSS4 VSS45
2
MEM1_BWE# WE* DQ33
135 34 48
VSS5 VSS46
3
DQ34 VSS6 VSS47
R76 10K 1% 198 137 35 184 15

n
SA0 DQ35 VSS7 VSS48
R75 10K 1% 200
SA1 DQ36
124 36 78
VSS8 VSS49
27
197 126 37 71 39
SMB3_CLK 195
SCL DQ37
134 38 72
VSS9 VSS50
149
SMB3_DATA SDA DQ38
136 39 121
VSS10 VSS51
161
DQ39 VSS11 VSS52

o
114 141 40 122 28
MEM1_ODT2 119
ODT0 DQ40
143 41 196
VSS12 VSS53
40
MEM1_ODT3 ODT1 DQ41 VSS13 VSS54 Place one cap close to every 2 pull-up resistors terminated to P0.9V
B 151 42 193 138 P0.9V B
MEM1_BDM(7:0) 0 10
DQ42
153 43 8
VSS14 VSS55
150
DM0 DQ43 VSS15 VSS56
1 26 140 44 162
DM1 DQ44 VSS57
2 52 142 45 C167 C177 C216 C166 C171 C215 C173 C217 C176 C169 C170 C165 C168 nostuff

C
DM2 DQ45 nostuff
3 67 152 46
nostuff
DM3 DQ46 3709-001529
4 130 154 47
nostuff
DM4 DQ47 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
5 147 157 48 nostuff
DM5 DQ48 nostuff
6 170 159 49 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
DM6 DQ49
7 185 173 50
DM7 DQ50
175 51
MEM1_BDQS(7:0) 0 13
DQ51
158 52
DQS0 DQ52
1 31 160 53
DQS1 DQ53
2 51 174 54
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57
DQS5 DQ57 P1.8V_AUX
6 169
DQS6 DQ58
189 58 Place near SO-DIMM1
7 188 191 59
DQS7 DQ59
180 60
MEM1_BDQS#(7:0) 0 11
DQ60
182 61
DQS*0 DQ61
1 29 192 62 EC6
DQS*1 DQ62 C218 C172 C174 C175
2 49
DQS*2 DQ63
194 63 220uF C162 C214 C163 C164 C160 100nF 100nF 100nF 100nF
3 68 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF
DQS*3 AD 10V 10V 10V 10V
4 129
DQS*4
5 146
DQS*5
6 167
DQS*6
7 186
DQS*7
A A
3709-001529

C&PSGO(MEKVEQERH7GLIQEXMGCIR
Foxcn : 3709-001529
Suyin : 3709-001503 SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 63 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

Internal VR Strap
INTVRMEN Pull up C312 Y2
VccSus1_05, VccSus1_5, VccCL1_5 0.007nF 32.768KHz
D VccLAN1_05, VccCL1_05 D
P3.3V

1
R198
10M R227 10K 1%
KBC3_CPURST#

4
KBC3_A20G R223 10K 1%
2801-003856
C311
0.007nF

g
U513-1
NH82801IBM
1/5

n
P3.3V_MICOM PRTC_BAT
C23 K5 0
LPC3_LAD(3:0)
RTCX1 FWH0_LAD0

l
C24 K4 1
PRTC_BAT RTCX2 FWH1_LAD1
L6 2
R678 FWH2_LAD2

u
A25 K2 3

2
1M
CHP3_RTCRST# 9-D4 18-B4 F20
RTCRST# FWH3_LAD3
R618

RTC
LPC
D515 CHP3_ME_RTCRST# C22
SRTCRST#
K3

a
18-B3 9-D4 330K 9-D4 18-C2
BAT54C CHP3_INTRUDER# CHP3_INTRUDER# 9-D4 18-B3
INTRUDER# FWH4_LFRAME# LPC3_LFRAME#
3 C694 5%
B22 J3 P1.05V

s i
1000nF INTVRMEN LDRQ0#
A22 J1
1

LAN100_SLP LDRQ1#_GPIO23

t
E25 N7 R608
GLAN_CLK A20GATE
AJ27
KBC3_A20G
C A20M# CPU1_A20M# 56 C
C13
R649 20K 1% LAN_RTCSYNC
- This Document can not be used without Samsung's authorization -

AJ25
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

CHP3_RTCRST# F14
DPRSTP#
AE23
CPU1_DPRSTP#

m
18-B4 9-D4
LAN_RXD0 DPSLP# CPU1_DPSLP#

n
R648 G13
LAN_RXD1 R610 56
D14 AJ26

LAN / GLAN
0 LAN_RXD2 FERR# CPU1_FERR#
8. Block Diagram and Schematic

R650 20K 1% D13 AD22

a
BATT500 CHP3_ME_RTCRST# LAN_TXD0 CPUPWRGD CPU1_PWRGDCPU

e
18-C2 9-D4 D12
C99203-1030N-L LAN_TXD1
E13 AF25
1
LAN_TXD2 IGNNE# CPU1_IGNNE#

CPU
PWR1
2 R647 1K C666 C665 C616 B10 AE22
PWR2 1000nF 1000nF 10000nF GLAN_DOCK#_GPIO56 INIT# CPU1_INIT#
3
HDA3_AUD_BCLK R680 22.6 1% AG25
GND 6.3V 6.3V 6.3V INTR CPU1_INTR

S fid
R681 22.6 1% P1.5V B28 L3 P1.05V

8-15
HDA3_MDC_BCLK GLAN_COMPI RCIN# KBC3_CPURST#
4309-001022 nostuff nostuff HDA3_HDMI_BCLK R682 22.6 1% R589 24.9 1% B27
GLAN_COMPO
nostuff R687 22.6 1% AF23
RTC Battery Holder HDA3_AUD_SYNC 1608 NMI CPU1_NMI
R686 22.6 1% AF6 AF24 R607
CR203 : 4301-000108 For RTC Reset HDA3_MDC_SYNC HDA_BIT_CLK SMI# CPU1_SMI#
R688 22.6 1% AH4 56
HDA3_HDMI_SYNC R651 22.6 1%
HDA_SYNC
AH27
HDA3_HDMI_RST# STPCLK# CPU1_STPCLK#
HDA3_AUD_RST# R679 22.6 1% AE7
HDA_RST#
R652 22.6 1% AG26 R586 0
HDA3_MDC_RST# THRMTRIP# CPU1_THRMTRIP#
HDA3_AUD_SDI0 AF4
HDA_SDIN0 R612 54.9 1%
AG4 AG27

n
HDA3_MDC_SDI1 HDA_SDIN1 PECI

IHDA
AH3 Place 56 ohm resistor within 2" of ICH9M
HDA3_HDMI_SDI2 AE5
HDA_SDIN2
P3.3V HDA_SDIN3 Place PU resistor within 2" of 56ohm res.
HDA3_AUD_SDO R683 22.6 1% AG5
HDA_SDOUT

o
R684 22.6 1% AH11
HDA3_MDC_SDO SATA4RXN
R221 HDA3_HDMI_SDO R685 22.6 1% AG7
HDA_DOCK_EN#_GPIO33 SATA4RXP
AJ11
B 10K AE8
HDA_DOCK_RS#_GPIO34 SATA4TXN
AG12 B
1% AF12
SATA4TXP
AG8
CHP3_SATALED# SATALED#
AH9

C
SATA5RXN
SAT1_RXN0 C325 10nF 25V AJ16
SATA0RXN SATA5RXP
AJ9
C322 10nF 25V AH16 AE10

SATA
SAT1_RXP0 AF17
SATA0RXP SATA5TXN
AF10
SAT1_TXN0 SATA0TXN SATA5TXP

SATA
C302 10nF 25V AG17
SAT1_TXP0 C327 10nF 25V
SATA0TXP
AH18
AH13
SATA_CLKN
AJ18
CLK1_SATA#
SAT1_RXN1 C324 10nF 25V AJ13
SATA1RXN SATA_CLKP CLK1_SATA
SAT1_RXP1 SATA1RXP
SAT1_TXN1 C323 10nF 25V AG14
SATA1TXN SATARBIAS#
AJ7
C326 10nF 25V AF14 AH7
SAT1_TXP1 SATA1TXP SATARBIAS
C328 10nF 25V

R689
24.9
1%
SATA Cap. Place ment :
Distance b/w the ICH9-M & cap on the "P" signal should be identical
distance b/w the ICH9-M & cap on the "N" signal same pair.

A A

SAMSUNG

8_Block Diagram and Schematic_en15 15


ELECTRONICS

4 3 2 1

SRP Sheet Number: 30 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D
U513-2 P3.3V
NH82801IBM
2/5
D11
AD0 REQ0#
F1 10K R710
C8 PCI G4
AD1 GNT0#
D9 B6
AD2 REQ1#_GPI050
E12
AD3 GNT1#_GPIO51
A7 R709
E9 F13 1K

g
AD4 REQ2#_GPIO52
C9 F12 1%
AD5 GNT2#_GPIO53
E10 E6
AD6 REQ3#_GPIO54
B7 F6
AD7 GNT3#_GPIO55
C7
AD8
C5 D8

n
AD9 C_BE0#
G11 B4
AD10 C_BE1#
F8 D6
AD11 C_BE2#

l
F11 A5
AD12 C_BE3#
E7
AD13

u
A3
AD14 IRDY#
D3 10K R713
D2 E3
AD15 PAR
F10 R1

a
AD16 PCIRST#
D5
AD17 DEVSEL#
C6 R234 10K
D10 E4 R711 10K

s i
AD18 PERR#
B3
AD19 PLOCK#
C2 R714 10K
F7
AD20 SERR#
J4 R228 10K

t
C3
AD21 STOP#
A4 R235 10K
C F3
AD22 TRDY#
F5 R230 10K
C
F4
AD23 FRAME#
D7 R232 10K
- This Document can not be used without Samsung's authorization -

C1
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AD24
G7 C14

m
AD25 PLTRST# PLT3_RST_ORG#

n
H7 D4
D1
AD26 PCICLK
R2
CLK3_PCLKICH
AD27 PME#
G5
8. Block Diagram and Schematic

P3.3V AD28
H6

a
AD29

e
G1
AD30
H3
P3.3V AD31
Boot BIOS Select
R229 10K J5
PIRQA# PIRQE#_GPIO2
H4
R712 10K E1 Interrupt I/F K6 BIOS PCI3_GNT0# SPI3_CS1#
PIRQB# PIRQF#_GPIO3

S fid
R231 10K J6 F2

8-16
PIRQC# PIRQG#_GPIO4
R224 10K
CHP3_SERIRQ R233 10K C4
PIRQD# PIRQH#_GPIO5
G2 LPC HIGH HIGH
R226 10K N29 E29 SPI LOW HIGH
PCI3_CLKRUN# PEX1_MINIRXN1 N28
PERN1 PCI - Express PERN5
E28
PEX1_MINIRXP1 C290 100nF 10V P27
PERP1 PERP5
F27 PCI HIGH LOW
PEX1_MINITXN1 PETN1 PETN5 P3.3V
PEX1_MINITXP1 C291 100nF 10V P26
PETP1 PETP5
F26
LPC option ; These are used with LPC
L29 C29
PERN2 PERN6_GLAN_RXN
L28 C28

n
PERP2 PERP6_GLAN_RXP
M27 D27 R193
PETN2 PETN6_GLAN_TXN
M26 D26 1K
PETP2 PETP6_GLAN_TXP P3.3V
1%
J29 nostuff iTPM Disable
PEX1_EXPCARDRXN3 PERN3

o
J28
PEX1_EXPCARDRXP3 PERP3
PEX1_EXPCARDTXN3 C292 100nF 10V K27 PETN3 R188
B PEX1_EXPCARDTXP3
C293 100nF 10V K26 PETP3
SPI
SPI_CLK
D23 R197 12.1 1%
SPI3_CLK 10K
B
D24 R620 12.1 1%
G29
SPI_CS0#
F23
SPI3_CS0#
PEX1_GLAN_RXN4 G28
PERN4 SPI_CS1#_GPIO58_CLGPIO6
D25 R619 12.1 1%

C
PEX1_GLAN_RXP4 PERP4 SPI_MOSI SPI3_MOSI
PEX1_GLAN_TXN4 100nF C294 10V H27
PETN4 SPI_MISO
E23
SPI3_MISO
100nF C295 10V H26
PEX1_GLAN_TXP4 PETP4

AC caps : PCIE need to be within 250mils of the driver


P3.3V_AUX
Resistor for Test : Place Stuffing Option to minimize stubs
nostuff

U514
5 7SZ08
1 +
PLT3_RST_ORG# 4
2
PLT3_RST#
-
3
R617
100K
1%

R616 0
A A

SAMSUNG

8_Block Diagram and Schematic_en16 16


ELECTRONICS

4 3 2 1

SRP Sheet Number: 31 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_AUX P3.3V_AUX

R207
U513-3
NH82801IBM

2.2K
2.2K
10K
1%
P3.3V_AUX 3/5
D P3.3V_AUX G16 V27
D
SMB3_CLK A13
SMBCLK DMI0RXN
V26
DMI1_RXN_0
SMB3_DATA SMBDATA DMI0RXP DMI1_RXP_0
R208 10K E17 U29

R199
R209

SMB
SMB3_ALERT# C17
LINKALERT#_GPIO60_CLGPIO4 DMI0TXN
U28 DMI1_TXN_0
R192 B18
SMLINK0 DMI0TXP DMI1_TXP_0
P3.3V_AUX 10K SMLINK1
R196 1K 1% Y27
PEX3_WAKE# 1% F19
DMI1RXN
Y26
DMI1_RXN_1
RI# DMI1RXP
W29
DMI1_RXP_1
R4
DMI1TXN
W28
DMI1_TXN_1
R191 CHP3_SUSSTAT# SUS_STAT#_LPCPD# DMI1TXP DMI1_TXP_1

Direct Media Interface


10K G19

g
1% ITP3_DBRRESET# SYS_RESET#
AB27 P3.3V
M6
DMI2RXN
AB26
DMI1_RXN_2
CHP3_PM_SYNC# PMSYNC#_GPIO0 DMI2RXP
AA29 DMI1_RXP_2
A17
DMI2TXN
AA28
DMI1_TXN_2
P3.3V_AUX SMB3_ALERT# SMALERT#_GPIO11 DMI2TXP DMI1_TXP_2 R591

n
3.24K
A14 AD27 1%

SYS GPIO
CHP3_PCISTP# E19
STP_PCI#_GPIO15 DMI3RXN
AD26
DMI1_RXN_3
CHP3_CPUSTP# STP_CPU#_GPIO25 DMI3RXP DMI1_RXP_3

l
R194 AC29
P3.3V L4
DMI3TXN
AC28
DMI1_TXN_3 C646
10K PCI3_CLKRUN# CLKRUN#_GPIO32 DMI3TXP DMI1_TXP_3 100nF R590

u
1% 453
R195 0 10V
E20 T26 1%
PEX3_WAKE# M5
WAKE# DMI_CLKN
T25
CLK1_PCIEICH# P1.5V

a
CHP3_SERIRQ AJ23
SERIRQ DMI_CLKP CLK1_PCIEICH
nostuff THM3_ALERT# THRM#
R611 10K 1% nostuff AF29

s i
CHP3_BIOSWP# D21
DMI_ZCOMP
AF28 R587 24.9
VRM3_CPU_PWRGD VRMPWRGD DMI_IRCOMP
nostuff 1% 1608
R225 10K 1%

t
A20 F24
AUD3_SPKR PU : No Reboot Mode TP8 CL_CLK0
B19
CHP3_CL_CLK_0
C C16
CL_CLK1 C
R656 4.7K CHP3_SLPS3# SLP_S3#
- This Document can not be used without Samsung's authorization -

E16 F22
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

SMB3_DATA P3.3V_AUX CHP3_SLPS4# G17


SLP_S4# CL_DATA0
C19
CHP3_CL_DATA_0

m
CHP3_SLPS5# SLP_S5# CL_DATA1

n
R206 4.7K C10 C25

Controller Link
SMB3_CLK S4_STATE#_GPIO26 CL_VREF0
8. Block Diagram and Schematic

G20 A19
KBC3_PWRGD PWROK CL_VREF1

a e
R222 M2 F21
R627 100 1% CHP3_DPRSLPVR R655 10K B13
DPRSLPVR_GPIO16 CL_RST0#
D18 CHP3_CL_RST_0#
10K

Power MGT
BATLOW# CL_RST1#
1% 1%
R3 A16
Q517 KBC3_PWRBTN# D20
PWRBTN# MEM_LED_GPIO24
C18
LAN_RST# ALERT#_GPIO10 CHP3_SUSPWR_ACK
MMBT3906LT1

S fid
C11

8-17
NETDETECT_GPIO14 KBC3_AC_PRESENT
D22 C20
KBC3_RSMRST# R5
RSMRST# WOL_EN_GPIO9 CHP3_WOL_EN
2

3
9-B4
47-C3
18-D3
CLK3_PWRGD CK_PWRGD
AC5
R624 USBP0N USB3_P0-
1
10K R6 AC4
nostuff 1% KBC3_PWRGD CLPWROK USBP0P
AD3 USB3_P0+
USBP1N USB0 and 6 ports should be
B16 AD2
SLP_M# USBP1P connected with external ports
AC1
AG19
USBP2N
AC2
USB3_P2-
KBC3_EXTSMI# AH21
TACH1_GPIO1 USBP2P
AA5
USB3_P2+

n
P3.3V_AUX CHP3_BIOSWP# AG21
TACH2_GPIO6 EHCI0 USBP3N
AA4 USB3_P3-
1

P3.3V KBC3_RUNSCI# A21


TACH3_GPIO7 USBP3P
AB2
USB3_P3+
D517 KBC3_WAKESCI# C12
GPIO8 USBP4N
AB3 USB3_P4-
3

BAV99LT1 C21
LANPHYPC_GPIO12 USBP4P
AA1
USB3_P4+
ENGDET_GPIO13 USBP5N USB3_P5-

o
R626 AE18 AA2
TACH0_GPIO17 USBP5P USB3_P5+
4.7K R706 K1 W5
2

B CHP3_GPIO18 AF8
GPIO18 USBP6N
W4
USB3_P6- B
TP951 10K CHP3_GPIO20 GPIO20 USBP6P USB3_P6+
1% AJ22 Y3
CHP3_BIOS_CRI# A9
SCLOCK_GPIO22 USBP7N
Y2

GPIO
1

QRT_STATE0_GPIO27 USBP7P
SATA_PWR_EN0# D19 W1

C
D516 C669 CHP3_SATACLKREQ# SATA_PWR_EN1# L1
QRT_STATE1_GPIO28 USBP8N
W2
USB3_P8-
USB3_P8+
3

BAV99LT1 47nF CHP3_SATACLKREQ# SATACLKREQ#_GPIO35 USBP8P


AE19 V2
50V
P3.3V SLOAD_GPIO38 EHCI1 USBP9N
R614 10K 1% AG22 V3

USB
SDATAOUT0_GPIO39 USBP9P
nostuff R613 10K 1% AF21 U5
2

nostuff AH24
SDATAOUT1_GPIO48 USBP10N
U4 USB3_P10-
R625 nostuff GPIO49 USBP10P USB3_P10+
2.2K nostuff R654 10K 1% A8
GPIO57_CLGPIO5 USBP11N
U1
nostuff iTPM Disable nostuff
USBP11P
U2
M7 USB0, 6 : Rear Port
AUD3_SPKR AJ24
SPKR
N4
MCH3_ICHSYNC# B21
MCH_SYNC# OC0#_GPIO59
N5 USB2 : Left Port
TP3 OC1#_GPIO40

MISC
AH20 N6 USB3 : Right Port(Sub board)
P3.3V PWM0 OC2#_GPIO41
AJ20 P6 USB4 : Express USB
PWM1 OC3#_GPIO42
AJ21 M1 USB5 : Bluetooth
PWM2 OC4#_GPIO43
N2
P3.3V OC5#_GPIO29 USB8 : Camera
H1 M4
CLK3_ICH14 AF3
CLK14 OC6#_GPIO30
M3 USB10 : 2-in-1

Clocks
R708 R653 CLK3_USB48 CLK48 OC7#_GPIO31
N3
OC8#_GPIO44 P3.3V
10K 10K R609 P1 N1
SUSCLK OC9#_GPIO45
1% 1% P5
10K P3.3V OC10#_GPIO46
nostuff AH23
SATA0GP_GPIO21 OC11#_GPIO47
P3 R705 1K 1% Int GFX Select
nostuff AF19
SATA1GP_GPIO19

GPIO
SATA
CHP3_GPIO18 CHP3_BIOS_CRI# R615 10K 1% AE21
SATA4GP_GPIO36 USBRBIAS
AG2
R190 10K 1% AD20 AG1 R702 22.6 1%
CHP3_GPIO20 SATA5GP_GPIO37 USBRBIAS#
A nostuff A
R564 nostuff
0

C&PSGO(MEKVEQERH7GLIQEXMGCIR
R707 R690
10K
1%
10K
1%
nostuff
SAMSUNG
BIOS CRISIS RECOVER STRAP ELECTRONICS
nostuff
nostuff
PLACE NEAR KEYBOARD
( Put it a debugger connector)

4 3 2 1

SRP Sheet Number: 32 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL

AD25
AD24
AC25
AC24
AE29
AE28
AE27
AE26
AE25

AB25
AB24
AA25
AA24
PROPRIETARY INFORMATION THAT IS

G25
H24

F25
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. H25

VCC1_5_B_16
VCC1_5_B_15
VCC1_5_B_14
VCC1_5_B_13
VCC1_5_B_12
VCC1_5_B_11
VCC1_5_B_10
VCC1_5_B_09
VCC1_5_B_08
VCC1_5_B_07
VCC1_5_B_06
VCC1_5_B_05
VCC1_5_B_04
VCC1_5_B_03
VCC1_5_B_02
VCC1_5_B_01
VCC1_5_B_17
J24
VCC1_5_B_18
J25
VCC1_5_B_19 P1.05V
K24
VCC1_5_B_20
K25
P1.5V VCC1_5_B_21
L23
330ohm@100MHz VCC1_5_B_22
L24
D L25
VCC1_5_B_23 C335 C331 D
B25 VCC1_5_B_24 100nF 100nF
BLM18PG181SN1 M24 A15
VCC1_5_B_25 VCC1_05_01 10V 10V
M25 B15
VCC1_5_B_26 VCC1_05_02
EC17 N23 C15
C630 C631 VCC1_5_B_27 VCC1_05_03
220uF C632 N24 D15
22000nF 22000nF 2200nF N25
VCC1_5_B_28 VCC1_05_04
E15
2.5V
AD 20% 20% VCC1_5_B_29 VCC1_05_05 P1.5V
P24 F15
VCC1_5_B_30 VCC1_05_06
P25 L11 L507
VCC1_5_B_31 VCC1_05_07
nostuff R24 L12 1.0uH
PRTC_BAT VCC1_5_B_32 VCC1_05_08
R25 L14 nostuff

g
VCC1_5_B_33 VCC1_05_09
R26 L16
VCC1_5_B_34 VCC1_05_10 C634
R27 L17 C633

VCCA3GP
VCC1_5_B_35 VCC1_05_11 10000nF
T24 L18 10nF
C647 C648 VCC1_5_B_36 VCC1_05_12 6.3V B519
Need switched P5V_ALW controled by alws_on 100nF 100nF
T27
VCC1_5_B_37 VCC1_05_13
M11
BLM18PG181SN1

CORE
T28 M18

n
10V 10V VCC1_5_B_38 VCC1_05_14
T29 P11
P5.0V_AUX P3.3V_AUX VCC1_5_B_39 VCC1_05_15
U24 P18
P5.0V P3.3V VCC1_5_B_40 VCC1_05_16 P1.05V

l
U25 T11 B27

2
VCC1_5_B_41 VCC1_05_17
V24 T18 BLM18PG181SN1
VCC1_5_B_42 VCC1_05_18

u
V25 U11

BAT54A

BAT54A
VCC1_5_B_43 VCC1_05_19
U23 U18

D518
R691
3

3
R704 C304

D13
VCC1_5_B_44 VCC1_05_20
W24 V11

a
12.1 100 VCC1_5_B_45 VCC1_05_21 4700nF
1% 1
1% W25 V12

1
VCC1_5_B_46 VCC1_05_22 10V
K23 V14

s i
VCC1_5_B_47 VCC1_05_23
C719
Y24
VCC1_5_B_48 U513-4 VCC1_05_24
V16 P1.05V
C699 Y25
VCC1_5_B_49 VCC1_05_25
V17
100nF

t
1000nF V18
C A23
VCCRTC
NH82801IBM VCC1_05_26
C305 C306 C668 C
100nF 100nF 4700nF
4/5
- This Document can not be used without Samsung's authorization -

A6 R29
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

V5REF VCCDMIPLL 10V 10V 10V

m n
P1.5V

DMI
AE1 W23
V5REF_SUS VCC_DMI_1
Y23
L508 10uH nostuff VCC_DMI_2
AJ19
8. Block Diagram and Schematic

VCSATAPLL
AB23

a
C644 C645 V_CPU_IO_1 P3.3V

e
AC16 AC23
10000nF 1000nF VCC1_5_A_01 V_CPU_IO_2
B520 AD15
6.3V 6.3V VCC1_5_A_02
BLM18PG181SN1 C330 AD16
VCC1_5_A_03 VCC3_3_01
AG29
1000nF AE15
AF15
VCC1_5_A_04
AJ6
C696 C289

ARX
VCC1_5_A_05 VCC3_3_02 100nF 100nF

S fid
AG15 P3.3V

8-18
VCC1_5_A_06 10V 10V
AH15 AC10
P1.5V VCC1_5_A_07 VCC3_3_07
AJ15
VCC1_5_A_08
AD19

VCCP CORE
AC11
VCC3_3_03
AF20
C303 C301
VCC1_5_A_09 VCC3_3_04 100nF 100nF
AD11 AG24
VCC1_5_A_10 VCC3_3_05 P3.3V 10V 10V
C667 AE11
VCC1_5_A_11 VCC3_3_06
AC20
1000nF AF11
VCC1_5_A_12

ATX
AG10 B9
VCC1_5_A_13 VCC3_3_08 P1.5V
AG11 F9

n
AH10
VCC1_5_A_14 VCC3_3_09
G3 C349 C348 C336
VCC1_5_A_15 VCC3_3_10 100nF 100nF 100nF
AJ10 G6

PCI
VCC1_5_A_16 VCC3_3_11 10V 10V 10V
J2
VCC3_3_12
AC9 J7
VCC1_5_A_17 VCC3_3_13

o
K7 nostuff nostuff
AC18
VCC3_3_14 C698
P1.5V VCC1_5_A_18 P1.5V_AUX 100nF
B AC19
VCC1_5_A_19 VCCHDA
AJ4
10V
B

HDA
LOGIC_IO
AC21 AJ3
VCC1_5_A_20 VCCSUSHDA
G10

C
C695 VCC1_5_A_21
AC8
C697
100nF VCCSUS1_05_1 100nF
G9 F17
10V VCC1_5_A_22 VCCSUS1_05_2 10V
AC12
VCC1_5_A_23
AD8
VCCSUS1_5_1
AC13 F18
AC14
VCC1_5_A_24 VCCSUS1_5_2 C309
VCC1_5_A_25 100nF
A18
VCCSUS3_3_01 10V

VCCPSUS
AJ5 D16 P3.3V_AUX
VCCUSBPLL VCCSUS3_3_02
D17
VCCSUS3_3_03
AA7 E22
VCC1_5_A_26 VCCSUS3_3_04
USB CORE

C329 AB6
AB7
VCC1_5_A_27
G22 C314 C313
100nF VCC1_5_A_28 VCCCL1_05 100nF 100nF

CONTROL LINK
10V AC6
P3.3V VCC1_5_A_29 10V 10V
AC7 G23
VCC1_5_A_30 VCCCL1_5 C307
C310 100nF
A10
VCCLAN1_05_1 VCCCL3_3_1
A24
100nF
C308 10V
C337 A11 B24 1000nF
C338 VCCLAN1_05_2 VCCCL3_3_2 10V
100nF
LAN

100nF 10V
A12
P1.5V 10V VCCLAN3_3_1 P3.3V
B12 nostuff
VCCLAN3_3_2 VCCPUSB nostuff
A27
VCCGLANPLL
GLAN POWER

D28
VCCSUS3_3_20
VCCSUS3_3_19
VCCSUS3_3_18
VCCSUS3_3_17
VCCSUS3_3_16
VCCSUS3_3_15
VCCSUS3_3_14
VCCSUS3_3_13
VCCSUS3_3_12
VCCSUS3_3_11
VCCSUS3_3_10
VCCSUS3_3_09
VCCSUS3_3_08
VCCSUS3_3_07
VCCSUS3_3_06
VCCSUS3_3_05

A D29
VCCGLAN1_5_1 A
VCCGLAN1_5_2
E26
P1.5V VCCGLAN1_5_3
E27
VCCGLAN1_5_4
SAMSUNG

8_Block Diagram and Schematic_en18 18


P3.3V_AUX
A26
VCCGLAN3_3
ELECTRONICS
P3.3V
C333 C332 C334
T7
Y7
Y6
W7
W6
V7
V6
U7
U6
T6
T5
T4
T3
T2
T1
AF1

22nF 22nF 100nF


25V 25V 10V

4 3 2 1

SRP Sheet Number: 33 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

AC22

M12
M13
M14
M15
M16
M17
M23
M28
M29
D D

H29

N11
N12
N13
K28
K29
L13
L15

L26
L27
J23
J26
J27
H5

L2

L5
L7
AA26 N14

VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
AA27 VSS_001 VSS_133
N15
VSS_002 VSS_134
AA3 N16
VSS_003 VSS_135
AA6 N17
VSS_004 VSS_136
AB1 N18
VSS_005 VSS_137
AA23 N26
VSS_006 VSS_138
AB28 N27
VSS_007 VSS_139
AB29 P12

g
VSS_008 VSS_140
AB4 P13
AB5
VSS_009 GND VSS_141
P14
VSS_010 VSS_142
AC17 P15
VSS_011 VSS_143
AC26 P16
VSS_012 VSS_144
AC27 P17

n
VSS_013 VSS_145
AC3 P2
VSS_014 VSS_146
AD1 P23
VSS_015 VSS_147

l
AD10 P28
VSS_016 VSS_148
AD12 P29
VSS_017 VSS_149

u
AD13 P4
VSS_018 VSS_150
AD14 P7
VSS_019 VSS_151
AD17 R11

a
VSS_020 VSS_152
AD18 R12
VSS_021 VSS_153
AD21 R13

s i
VSS_022 VSS_154
AD28 R14
VSS_023 VSS_155
AD29 R15
VSS_024 VSS_156

t
AD4 R16
VSS_025 VSS_157
AD5 R17
C AD6
VSS_026 VSS_158
R18
C
VSS_027 VSS_159
- This Document can not be used without Samsung's authorization -

AD7 R28
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VSS_028 VSS_160
AD9 T12

m
VSS_029 VSS_161

n
AE12 T13
VSS_030 VSS_162
AE13 T14
VSS_031 VSS_163
AE14
8. Block Diagram and Schematic

T15
VSS_032 VSS_164
AE16 T16

a
VSS_033 VSS_165

e
AE17 T17
VSS_034 VSS_166
AE2
VSS_035 U513-5 VSS_167
T23
AE20 B26
VSS_036 VSS_168
AE24 U12
AE3
VSS_037
VSS_038
NH82801IBM VSS_169
VSS_170
U13

S fid
AE4 U14
5/5

8-19
VSS_039 VSS_171
AE6 U15
VSS_040 VSS_172
AE9 U16
VSS_041 VSS_173
AF13 U17
VSS_042 VSS_174
AF16 AD23
VSS_043 VSS_175
AF18 U26
VSS_044 VSS_176
AF22 U27
VSS_045 VSS_177
AH26 U3
VSS_046 VSS_178
AF26 V1
VSS_047 VSS_179
AF27 V13

n
VSS_048 VSS_180
AF5 V15
VSS_049 VSS_181
AF7 V23
VSS_050 VSS_182
AF9 V28
VSS_051 VSS_183
AG13 V29
VSS_052 VSS_184

o
AG16 V4
VSS_053 VSS_185
AG18 V5
VSS_054 VSS_186
B AG20
VSS_055 VSS_187
W26 B
AG23 W27
VSS_056 VSS_188
AG3 W3
VSS_057 VSS_189
AG6 Y1

C
VSS_058 VSS_190
AG9 Y28
VSS_059 VSS_191
AH12 Y29
VSS_060 VSS_192
AH14 Y4
VSS_061 VSS_193
AH17 Y5
VSS_062 VSS_194
AH19 AG28
VSS_063 VSS_195
AH2 AH6
VSS_064 VSS_196
AH22 AF2
VSS_065 VSS_197
AH25 B25
VSS_066 VSS_198
AH28
VSS_067
AH5 A1
VSS_068 VSS_NCTF_01
AH8 A2
VSS_069 VSS_NCTF_02
AJ12 A28
VSS_070 VSS_NCTF_03
AJ14 A29
VSS_071 VSS_NCTF_04
AJ17 AH1
VSS_072 VSS_NCTF_05
AJ8 AH29
VSS_073 VSS_NCTF_06
B11 AJ1
VSS_074 VSS_NCTF_07
B14 AJ2
VSS_075 VSS_NCTF_08
B17 AJ28
VSS_076 VSS_NCTF_09
B2 AJ29
VSS_077 VSS_NCTF_10
B20 B1
VSS_078 VSS_NCTF_11
B29
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
VSS_094
VSS_095
VSS_096
VSS_097
VSS_098
VSS_099
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105

VSS_NCTF_12

A A
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28

SAMSUNG

8_Block Diagram and Schematic_en19 19


ELECTRONICS

4 3 2 1

SRP Sheet Number: 34 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

- SPI ROM LIST - 02 VERIFY REAL MODE 66 CONFIGURE ADVANCE CACHE REG.
03 DISABLE NMI 6A DISPLAY EXTERNAL CACHE SIZE
D 04 GET CPU TYPE 6C DISPLAY SHADOW MESSAGE D
06 INIT. SYSTEM H/W 6E DISPLAY NON-DISPOSABLE SEGMENT
08 INIT. CHIPSET REG. 70 DISPLAY ERROR MESSAGE
09 SET IN POST FLAG 72 CHECK FOR CONFIGURATION ERROR
0A INIT CPU.REG 74 TEST REAL-TIME CLOCK
0B CPU CACHE ON 76 CHECK FOR KEYBOARD EERROR

g
0C INIT.CACHE TO POST 7C SETUP HARDWARE INTERRUPT VECTOR
OE INIT. I/O VALUE 7E TEST COPROCESSER IF PRESENT
0F ENABLE THE L-BUS IDE 80 DISABLE ON-BOARD I/O PORT

n
10 INIT. POWER MANAGER 82 DETECT AND INSTALL EXT.RS232C
11 LOAD ALTERNATE REG. 84 DETECT AND INSTALL EXT.PARALLEL

l
13 PCI BUS MASTER RESET 86 RE-INIT. ON-BOARD I/O PORT

u
WITH INITIAL POST VALUE 88 INIT. BIOS DATA ROM

a
14 INIT. KEYBOARD CONTROLLER 8A INIT.EXTENDED BIOS DATA AREA

s i
16 CHECK CHECKSUM 8C INIT. FDD CONTROLLER
18 8254 TIMER INIT. 9A SHADOW OPTION ROMS

t
C 1A 8237 DMA CONTROLLER INIT. 9C SETUP POWER MANAGEMENT C
P3.3V 1C RESET INTERRUP CONTROLLER 9E ENABLE H/W INTERRUPT
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m
20 TEST DRAM REFRESH A0 SET TIME OF DAY

n
22 TEST 8742 KEYBOARD CONTROLLER A4 INIT. TYPEMATIC RATE
8. Block Diagram and Schematic

24 SET ES SEGMENT REG. TO 4GB A8 ERASE F2 PROMPT

a e
VSS SI SPI3_MOSI 26 ENABLE A20 AA SCAN FOR F2 KEY STROKE
R621 0 4
WP* SCK
5
CHP3_BIOSWP#
R623 12.1 1% 3 6 R628 10K 1%
SPI3_CLK 28 AUTO SIZING DRAM AC ENTER SETUP
SPI3_MISO SO HOLD*
2 7
SPI3_CS0# CE* VDD 32 COMPUTE THE CPU SPEED AE CLEAR IN POST FLAG

S fid
1 8

8-20
TP958
1107-001600 34 TESET CMOS RAM B0 CHECK FOR ERRORS
SST25VF016B-504CS2AF 38 SHADOW SYSTEM BIOS ROM B2 POST DONE-PREPARE TO BOOT O/S
U511 C649
R622 100nF
100K 3A AUTO SIZING CACHE B4 ONE BEEP
1% 2MB(16Mbit) 10V
3C CONFIGURE ADVANCED CHIPSET REG. B6 CHECK PASSWORD (OPTION)
3D LOAD ALTER REG. WITH CMOS VALUE B7 ACPI INIT

n
42 INIT. INTERRUPT VECTOR BA DMI INIT
44 INIT. BIOS INTERRUPT BE CLEAR SCREEN
46 CHECK ROM COPYRIGHT NOTICE C0 TRY BOOT WITH INT19

o
47 INIT. I20 SUPPORT IF INSTALLED D0 INTERRUPT HANDLER ERROR
B B
48 CHECK VIDEO CONFIGURE AGAINST CMOS D2 UNKNOWN INTERRUPT ERROR
49 INIT. PCI BUS AND DEVICE D4 PENDING INTERRUPT ERROR

C
4A INIT. ALL VIDEO BIOS ROM D6 SHUTDOWN 5
4C SHADOW VIDEO BIOS ROM D8 SHUTDOWN ERROR
50 DISPLAY CPU TYPE AND SPEED DA EXTENDED BLOCK MOVE
52 TEST KEYBOARD
DC SHUTDOWN 10
54 SET KEYCLICK IF ENABLED
89 ENABLE NMI
56 ENABLE KEYBOARD 90 INIT. HDD CONTROLLER
58 TEST FOR UNEXPECTED INTERRUPTS 91 INIT. LOCAL BUS HDD CONTROLLER
5A DISPLAY " PRESS ...... SETUP" 92 JUMP TO USER PATCH 2
5C TEST RAM GETWEEN 512K AND 640K 94 DISABLE A20 ADDRESS LINE
60 TEST EXTENDED MEMORY 96 CLEAR HUGE ES SEGMENT REG.
62 TEST EXTENDED MEMORY ADDRESS LINE 98 SEARCH FOR OPTION ROMS
64 JUMP TO USER PATCH 1

A A

SAMSUNG

8_Block Diagram and Schematic_en20 20


ELECTRONICS

4 3 2 1

SRP Sheet Number: 49 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P5.0V
D D
1
VCC_CRT P5.0V MMBD4148
D502
D508 3
MMBD4148
3 1

C535
100nF BLM18PG181SN1
U506 B503

g
10V
SN74AHCT1G125DCKR
5 C514
2 + 4 R525 40.2 5%
CRT3_HSYNC OE*
- CRT5_HSYNC
CRT CONNECTOR 100nF

n
3 10V J505
1
DSUB-15-3R-F
82nH

l
L1 1
CRT3_RED 6

u
11
L2 82nH 2
CRT3_GREEN 7

a
12
L3 82nH 3

s i
VCC_CRT CRT3_BLUE 8

150 1%

150 1%

150 1%
13

PGB1010603NR
D505

PGB1010603NR
D506

PGB1010603NR
D507
0.022nF

0.022nF

0.022nF
t
4

1
C C34 C36 C38 9
C
0.022nF 0.022nF 0.022nF 14
C536
- This Document can not be used without Samsung's authorization -

5 16
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

U505 100nF

2
10 17

m
SN74AHCT1G125DCKR 10V

C33

C35

C37

R13

R14

R15
15
5
8. Block Diagram and Schematic

2 + 4 R526 40.2 5%
CRT3_VSYNC - CRT5_VSYNC

nostuff
nostuff
nostuff
OE* 3701-001403

a
3

e
1
CRT5_DDCDATA
CRT5_DDCCLK
CRT5_HSYNC
CRT5_VSYNC

S fid

8-21
270pF

270pF

0.1nF

0.1nF
3
1 2
P3.3V P3.3V VCC_CRT
BAV99LT1

C12

C11

C10
D504 3 nostuff

C9
1 2 nostuff
R530 R528

n
G

2.2K 2.2K
1

BAV99LT1
D503
S

CRT3_DDCDATA 25-C3 18-D3 10-C4


CRT5_DDCDATA
2

Q504

o
RHU002N06
B B

C
P3.3V P3.3V VCC_CRT

R527 R529
G

2.2K 2.2K
1

CRT3_DDCCLK CRT5_DDCCLK
S

D
2

Q505
RHU002N06

A A

SAMSUNG

8_Block Diagram and Schematic_en21 21


ELECTRONICS

4 3 2 1

SRP Sheet Number: 21 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P3.3V
D D

5
1 +
KBC3_BKLTON R505 1K 1%
2 4 LCD3_BKLTON
MCH3_BKLTEN -
3 U501
R509 R508 7SZ08
100K 100K

g
1% 1%

n
LCD_VDD3V P3.3V VDC_INV P3.3V VDC_INV

u l
C520 C521

2.2K

2.2K
1000nF 100nF

a
6.3V 10V

s i
P5.0V_ALW P3.3V LCD_VDD3V

R521

R520
J2

t
Q1
SOCK-30P-2R-SMD-MNT SI2315BDS-T1
C C
1 2 R25
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3
200K

2
3 4 LCD3_BKLTON 1%

D
S
LCD3_BRIT 5 6

1
7 8 C51 C519

G
9 10 R26 330nF 100nF
8. Block Diagram and Schematic

11 12 30.1K 1% 10V

a
13 14

e
15 16
LCD1_ACLK 17 18 LCD1_ADATA2 D 3
LCD1_ACLK# 19 20 LCD1_ADATA2# Q2
LCD1_ADATA1 21 22 LCD1_ADATA0 R46 10K 1% G RHU002N06
LCD1_ADATA1# 23 24 LCD1_ADATA0# MCH3_LCDVDDON

S fid
1

8-22
25 26 LCD3_EDID_CLK
27 28 LCD3_EDID_DATA
S 2
R45
29 30 100K
31
MNT1 1%
32
MNT2 VDC VDC_INV
3710-002498
R31 0
R30 0

o n
Q4
B SI2307BDS-T1-E3 B

3
2

D
S
R29

1
C
C53 C52

G
150K 100nF 100nF
1%
25V 25V

R28
51.1K
P3.3V 1%
nostuff
nostuff
D 3 nostuff
Q3 nostuff
R27 10K nostuff
1%
G RHU002N06 nostuff
1 nostuff
S 2

A A

SAMSUNG

8_Block Diagram and Schematic_en22 22


ELECTRONICS

4 3 2 1

SRP Sheet Number: 22 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V
EXCEPT AS AUTHORIZED BY SAMSUNG.

C713 C740 C712 C686 P3.3V


100nF
10nF 10nF 10nF
10V

11
15
21
26
33
40
46
D R733 D

2
20K
1%

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
38 P3.3V VGA1_HDMI_HPD#
PEG1_TXN(0) 39
IN_D1-
23 D 3
PEG1_TXP(0) 41
IN_D1+ OUT_D1-
22 PEG3_TX2N_HDMI Q523
PEG1_TXN(1) IN_D2- OUT_D1+ PEG3_TX2P_HDMI R734 Vih : 0.6V
42 20 R729 1K 1% G RHU002N06 7.5K
PEG1_TXP(1) 44
IN_D2+ OUT_D2-
19
PEG3_TX1N_HDMI VGA3_HDMI_HPD_LV 1% Vil : 0.2V
1

4.7K

4.7K
PEG1_TXN(2) 45
IN_D3- OUT_D2+
17
PEG3_TX1P_HDMI
PEG1_TXP(2) IN_D3+ OUT_D3- PEG3_TX0N_HDMI
S 2
47 U518 16 R727

g
PEG1_TXN(3) 48
IN_D4- OUT_D3+
14 PEG3_TX0P_HDMI
PEG1_TXP(3) IN_D4+ OUT_D4- PEG3_TXCN_HDMI 100K
PS8101 13 1%
OUT_D4+ PEG3_TXCP_HDMI

R726

R728
7
VGA3_HDMI_HPD_LV 30
HPD
VGA5_HDMI_HPD HPD_SINK
9

n
SCL
8
MCH3_HDMI_CLK
nostuff SDA MCH3_HDMI_DATA
R666 4.7K 5% 25 28
nostuff OE# SCL_SINK PEG5_HDMI_CLK

l
R731 4.7K 5% 4 29
PC1 SDA_SINK PEG5_HDMI_DATA
nostuff R732 4.7K 5% 3
PC0

u
6 34
P3.3V REXT NC0
R725 4.7K 5% 10
RT_EN# NC1
35

a
THERMAL
R670 4.7K 5% 32
DDC_EN

s i
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
R730

t
499
1% P5.0V

1
5
12
18
24
31
36
37
43
27

49
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P3.3V P3.3V

miniSMDC110-2
TH500
m n
C741 C683
8. Block Diagram and Schematic

1nF 1nF

a e
1
D511

S fid
CRS06 Add for EMC(’08.01.16)

8-23
2

2.2K

2.2K
B23
ACM2012H-900-2P
1 4
PEG3_TX2P_HDMI J510

R178

R179
B24
47408-0001

n
ACM2012H-900-2P
PEG3_TX2N_HDMI 2 3 1 4 1
PEG3_TX1P_HDMI 2
TMDS_DATA2
TMDS_DATA2_SHIELD
3
TMDS_DATA2#

o
4
PEG3_TX1N_HDMI 2 3 1 4 5
TMDS_DATA1
B PEG3_TX0P_HDMI 6
TMDS_DATA1_SHIELD
B
B20 TMDS_DATA1#
7
ACM2012H-900-2P TMDS_DATA0
8
PEG3_TX0N_HDMI 1 4 2 3 9
TMDS_DATA0_SHIELD

C
PEG3_TXCP_HDMI 10
TMDS_DATA0#
B21 TMDS_CLOCK
ACM2012H-900-2P 11
TMDS_CLOCK_SHIELD
12
PEG3_TXCN_HDMI 2 3 13
TMDS_CLOCK#
B19 CEC
BLM18PG181SN1 14
RESERVED
15
PEG5_HDMI_CLK 16
SCL
20
PEG5_HDMI_DATA 17
SDA MNT1
21
B18 DDC_GROUND MNT2
18 22
BLM18PG181SN1 5V_POWER MNT3
19 23
VGA5_HDMI_HPD HOT_PLUG_DETECT MNT4

0.01nF

0.01nF
0.5pF

0.5pF
C786
100nF 3701-001391
10V 3

C234

C598
1 2
nostuff
nostuff BAV99LT1
D12 3
C597
To remove glitch on the detect line 1 2
100nF
10V
nostuff BAV99LT1
nostuff D11
A A

SAMSUNG

8_Block Diagram and Schematic_en23 23


ELECTRONICS

4 3 2 1

SRP Sheet Number: 23 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

P3.3V

n g l
P3.3V_EXP P3.3V_AUX_EXP P1.5V_EXP P3.3V_AUX P1.5V P3.3V P3.3V_EXP P1.5V_EXP P3.3V_AUX_EXP

u a
C692 C691 C693 C690 C688 C689 C660
R677 100nF 100nF 100nF 100nF 100nF 100nF 100nF
J8

s
10K

i
EDGE-XPRESS-26P 10V 10V 10V 10V 10V 10V 10V
2
USB3_P4- USB_D-

t
3 15
USB3_P4+ USB_D+ +3.3V_2
14 U516
C 4
+3.3V_1 R5538D001-TR-F C
EXP3_CPUSB# CPUSB#
12 2 3
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

+3.3V_AUX 3.3VIN_1 3.3VOUT_1


nostuff R645 0 7 4 5

m
SMB3_CLK SMB_CLK 3.3VIN_2 3.3VOUT_2

n
nostuff R646 0 8 10
SMB3_DATA SMB_DATA +1.5V_1
9 12 11
R676 0 +1.5v_2 1.5VIN_1 1.5VOUT_1
nostuff 11 14 13
8. Block Diagram and Schematic

PEX3_WAKE# WAKE# 1.5VIN_2 1.5VOUT_2

a e
13 26 15
EXP3_PERST# PERST# GND_4
23 17
AUXOUT
GND_3 AUXIN
16 20 8
EXP3_CLKREQ# CLKREQ# GND_2 PERST* SHORT504 EXP3_PERST#
17 1 18 10 0
EXP3_CPPE# 18
CPPE# GND_1 RCLKEN CPPE*
9
EXP3_CPPE#
CLK1_EXPCARD# REFCLK- CPUSB* EXP3_CPUSB#

S fid
19 20
CLK1_EXPCARD

8-24
REFCLK+ SHDN*
1 16
21 6
CHP3_SLPS3# 6
STBY* NC_5
PEX1_EXPCARDRXN3 22
PERN0 RESERVED_2
5
PLT3_RST# SYSRST*
7
PEX1_EXPCARDRXP3 PERP0 RESERVED_1
19
GND
OC*
24 27 21
PEX1_EXPCARDTXN3 25
PETN0 MNT1
28
THERMAL
PEX1_EXPCARDTXP3 PETP0 MNT2

3711-006496

o n
EXPRESS CARD
B Type 1 module Type 2 module B
34.00 mm 54.00 mm

C
J9
EXPRESS CARD

EXPRESS CARD

EXPRESS-26P-FRAME
75.00 mm

75.00 mm
THIS SIDE UP

THIS SIDE UP
INSERT

INSERT

1
MNT1
2
MNT2

3709-001491

34.00 mm W 54.00 mm W
X X
75.00 mm L 75.00 mm L
X X
5.00 mm H 5.00 mm H

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 12 of 64

WWW.AliSaler.Com
4 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D P3.3V_MCD

2 IN 1 CARD C747
10000nF
6.3V

J515

g
EDGE-SD-9P
R785 49.9 1% 1
MCD3_SDDATA3 2
CD_DAT3
MCD3_SDCMD0 3
CMD

n
VSS1
4
VDD
5
MCD3_SDCLK CLK

l
6
P3.3V VSS2
R786 49.9 1% 7
MCD3_SDDATA0 DAT0

u
R787 49.9 1% 8
P3.3V_MCD MCD3_SDDATA1 DAT1
MCD3_SDDATA2 R788 49.9 1% 9
DAT2
10

a
MCD3_SDCD# 11
CARD_DETECT
40mil trace MCD3_SDWP WRITE_PROTECT

s i
C369 C363 12
100nF 100nF MNT1
13
10V 10V C361 MNT2

t
C U11 100nF
AU6371 10V 3709-001492
- This Document can not be used without Samsung's authorization -

3 15
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VCC CARD_POWER
14

m
VDDH

n
18
MS_INS
1 19
VDD SMCD#
8. Block Diagram and Schematic

10 20
VDD_U CFCD#
13 21

a
C790 C367 C368 C372 C362 V18 SDCD# MCD3_SDCD#

e
22
1000nF 1000nF 100nF 100nF 100nF XDCD#
23 R240
6.3V 6.3V 10V 10V 10V CFRESET_XDWR#
4 24
nostuff USB3_P10+
USB3_P10-
5
DP
DM
CFWR#_XDRD#
CFRD#_XDCE#
25
26
10K
1% 2-in-1 Socket
CFAD2_XDALE

S fid
7 27

8-25
XI CFAD1_MSCLK_XDCLE R241 33
8 28
XO CFAD0_SDCLK_MSBS
30
MCD3_SDCLK
47
CFD0_MSD0_SDCMD
31 MCD3_SDCMD0
PLT3_RST# RESET# CFD1_MSD1_XDWP#
32
R255 330 2
CFD2_MSD2_SDWP
33 MCD3_SDWP
REXT CFD3_MSD3_XDRB#
34
R250 47K 16
CFD4_SDD0
35
MCD3_SDDATA0
READER_EN CFD5_SDD1
36
MCD3_SDDATA1
29
CFD6_SDD2
37
MCD3_SDDATA2

n
R256 1M GPON6 CFD7_SDD3
38 MCD3_SDDATA3
CFD8_SDD4_XDD0
11 39
R257 0 NC_1 CFD9_SDD5_XDD1
Y5 12 40
CLK3_FM48 NC_2 CFD10_SDD6_XDD2
12MHz nostuff CFD11_SDD7_XDD3
41 C356 C355

o
6 42 0.022nF 0.022nF
Add for AU6372 17
GND CFD12_XDD4
43
(2008.02.29) GNDH CFD13_XDD5 nostuff nostuff
B 44
1
2

CFD14_XDD6
2801-004666 9 45
GND_U CFD15_XDD7
48 46 EMC Solution(’07.10.18)
GND_VDD CFWT#
C370 C371

C
0.018nF 0.018nF

0904-002225

Place the resistor as close as possible


to prevent 48MHz stub

A A

SAMSUNG

8_Block Diagram and Schematic_en25 25


ELECTRONICS

4 3 1

SRP Sheet Number: 13 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS J504
EXCEPT AS AUTHORIZED BY SAMSUNG. HDR-2P-SMD
1
2

CIC21J601NE

CIC21J601NE
3711-000541

D D
P1.8V_P2.5V_LAN

B4

B3
LT500
C518 100nF LFE9261-R
P3.3V 10V 1 24
U503 2
TCT1 MCT1
23 3722-001692
88E8055 TD1+ MX1+
3 22
TD1- MX1-
5 30 LAN3_MDI3P C517 100nF 10

g
PLT3_RST# 6
PERST# MDI+3_NC
31 LAN3_MDI3N 10V 4 21 9
RING
PEX3_WAKE# 55
WAKE# MDI-3_NC
26 LAN3_MDI2P 5
TCT2 MCT2
20
TIP
CLK1_PCIELOM 56
REFCLK+ MDI+2_NC
27 LAN3_MDI2N 6
TD2+ MX2+
19 8
CLK1_PCIELOM# REFCLK- MDI-2_NC TD2- MX2- TERM4
PEX1_GLAN_RXP4 C49 100nF 10V 49
TX+_PCIE_TXP MDI+1_RXP
20 LAN3_MDI1P C516 100nF 7
TERM3
C48 100nF 10V 50 21 LAN3_MDI1N 10V 7 18 6

n
PEX1_GLAN_RXN4 54
TX-_PCIE_TXN MDI-1_RXN
17 LAN3_MDI0P 8
TCT3 MCT3
17 5
RD-
PEX1_GLAN_TXP4 53
RX+_PCIE_RXP MDI+0_TXP
18 LAN3_MDI0N 9
TD3+ MX3+
16 4
TERM2
PEX1_GLAN_TXN4 RX-_PCIE_RXN MDI-0_TXN TD3- MX3- TERM1

l
R18 4.7K C515 100nF 3
RD+

1%
1%
1%
1%
1%
1%
1%
1%
42 10V 10 15 2
LOM3_CLKREQ# CLKREQ#_PU_VDDO_TTL NO_STUFF @ 88E8040 TCT4 MCT4 TD-

u
R23 4.7K 43
RESERVED_PU_VDDO_TTL
11
TD4+ MX4+
14 1
TD+

49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
Place nearby LOM chip 12 13
TD4- MX4-
37 59 JACK-MODULE-10P

a
nostuff SPI_CLK_NC LED_ACTIVE#
STUFF @ 88E8040 35 60 J502
SPI_DI_NC LED_LINK10_100#_LED_SPEED#
34 62 2603-000107

s i
SPI_DO_NC LED_LINK1000#_NC
36 63

R510
R511
R512
R513
R514
R515
R516
R517
SPI_CS#_NC LED_LINK#
C8 C7

t
38 3

1%
1%
1%
1%
LAN3_VPDCLK 41
VPD_CLK CTRL12
4
CTRL_12 1nF 1nF
C LAN3_VPDDATA VPD_DATA CTRL18_CTRL25 CTRL18_25 3KV 3KV C

75
75
75
75
45
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VDDO_TTL_1

100nF 10V

100nF 10V

100nF 10V

100nF 10V
P3.3V_AUX P3.3V_AUX 40 9

m
VDDO_TTL_2 SWITCH_VAUX

n
1 11
VDDO_TTL_3 SWITCH_VCC
61

R4
R5
R6
R7
VDDO_TTL_4 P3.3V_AUX P3.3V
8. Block Diagram and Schematic

a
AVDDH_VDDO_TTL

e
12 R17 0
C67 C45 C42 C43 48
VAUX_AVLBL C787 C6

C18

C20
C22

C25
VDD_1 1nF 1nF Need at least 2.5mm or more clearance
100nF 100nF 100nF 100nF 44 47 R24 0
39
VDD_2 VMAIN_AVLBL 3KV 3KV from conductive material
P1.2V_LAN VDD_3
33
VDD_4 LOM_DISABLE_DISABLE#
10 R22 4.7K

S fid
13

8-26
VDD_5
7 15
VDD_6 XTALI
2
C23 C41 C46 C50 C44 C24 58
VDD_7
14 Y1
10000nF VDD_8 XTALO 25MHz
100nF 100nF 100nF 100nF 100nF
6.3V
32
NC_AVDDL_1
28 1 2
AVDD_AVDDL_1
22 46 2801-004668
P1.8V_P2.5V_LAN AVDD_AVDDL_2 TESTMODE
19
AVDD_AVDDL_3 RESERVED_TSTPT
29 C17 C16
57 24 0.015nF 0.015nF

n
NC_AVDDL_2 RESERVED_HSDDACP
52 25
NC_AVDDL_3 RESERVED_HSDACN
51 16 R16 4.99K
C540 C538 C47 C539 C19 NC_AVDDL_4 RSET
10000nF 100nF 100nF 100nF 100nF 1%
23
6.3V 10V 10V 10V 10V AVDD

o
65
THERMAL
64
NC_VDD25 88E8040: 2Kohm
B 88E8055: 4.99Kohm P3.3V_AUX B
Place Nearby Pin39, Pin64
4.7uF @ 88E8040

C
Pin Compatible with 88E8040 (1205-003399)

4.7K

4.7K
P3.3V_AUX U2 P1.2V_LAN P3.3V_AUX U507 P1.8V_P2.5V_LAN 88E8040: 2.5V
B8 BCP69-16 B505 BCP69-16 88E8055: 1.8V U504
BLM18PG181SN1 BLM18PG181SN1 AT24C08AN-10SU-2.7

R519

R518
4

4
8 1
VCC A0
7 2
3

2
WP A1
6 3
C69 C40 C39 C14 C15 C13 C544 C543 C542 C541 C21 LAN3_VPDCLK SCL A2
1

1
R21 R531 5 4
100nF 4700nF 22000nF 10000nF 4700nF 100nF 4700nF 100nF 10000nF 4700nF 100nF LAN3_VPDDATA SDA GND
4.7K 10V 10V 20% 6.3V 10V 10V 4.7K 10V 10V 6.3V 10V 10V

NO_STUFF @ 88E8040
CTRL_12 CTRL18_25

NO_STUFF @ 88E8040 NO_STUFF @ 88E8040


A A

SAMSUNG

8_Block Diagram and Schematic_en26 26


ELECTRONICS

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SRP Sheet Number: 14 of 64

WWW.AliSaler.Com
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

Bluetooth Interface

n g l
u a
P3.3V

s t i
C C702 C
100nF J11
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

10V HDR-4P-1R-SMD

m n
8. Block Diagram and Schematic

a
USB3_P5- 2

e
USB3_P5+ 3
4

3711-000456

S fid

8-27
Straight Type

o n B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 19 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g l
u a
CAMERA

s t i
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
P5.0V
8. Block Diagram and Schematic

a e
C523 C522
100nF 100nF
10V 10V

S fid

8-28
J1
HDR-4P-1R-SMD
1
1 4
USB3_P8- 2
3
4
USB3_P8+ 2 3
3711-000456

n
B504
ACM2012-900-2P-T Straight Type

o
B B

C
A A

SAMSUNG

8_Block Diagram and Schematic_en28 28


ELECTRONICS

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SRP Sheet Number: 20 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V

nostuff
SHORT6 INSTPAR
C765 C763 C764 SHORT5 INSTPAR
D 10000nF 100nF 100nF D
6.3V 10V 10V

G_AUD
P1.5V
R758 U519
0 ALL TYPE IS 1608
ALC262-VC2-GR
C761 nostuff
1 36 R662 0

g
100nF
R756 0 9
DVDD_CORE0 LINE_OUT_R_D
35 AUD5_LINE_O_RIGHT
10V DVDD_CORE1 LINE_OUT_L_D AUD5_LINE_O_LEFT R663 0
41
HP_OUT_R_A AUD5_HP_O_RIGHT
AUD3_GPIO0#
43
GPIO0 HP_OUT_L_A
39
AUD5_HP_O_LEFT BOTTOM
44

n
AUD3_GPIO1# GPIO1
2
DMIC_DATA MIC1_R_B
22 C728 1000nF 6.3V
AUD5_MIC1_RIGHT
3 21 C727 1000nF 6.3V G_AUD
GPIO3 MIC1_L_B AUD5_MIC1_LEFT

l
17
MIC2_R_F

u
5 16 R721 18-C2 2K
10-C21%
HDA3_AUD_SDO SDATA_OUT MIC2_L_F AUD5_MIC1_VREF_RIGHT
HDA3_AUD_BCLK
6
BCLK R720 18-C2 2K
10-C21%
AUD5_MIC1_VREF_LEFT C756 10nF
R757 33 1% 8 24

a
HDA3_AUD_SDI0 SDATA_IN LINE1_R_C
HDA3_AUD_SYNC 10
SYNC LINE1_L_C
23 C726 1000nF 6.3V
AUD5_MIC2_RIGHT C619 10nF
11 C758 1000nF 6.3V

s i
HDA3_AUD_RST# C760 1000nF 12
RESET#
29 AUD5_MIC2_LEFT C757 10nF
AUD3_BEEP BEEP LINE1_VREFO

t
C762 LINE2_R_E
15
0.015nF 18 14
C 19
CD_L LINE2_L_E C
nostuff CD_GND
- This Document can not be used without Samsung's authorization -

20 31
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

CD_R LINE2_VREFO G_AUD

m n
37
MONO_OUT
47
SPDIF_EAPD
8. Block Diagram and Schematic

48 45
SPDIFO NC0
46

a
DMIC_CLK

e
33
DCVOL
30
MIC2_VREFO AUD5_MIC2_VREF
40 32
JDREF MIC1_VREFO_R AUD5_MIC1_VREF_RIGHT
MIC1_VREFO_L
28
AUD5_MIC1_VREF_LEFT H/P_A

S fid
R753 39.2K 1%

8-29
13 27
AUD5_SENS_HP# AUD5_SENS_A
AUD5_SENS_A SENSE_A VREF
34
SENSE_B
MIC_B
26 R752 20K 1%
AVSS1
42 P4.75V_AUD AUD5_SENS_MIC#
AVSS2 C730
R724 10000nF
20K 4 25
DVSS_CORE0 AVDD1 6.3V
1% 7 38
DVSS_CORE1 AVDD2 C732 C729
100nF 100nF

n
1205-003404 10V 10V
SHORT508 INSTPAR

SHORT507 INSTPAR

o
G_AUD G_AUD G_AUD
B B
G_AUD
P5.0V_AUD P4.75V_AUD
Place these R-Short on just opposite side of the CODEC.

C
P4.75V_AUD
U520
MIC5252-4.75BM5
1 5
IN OUT
R754 2
GND
20K 3 4
1% C767 C766 EN BYPASS C737 C738
100nF 100nF 10000nF
10000nF
10V 6.3V 10V 6.3V
AUD3_BEEP INSTPAR
PC BEEP D 3
R755
C759 SHORT517 C736
Q530 4.7nF 1000nF
1K INSTPAR
RHU002N06 25V 6.3V
AUD3_SPKR R751 1K 1% G 1%
SHORT516
1
S 2
G_AUD G_AUD G_AUD G_AUD

G_AUD G_AUD
A A

SAMSUNG

8_Block Diagram and Schematic_en29 29


ELECTRONICS

4 3 2 1

SRP Sheet Number: 24 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
P5.0V_AMP P5.0V_AMP

n
GAIN

l
10dB

100K 1%

100K 1%
u a
C675 C681 C678
C680

nostuff
100nF 10000nF 100nF
100nF

s i
6.3V 10V P5.0V_AUD P5.0V_AMP
10V 10V

R657

R658
U515

t
TPA6017A2 nostuff
C C679 100nF 10V 17 16
C
AUD5_LINE_O_RIGHT RIN- VDD G_AUD
- This Document can not be used without Samsung's authorization -

7 6
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

RIN+ PVDD1 SHORT510 INSTPAR


2 15

m
GAIN0 PVDD2

n
3
GAIN1
18
C674 100nF 10V 5
ROUT+
14
SPK5_R+ GAIN0 GAIN1 SHORT509 INSTPAR
8. Block Diagram and Schematic

AUD5_LINE_O_LEFT LIN-
9 LIN+
ROUT- SPK5_R- 0 0 6dB

a
16V
10V

e
10 4 0 1 10dB
BYPASS LOUT+
8 SPK5_L+
LOUT- SPK5_L- C734 C733 C735
10V

100nF
1 1 0 15.6dB

10V
GND1 10000nF 100nF 10000nF
100nF

100nF

11 19
470nF

GND2 SHDN* AUD3_SHDN# 1 1 21.6dB 6.3V 10V 6.3V


0

0
nostuff
13 GND3 NC
12

S fid
20

8-30
GND4
C676

THERM
21
C672
C677

C673

R659

R660
nostuff

nostuff

n
G_AUD G_AUD

G_AUD G_AUD

o
B B

C
INTERNAL STEREO SPEAKERS
B15 BLM18PG181SN1
B14 BLM18PG181SN1
R661 10K B13 BLM18PG181SN1 J4
AUD3_GPIO0# 1% AUD3_SHDN# HDR-4P-SMD
B12 BLM18PG181SN1
D 3 SPK5_R- 1
Q518 SPK5_R+ 2
R695 1K G RHU002N06 SPK5_L- 3
KBC3_SPKMUTE 1% SPK5_L+ 5
4
1 MNT1
S 2 6
MNT2
C181 C180 C179 C178
1nF 1nF 1nF 1nF
nostuff nostuff nostuff nostuff 3711-000922

G_AUD

A A

SAMSUNG

8_Block Diagram and Schematic_en30 30


ELECTRONICS

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SRP Sheet Number: 25 of 64

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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

R722 0

g
C707 2.2nF

n
R694 4.7K 1K 1%
nostuff R693

l
nostuff

nostuff It should be placed near the codec

u
nostuff
1000nF 6.3V

a
C708

s i
P4.75V_AUD AUD5_MIC2_VREF
G_MIC R723
2.2K
Internal MIC

t
U517-1
C LMV358M C
8 2
- nostuff
- This Document can not be used without Samsung's authorization -

1 V
B16
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

AUD5_MIC2_RIGHT OUT
R135 330 2
3 C710 1000nF

m
G
+ 1

n
nostuff 4
BLM18PG181SN1 HDR-2P-SMD
SHORT506
8. Block Diagram and Schematic

J5
INSTPAR
3711-000541

a
P4.75V_AUD P4.75V_AUD

e
R698 R697 C183
G_MIC 2K 0.1nF C182
nostuff 47K
1% U517-2 10nF
AUD5_MIC2_LEFT 25V
nostuff LMV358M R699
8 6 nostuff
- 20K

S fid
V
7 1%

8-31
OUT
G 5 G_MIC
+
nostuff 4

DO NOT make a testpint in this net C711


1000nF nostuff
R696
20K
1%
G_MIC nostuff

n
G_MIC

o
B B
SHORT505 INSTPAR

C
P4.75V_AUD
C706 10nF

R692 0
C709 C731
100nF 10000nF
10V 6.3V

G_AUD G_MIC
nostuff
nostuff

G_MIC

A A

SAMSUNG

8_Block Diagram and Schematic_en31 31


ELECTRONICS

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SRP Sheet Number: 26 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

HEADPHONE

g
J513

n
JACK-PHONE-6P-LIME
B26 BLM18PG181SN1 5
AUD5_SENS_HP#

l
AS
4
EC514 100uF 16V R599 56 B517 BLM18PG181SN1 3 R
AUD5_HP_O_RIGHT

u
6
EC513 100uF 16V R584 56 B518 BLM18PG181SN1 2 L
AUD5_HP_O_LEFT 1

a
AS
G1
R585 R583

0.1nF

0.1nF
G2

s
20K 20K

1nF
3722-002416

C627

C628
C C

C639
P3.3V
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

G_AUD

m n
2
DTA114YUA G_AUD
1% R600 3
Q516
8. Block Diagram and Schematic

R630 10K 1% 1K 1 Q27

a
AUD3_GPIO1# MMBT3904

e
1
3 2 Connect to Mount-hole.
D 3 1% R601 3
Q515 1K 1 Q26
R629 1K 1% G RHU002N06 MMBT3904
KBC3_SPKMUTE

S fid
1 HP depop circuit

8-32
2
S 2
3
2 1

D514
BAT54A
nostuff G_AUD

o n
J512
B JACK-PHONE-6P-PINK B
B522 BLM18PG181SN1
5
AUD5_SENS_MIC# 4
R568 330 B516 BLM18PG181SN1 3 R

C
AUD5_MIC1_RIGHT 6
R567 330 B515 BLM18PG181SN1 2 L
AUD5_MIC1_LEFT 1
C618 C620 C617 G1
1nF 0.1nF 0.1nF G2

3722-002365

MIC JACK
G_AUD

The traces led to Audio Jacks have the width over 10mil

A A

SAMSUNG

8_Block Diagram and Schematic_en32 32


ELECTRONICS

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SRP Sheet Number: 27 of 64

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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
MDC Connecter

u n a l
Intel Internal GFX only use P1.5V_AUX

s i
to indicate HDA Swing level
P1.5V_AUX P3.3V_AUX

t
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

J508 C90 C88 C89

m
100nF 100nF 10000nF

n
SOCK-12P-2R-SMD
10V 10V 6.3V
1 2
8. Block Diagram and Schematic

HDA3_MDC_SDO 3 4

a
5 6

e
HDA3_MDC_SYNC R59 33 1%
7 8
HDA3_MDC_SDI1 9 10
HDA3_MDC_RST# 13
11 12 HDA3_MDC_BCLK
MNT1
14
MNT2

S fid
15

8-33
MNT3 M501 M500
16
MNT4 HEAD
17
MNT5

EMI
18 DIA
MNT6 LENGTH

3710-002133

n
(Bottom)

o
B B

C
A A

SAMSUNG

8_Block Diagram and Schematic_en33 33


ELECTRONICS

4 3 2 1

SRP Sheet Number: 28 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

Main to HDD

g
J514
SOCK-22P-1R
S1
S2

n
SAT1_TXP0 S3
SAT1_TXN0 S4

l
S5
SAT1_RXN0 S6
SAT1_RXP0

u
S7
P3.3V
P1

a
P2
P3

s i
C725 C723 C722 P4
10000nF 100nF 100nF nostuff
nostuff P5
6.3V 10V 10V nostuff

t
P6
P7
C P8
C
- This Document can not be used without Samsung's authorization -

P9
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P10

m n
P5.0V P11
P12
P13
8. Block Diagram and Schematic

P14

a
C703 C670 C671 C704 C705

e
P15
100nF 4700nF 4700nF 100nF 100nF
10V 10V 10V 10V 10V
M1
M2
nostuff

S fid

8-34
3710-002471

o n B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 29 of 64

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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

KEYBOARD

n g l
C

s u t
KBC5_KSI(0:7)

i a
0
1
C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m
3

n
4
5
J7
8. Block Diagram and Schematic

6
7 FPC-KBD-25P

a
KBC5_KSO(0:15)

e
0
1
1
2
2
3
3
4
5

S fid
4

8-35
6
7
8
9
5
10
11
6
12
13
14

n
7
15
8
16
9
17
10
18
19

o
11
12
20
21
B 13
22
B
14
15
23
24

C
25
26
MNT1
27
MNT2

3708-002166

A A

SAMSUNG

8_Block Diagram and Schematic_en35 35


ELECTRONICS

4 3 2 1

SRP Sheet Number: 35 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g
ADAPTERIN/CHARGING LED

l
BSS84 LED7

u
P3.3V_MICOM
Q536 LTST-C195KGJRKT
P3.3V R777 100 1 G 3

3
Have to adjust R value

D
S
2 R 4

s i

1
G
LTST-C193TBKT-AC R776 10K
KBC3_LED_ACIN#

t
LED2
R767 475 1% P3.3V_MICOM BSS84
C KBC3_NUMLED# NUMLOCK Q535 C

1
R773 475
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3
2
m

D
S
n

1
G
R772 10K
KBC3_LED_CHARGE#
8. Block Diagram and Schematic

LTST-C193TBKT-AC

a e
LED3 R768 475 1%
KBC3_CAPSLED# CAPSLOCK P3.3V_AUX
2

1
U523

S fid
5 7SZ14

8-36
KBC3_LED_POWER# 2 + 4 R781 475 1 2
-
LTST-C193TBKT-AC 3
LED8
LED4 R780 LTST-C193TBKT-AC
R769 475 1% 1M
KBC3_SCLED# SCRLLOCK
2

C784

n
1000nF
LED5 LTST-C193TBKT-AC 6.3V
R770 475 1%
CHP3_SATALED# HDD LED
2

o
B B
LED6 LTST-C193TBKT-AC
R771 475 1%
WLON_LED# WLAN ON
2

C
A A

SAMSUNG

8_Block Diagram and Schematic_en36 36


ELECTRONICS

4 3 2 1

SRP Sheet Number: 36 of 64

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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
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DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g l
LID_SWITCH

s u t i a
C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

P3.3V P3.3V

m n
8. Block Diagram and Schematic

R1

a
U1

e
A3212ELH/HED55XXU12 20K
1%
1
C3 SUPPLY
2
100nF
3
OUTPUT LID3_SWITCH#
10V GND

S fid

8-37
B

o n B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 37 of 64


4 3 2 1
SAMSUNG PROPRIETARY
MICOM RESET
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V_AUX
P3.3V_MICOM P3.3V_MICOM KBC3_RST#
P3.3V_MICOM
D 3
P3.3V_MICOM Q514
D R800 VDC P3.3V_MICOM D
100 G RHU002N06
R565 U510 1% 1
10K TPS3809 S 2
R201 1% nostuff 1 R588
C317 C623 GND Q513
100nF 100nF
C625 0 3
VDD R579 4.7K
100nF R566 0 2 47K BSS84
RESET*
R578 47K
R593 R577

2
To measure leakage C635 C622 TP957
To support Micom Crisis

S
100K 100nF 470K
100nF 1% D 3

1
g

G
P5.0V 10V nostuff 25V Q511
G RHU002N06 THM3_STP#
1 R576
C621 nostuff
C624 R575 S 2 nostuff 100K
1% 10nF 1%

n
100nF 150K nostuff
10K 1% nostuff
R200 10V nostuff
nostuff

l
KBC3_RST# nostuff
KBC3_CHKPWRSW#

100
7
1

59
36
37
u
6
5

4
9

8
a
P5.0V

NMI
RES*
RESO*

VCC_1
VCC_2
VCC_3

MD0
MD1

VCCB
VCL

STBY*
48 49

s i
47
PA0 P40
50 KBC3_RSMRST#
31
PA1 P41
51
KBC3_SUSPWR
KBC5_TCLK PA2 P42 KBC3_THERM_SMDATA

t
30 52
KBC5_TDATA 21
PA3 P43
53
KBC3_BKLTON R595 10K 1%
C KBC3_SCLED# 20
PA4 P44
54
KBC3_PWRBTN# KBC5_TCLK C
KBC3_NUMLED# PA5 P45 KBC3_VRON R596 10K 1%
- This Document can not be used without Samsung's authorization -

11 55
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

KBC3_CAPSLED# 10
PA6 P46
56
KBC3_BLCKPWRSW# KBC5_TDATA

m
PA7 P47 KBC3_CPURST#

n
91 14 P3.3V_MICOM
KBC3_EXTSMI# 90
PB0 P50
13
KBC3_LED_ACIN#
8. Block Diagram and Schematic

KBC3_RUNSCI# 81
PB1 P51
12
KBC3_LED_CHARGE#

a
KBC3_USBPWRON# PB2 P52 KBC3_SMCLK# P3.3V P3.3V_MICOM R203 4.7K

e
80
KBC3_CHG4.2V 69
PB3
26 KBC3_SMDATA#
68
PB4 P60
27
VRM3_CPU_PWRGD R202 4.7K
KBC3_LED_POWER# 58
PB5 P61
28 LID3_SWITCH# KBC3_SMCLK#
KBC3_PWRGD PB6 P62 KBC3_PRECHG R597
KBC3_PWRON 57
PB7
U9 P63
29 300K ADT3_SEL#
R204 10K

S fid
32 1%
H8S-2110B

8-38
KBC5_KSI(0:7) 0 79
P64
33
KBC3_CHGEN
1 78
P10 P65
34
BAT3_DETECT#
2 77
P11 P66
35 CHP3_SLPS3# C636 C637
3 76
P12 P67 PEX3_WAKE# 100nF 100nF
4 75
P13
38 8 KBC5_KSO(8:15) 10V 10V
P14 P70
5 74 39 9
P15 P71
6 73 40 10
P16 P72
7 72 41 11
P17 P73
42 12

n
KBC5_KSO(0:7) 0 67
P74
43 13
P20 P75 P3.3V
1 66 44 14 To support Micom Crisis
P21 P76
2 65 45 15
3 64
P22 P77 Place nearby touchpad connector
P23

o
4 63 93 R594
5 62
P24 P80
94
KBC3_WAKESCI#
P25 P81 KBC3_A20G 10K
B 6 61
P26 P82
95
PCI3_CLKRUN#
1% B
7 60 96
P27 P83
97
LPC3_LAD(0:3) 0 82
P84
98 KBC3_RFOFF# P3.3V_MICOM

C
1 83
P30 P85
99
KBC3_SPKMUTE P3.3V_MICOM
2 84
P31 P86 KBC3_THERM_SMCLK
P32 R205 10K
3 85 25
P33 P90
86 24
LPC3_LFRAME# 87
P34 P91
23 KBC3_CHKPWRSW#
PLT3_RST# P35 P92 ADT3_SEL# R580
88 22 To support Micom Crisis 10K
CLK3_PCLKMICOM 89
P36 P93
19 THM3_ALERT# 1%
CHP3_SERIRQ P37 P94 CHP3_SUSSTAT# R581 R582
18 100K 10K
2
P95
17
CHP3_SLPS5# 1% 1%
KBC3_CHKPWRSW#
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5

3
XTAL P96
16
CHP3_SLPS4#
EXTAL P97 KBC3_SMDATA# D 3 C638
Y3 330nF
Q512 10V
RHU002N06
15
46
70
71
92

2801-004665 G
1

KBC3_BLCKPWRSW#
2

1
10MHz S 2
C315 C316 R598 0
0.018nF KBC3_PWRSW#
0.018nF
nostuff

POWER SWITCH BLOCK WHILE MICOM UPDATE

A MICOM Crisis Update A

Condition: P90=P91=P92=High(MICOM_P3V) SAMSUNG

8_Block Diagram and Schematic_en38 38


MD0=MD1=Low(0V) ELECTRONICS
Serial Port: P84 & P85

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SRP Sheet Number: 38 of 64

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
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DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
Put this LED located near PWRSW from ME recommedation
Power LED, Blue color

n l
To FCT Test (3 X 4mm pad)
KBC3_PWRSW#

u a

1
2

SW-TACT-4P
SW1
3404-001311
s i
P3.3V_MICOM

t
3

3
2 1
C C
D10 nostuff
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

BAV99LT1

m n
8. Block Diagram and Schematic

a e
Power On LED
P3.3V

S fid

8-39
LED1 LTST-C193TBKT-AC
R12 475 1%

2
B

o n B

C
A A

SAMSUNG

8_Block Diagram and Schematic_en39 39


ELECTRONICS

4 3 2 1

SRP Sheet Number: 39 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g l
u
SATA ODD

s t i a
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
J511
CDROM-SATA-13P
8. Block Diagram and Schematic

S1

a
GND_1

e
S2
SAT1_TXP1 S3
RX+
SAT1_TXN1 S4
RX-
GND_2
S5
SAT1_RXN1 S6
TX-
SAT1_RXP1 TX+

S fid
S7

8-40
P5.0V GND_3
P1
DP
P2
5V_1
P3
C612 C611 C610 C613 C614 P4
5V_2
100nF 10000nF 10000nF 100nF 100nF MD
P5
10V 6.3V 6.3V 10V 10V GND_4
P6
GND_5
nostuff 14

n
MNT1
15
MNT2

3710-002634

o
B B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

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SRP Sheet Number: 40 of 64

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
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DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

n g l
u a
80H DECODER CONNECTOR

s t i
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
P5.0V P3.3V
8. Block Diagram and Schematic

a
J509

e
HDR-10P-1R-SMD
1
2
PLT3_RST# 3

S fid

8-41
CLK3_DBGLPC 4
LPC3_LFRAME# 5
LPC3_LAD(3) 6
LPC3_LAD(2) 7
LPC3_LAD(1) 8
LPC3_LAD(0) 9
10
11
MNT1
12 MNT2

n
3711-000386

o
B B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

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SRP Sheet Number: 41 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
P1.5V

n
WLAN P3.3V

l
R715
0
P3.3V P3.3V P3.3V P3.3V_AUX

u
nostuff

C720

a
100nF
C721 C350 C700
10000nF 100nF 100nF
10V

s
R717

i
nostuff
6.3V
10K
1%
J10

t
EDGE-MINIPCI-E-52P
C 1 2
C
PEX3_WAKE# WAKE* P3.3V_1 C701
- This Document can not be used without Samsung's authorization -

3 4
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

RSVD_1 GND_1 100nF


5 6

m
RSVD_2 P1.5V_1 10V

n
7 8
MIN3_CLKREQ# 9
CLKREQ* SIM_VCC_C1
10
WLON_LED#
GND_2 SIM_DATAIO_C7
11 12
8. Block Diagram and Schematic

CLK1_MINIPCIE# 13
REFCLK- SIM_CLK_C3
14 D 3

a
CLK1_MINIPCIE REFCLK+ SIM_RESET_C2 Q519

e
15 16
GND_3 SIM_VPP_C6 RHU002N06
G
17 18
KBC3_RFOFF#
SIM_RSVD_C8 GND_4 1
19 20 S 2
21
SIM_RSVD_C4 W_DISABLE*
22
KBC3_RFOFF#
GND_5 PERST* PLT3_RST#

S fid
23 24

8-42
PEX1_MINIRXN1 25
PERN0 P3.3V_AUX
26
PEX1_MINIRXP1 27
PERP0 GND_6
28
GND_7 P1.5V_2
29 30
GND_8 SMB_CLK
31 32
PEX1_MINITXN1 33
PETN0 SMB_DATA
34
PEX1_MINITXP1 35
PETP0 GND_9
36
GND_10 USB_D-
37 38
RSVD_11 USB_D+
39 40
RSVD_12 GND_11
41 42

n
RSVD_13 LED_WWAN*
43 44
RSVD_14 LED_WLAN*
45 46
RSVD_15 LED_WPAN*
47 48 Mini PCI Express Card
RSVD_16 P1.5V_3
49
RSVD_17 GND_12
50 For full size minicard 30.00 mm

o
51 52
RSVD_18 P3.3V_2 M7
B 53 HEAD B
MNT1 DIA
54

50.95 mm

48.05 mm
MNT2 LENGTH Top

C
3709-001498 Pin 1
4mm 1.5mm
Odd Pins : Top side
BA61-01090A|screw-115-4t-h0250 Even Pins : Bottom Side
Tyco/Amp : 3709-001401
Molex/Aces : 3709-001498
(Top)

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
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ELECTRONICS

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THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
TOUCHPAD

u n l
P5.0V

a
SW3
SW-TACT-4P

s i
C609 3404-001311
100nF
1 3
10V T_R_BUTTON#

t
J6 2 4
C CONN-6P-FPC P5.0V C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3
1

m
2 1
KBC5_TDATA 2

n
T_R_BUTTON# 3 BAV99LT1
T_L_BUTTON# 4 D14
8. Block Diagram and Schematic

nostuff
KBC5_TCLK 5

a
6

e
7
MNT1
8
C608 MNT2
C606 0.01nF
C605 C607
1nF 1nF 1nF
0.5pF 3708-002402
SW2

S fid

8-43
SW-TACT-4P
3404-001311
1 3
T_L_BUTTON#
2 4
P5.0V
3
2 1

n
BAV99LT1
nostuff D521

o
B B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

g
1 PORT USB CONNECTOR

n
P5.0V_AUX_USB

u l
C501 100nF

a
10V

s i
U500
TPS2062 Need 2A Routing

t
2
C IN
7 P5.0V_AUX_USB C
OUT1
- This Document can not be used without Samsung's authorization -

8
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

OC1*
5 6

m
OC2* OUT2 EC1 C2

n
3 68uF C1
KBC3_USBPWRON# 4
EN1*
1
100nF
0.047nF
25V R503
EN2* GND AL 10V
8. Block Diagram and Schematic

1K R501
1% 1K

a e
1%
2 S 1
J501 BSS84 G
JACK-USB-4P Q500

S fid
1 3 Q501 3 D

8-44
D
USB3_P2+_R GND
USB3_P2+ R2 0 2
DATA+ R502
R3 0 USB3_P2-_R 3 100K G
USB3_P2- 4
DATA-
1% KBC3_USBPWRON#
PWR 1
5 2 S

PGB1010603NR

PGB1010603NR
MNT1
1 4 6 nostuff
MNT2 RHU002N06
7 nostuff
MNT3 nostuff
8
MNT4 nostuff
nostuff
2 3

n 2

2
nostuff 3722-002729

D1

D2
B500
ACM2012-900-2P-T

1
nostuff
nostuff

o
B B

C
A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

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SRP Sheet Number: 51 of 64

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4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D D

2 PORT USB CONNECTOR

g
P5.0V_AUX_USB

C559 100nF

n
10V

u l
U502
Need 4A Routing

a
TPS2062
2

s i
IN P5.0V_AUX_USB
7
OUT1
8
OC1*

t
5 6 EC500
OC2* OUT2 C500
C KBC3_USBPWRON# 3
EN1* 100uF 100nF C505 C
4 1 16V 0.047nF R507
EN2* GND AS 10V
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

1K R504
1%

m
1K

n
1%
TP956
J503 2 S 1
8. Block Diagram and Schematic

JACK-8P-LED-MNT BSS84 G

a e
1 Q502
USB3_P0-_R PWR0 Q503 3
R11 0 2 3 D
USB3_P0- USB0- D
R10 0 3 R506
USB3_P0+ 4
USB0+
USB3_P0+_R GND1 100K G
KBC3_USBPWRON#
1 4 1% 1

S fid
5 2 S

8-45
USB3_P1-_R PWR1
6 nostuff
USB1- RHU002N06 nostuff
7
USB1+ nostuff
2 3
nostuff 8 nostuff
USB3_P1+_R GND2 nostuff
B502
ACM2012-900-2P-T 9
MNT1
10
MNT2
R9 0 11
USB3_P6- MNT3
USB3_P6+ R8 0 12
MNT4

n
1 4
3722-002601

PGB1010603NR

PGB1010603NR

PGB1010603NR

PGB1010603NR
o
2 3

2
nostuff
B B501 B

D501

D500
ACM2012-900-2P-T

1
D4

D3

C
nostuff
nostuff
nostuff
nostuff

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

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SRP Sheet Number: 52 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.

CPU VRM [INTERSIL]


DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
VDC

VRM3_CPU_PWRGD
C251 C249 EC511 EC510
D C250 100nF 1nF 10uF 10uF D
1nF 25V 25V
25V 50V

CPU1_PSI#
AL AL
P3.3V nostuff

5 6 7 8 5 6 7 8 VRM_VSUM
D1 D2 D3 D4 D1 D2 D3 D4
CPU1_DPRSTP#
R641 499 1% Q16
CHP3_DPRSLPVR
TPC8031-H Q18 R558
R644 0 G G TPC8031-H 3.3K

g
4 4 L503 CPU_CORE
KBC3_VRON S1 S2 S3 S1 S2 S3 0.39uH
R642 nostuff 1 2 3 1 2 3
10K 0
VCCP3_PWRGD
1% R643 5 6 7 8 5 6 7 8 MPO104-R39
EC10 EC13

n
D1 D2 D3 D4 D1 D2 D3 D4
G_CPU CPU1_VID(6) Q19 R180 R789 R790 R175
CPU1_VID(5) 330uF 330uF
TPC8032-H 10 10 10 10 2V 2V
CPU1_VID(4)

1%
l
AL AL
C588

SHORT503
G G
C659 6.3V CPU1_VID(3) 1% 1% 1% 1%
R559
CPU1_VID(2) 4 4 20K 47nF

u
S1 S2 S3 S1 S2 S3
1%

2
1000nF CPU1_VID(1) 1 2 3 1 2 3
P3.3V CPU1_VID(0) C298

a
220nF

10
1
R189 3.3 25V C253 C237

0
Q17 D512
C238 1nF 1nF

s i
1nF TPC8032-H B340A

0
R640

R634
t

R603
nostuff
G_CPU nostuff Snubber (2008.01.16)
C R673 150K C
1%
G_CPU R639
- This Document can not be used without Samsung's authorization -

49

48
47
46
45
44
43
42
41
40
39
38
37
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

VRM_ISEN1

m
4.99K 499

n
R671 11K 1%

EP

3V3
CLK_EN#
DPRSTP#
DPRSLPVR
VR_ON
VDI6
VDI5
VDI4
VDI3
VDI2
VDI1
VID0
VRM_PRM 1% VRM_ISEN2
1%
1 36
8. Block Diagram and Schematic

R672 2
PGOOD BOOT1
35
VRM_ISEN1

a
C656 4.7nF 25V 470K PSI# UGATE1

e
3 34
C657 1%
4
PMON PHASE1
33 P5.0V VRM_ISEN2
1% 15nF 5
RBIAS PGND1
32
VRM_PRM
R668 VR_TT# U512 LGATE1
11K 6 31 R606 1
NTC ISL6266AHRZ-T PVCC
7
SOFT LGATE2
30 C650

S fid
R669 8 29 100nF
C643

8-46
C685 100K R638 39.2K 1% 9
OCSET PGND2
28
C642
0.22nF 1% VW PHASE2 1000nF 100nF 25V
10 27 VDC
COMP UGATE2 6.3V 10V
11 26
C684 0.068nF FB BOOT2

DROOP

1%
R799 12 25 SHORT502

R604
nostuff
VDIFF

VSUM

ISEN2
ISEN1
FB2 NC
VSEN

VDD
RTN
1K

DFB

VSS
VIN
VO
1% G_CPU
EC515

10
C285 EC512 0
nostuff C286 10uF
100nF 10uF
13
14
15
16
17
18
19
20
21
22
23
24
1nF 25V
R665 C655 R637 1K 1% 25V

0
50V 25V

n
AL AL
49.9 1% 2.2nF P5.0V G_CPU nostuff

R636
R667 1K R602

3.3
1% 5 6 7 8 5 6 7 8
R674 0 10 1% R182

o
D1 D2 D3 D4 D1 D2 D3 D4 C252
CPU1_VCCSENSE

R605
C640 Q22 20K 47nF
1%
B C654 1000nF TPC8031-H Q24 B
1nF 6.3V
C641 G G TPC8031-H
R675 0 50V
220nF 4 4 L506
CPU1_VSSSENSE
25V S1 S2 S3 S1 S2 S3 0.39uH

C
1 2 3 1 2 3
C687
C658 1nF 5 6 7 8 5 6 7 8 MPO104-R39
1nF R635 EC16
0

D1 D2 D3 D4 D1 D2 D3 D4
50V
Q23 R185 R791 R792 R184 EC14
50V 3.24K R183 330uF 330uF
25V

TPC8032-H 10 10 10 10 2V
3.3K
SHORT4

1% 2V AL
C651
220nF

C682 G G AL
0.18nF R631 4 4 1% 1% 1% 1%
R632 S1 S2 S3 S1 S2 S3

2
1 2 3 1 2 3 VRM_VSUM
11K 2.21k
1% 1% D513
R664 EMI501

1
1K
C287 C274 B340A
C288 Q25
11-D3 18-C4 52-C1
11-D3 18-C4 52-C1

1% 1nF 1nF
EMI

G_CPU TPC8032-H
1

1nF
100nF 25V

EXF-0023-05
R560

C652

6302-001057
nostuff nostuff Snubber (2008.01.16)

G_CPU
2

NTCG163JF103HT
VRM_ISEN2
VRM_ISEN1

Place near to L704


Add for EMC solution(080305)
VRM_VSUM
VRM_PRM
A A
VDC

C&PSGO(MEKVEQERH7GLIQEXMGCIR
R633 10
1%
SAMSUNG
ELECTRONICS
C653
10nF
25V

G_CPU
4 3 2 1

SRP Sheet Number: 43 of 64

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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V_AUX & P5.0V_AUX

V5FILT
D D

R244 R779 R246


C780 C783
0 R774 0 0 nostuff
0
1nF 1nF

R775 C781 C782 R778 nostuff


nostuff

g
VDC nostuff
10K 1nF 1nF 10K VDC
1% nostuff
1% nostuff
nostuff

n
EC519 C742 C770 C744 EC520 EC521
10000nF C354
68uF 100nF 100nF 25V 100nF 68uF 68uF

l
25V 25V 25V 25V 25V
AL 25V AL AL
nostuff

u
TP940

a
C359

8
7
6
5
4
3
2
1
VO2
COMP2
VFB2
GND
VREF2
VFB1
COMP1
VO1
s i
1nF INSTPAR
SHORT7
P3.3V_AUX (4.5A) 33
PAD

t
9 5 6 7 8
EN5
Q531 10 32 D1 D2 D3 D4
C EN3 SKIPSEL C

V5FILTTPS51120RHBR
U521
PHKD13N03LT 11 31 C360
C768 PGOOD2 TONSEL G_P3.3V
- This Document can not be used without Samsung's authorization -

12 30 Q30
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R759 3.3 5% EN2 PGOOD1 100nF


8 1 100nF 13 29 P5.0V_AUX (5.026V)

m
L509 R249 25V G AP6680AGM
7 D2_2 S2 VBST2 EN1 3.3 5%

n
3.9uH 2 25V 14 28 4 L510
6
D2_1 G2
3 TP943 15
DRVH2 VBST1
27 S1 S2 S3 3.9uH
(5.5A)
D1_2 S1 LL2 DRVH1 1 2 3
8. Block Diagram and Schematic

C739 5 4 16 26
SIQ1048-3R9 D1_1 G1 TP944 DRVL2 LL1
EC518 100nF R251 25 5 6 7 8

a
DRVL1 TP936 SIQ1048-3R9

e
PGND2

PGND1
VREG3

VREG5
330uF 10V 30.1K TP937
D1 D2 D3 D4
R254
6.3V 1% C366 EC522

CS2

CS1
C365 31.6K C745

VIN
AL 0.047nF
10nF Q29 1% 330uF 100nF
18 mohm G AP6680AGM 6.3V
AL

17
18
19
20
21
22
23
24
R252 4 10V

S fid
TP939 S1 S2 S3 18 mohm
13K

8-47
1% 1 2 3 R253 R793
TP938 27.4K 11K
nostuff P5.0V_ALW P3.3V_MICOM R245 R247 1% 1%
nostuff 13K 8.2K
nostuff 1%
G_P3.3V

G_P3.3V

n
C743 R735
V5FILT 5.1
C358 10000nF
1%
10000nF 6.3V
6.3V
V5FILT

o
C769
1000nF
B R248 B
100K
1%
G_P3.3V

C
AUX_PG
SHORT518 0
KBC3_SUSPWR
VDC

R700 R760
30.1K 47K
1% P12.0V_ALW
3
1 Q520
MMBT3904
2
3

C715 ZD500
1nF BZX84C12L C716 G_P3.3V
1

50V 10000nF
25V
nostuff

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 44 of 64


4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D
CHIPSET POWER ( P1.05V & P1.5V ) D

VDC

g
VDC P5.0V_AUX
EC504 EC505 C93
68uF 68uF 1nF

n
25V 25V
AL AL 50V

EC506 C574

l
68uF 100nF C573
25V
25V
100nF

u
AL
SHORT501 10V

a
3
1 2 Q10
TPC8031-H

s i
D509 nostuff
C570 C569 BAT54A P1.05V
100nF 10000nF C566 C567 5 6 7 8 5 6 7 8

t
D1 D2 D3 D4 D1 D2 D3 D4
10V 6.3V 10000nF 100nF
C U5 6.3V 10V
Q13
TPC8031-H
(15A) C
(3A) P1.5V_AUX
- This Document can not be used without Samsung's authorization -

SC415MLTRT L502
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

R553 L501 Q509 C83 G_P1.05V C95 G G


1uH

m
3 16 100nF 4 4
3.9uH

n
20K PHKD13N03LT 100nF VDD1 VDD2 G_P1.05V
25V S1 S2 S3 S1 S2 S3
1% SIQ1048-3R9 25V PCMC104T-1R0MN
8 1 TP930 R52 3.3 2 17 R61 1 2 3 1 2 3
D2_2 S2 BST1 BST2
7 2 3.3
8. Block Diagram and Schematic

24 19 5 6 7 8 5 6 7 8
D2_1 G2 DH1 DH2
R554 6 3 1 18 D1 D2 D3 D4 D1 D2 D3 D4
R60

a
C571 D1_2 S1 LX1 LX2

e
EC507 4.7 5 4 4 15 4.7
C575 0.047nF D1_1 G1
R66 20K R65 0
DL1 DL2
R63 10K R62 C568 R548
220uF 100nF
23
ILIM1 ILIM2
20 0
2.5V 50V 1% 1% Q12 G G 3.01K
AD 10V nostuff TP934 0.047nF 1%
8
FB1 FB2
11 TPC8032-H 4 4 50V C576 EC2 EC508
15mohm C572 7 12 S1 S2 S3 S1 S2 S3 C91 nostuff 330uF
1

330uF

S fid
VOUT1 VOUT2
1 2 3 1 2 3 0.47nF
100nF
0.47nF 2.5V 2.5V

8-48
2

50V 10V AL AL
5 14
C80 22
EN1 EN2
21 C92 1nF nostuff
R551 R552 Snubber(2008.01.16) 100nF PGD1 PGD2
200K 10V 6 13 nostuff
20K SS1 SS2
1% 1% 10
C81 9
TON
25
4.7nF RTN PAD C76 2402-001316
G_P1.05V 25V 10nF Q11 15mohm
25V
C78 TPC8032-H R550 R549
100nF 80.6K 7.5K
nostuff 1% 1%

n
G_P1.05V nostuff 10V
R51 10K 1% G_P1.05V G_P1.05V
KBC3_PWRON
R53 10K 1% G_P1.05V
KBC3_SUSPWR C82

o
P3.3V 100nF G_P1.05V
10V
B B
1% 10K R48
KBC3_PWRON
R64

C
G_P1.05V C77
10K 100nF
1%
10V

VCCP3_PWRGD
G_P1.05V
VDC

R50
300K
1%
TP933 SHORT500

R49 R1608-SHORT
750K
1%
G_P1.05V

C79
1nF
50V

A A
G_P1.05V

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2
COM-22C-015(1996.6.5) REV. 3 d:/users/mobile62/mentor/lyon/int/lyon_int_pr_080501/design_blocks/PWR_MV_Cantiga
SRP Sheet Number: 45 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. Add for EMC(2008.1.16)
CHARGER & POWER MANAGEMENT
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
C71 C511 C55 VDC_ADPT D522 VDC D7
100nF 100nF 100nF B340A nostuff B340A nostuff
25V 25V 25V 1 1 VDC_CHG
2 2
J500
JACK-DC-POWER-3P Q5 U3
B2 AP4435GM AP4435GM U4 VDC
D 2
1 8 8 1 AP4435GM D
3 HU-1M2012-121JT S1 D1 D1 S1 R35 1W 1%
2 7 7 2 0.02 1 8
4 S2 D2 D2 S2 S1 D1
3 6 6 3 2 7
MNT1
4
S3 D3
5 5
D3 S3
4 3
S2 D2
6
C64 C235 C73 C124
MNT2 C5 R32 C54 G D4 D4 G S3 D3 100nF 100nF 100nF 100nF
100nF
C4 100K 1000nF R546 R545 4
G D4
5
25V 25V 25V 25V
B1 10nF 1% EC503 EC502
3722-002191 25V 25V R34 2.2 22
HU-1M2012-121JT nostuff Add for EMC(2008.1.16)
300K 68uF 68uF C564 C65 nostuff
R500 1% C562 25V 25V 10000nF 1000nF
C56 AL AL VDC_BGATE
10 C502 R33 100nF
25V 25V

1% C503 1nF 100K nostuff


Add for EMC(2008.1.16)

g
25V 100nF
nostuff 10000nF 1%
25V

VDC_SGATE
nostuff 25V

Add for EMC(2008.1.16) C75


Q506 nostuff 100nF
SI2307BDS-T1-E3

n
R540 25V
VDC VDC_ADPT 0

l
D 3 5 6 7 8
R542
To enhance
R794 R532 nostuff 0 D1 D2 D3 D4

u
300K 300K G DMB performance (060310)
1% 1% nostuff 1 S
2 Q9 HU-1M2012-121JT
B5

a
G AP6680AGM
15.15V@1.264V 4 L500 J506
8.2uH

s
R533 S1 S2 S3

i
1 2 3 0.02 1W 7 BATT-CONN-7P
27.4K

100nF
6

25V
1% 3711-006059
5 6 7 8 5
R547

t
ICHG=2.6A FOR 6 & 9 CELLS D1 D2 D3 D4 HU-1M2012-121JT
B6 4
Q7 R43 1%
C R544 C552 C554 EC501 3 C
VCHG=12.906V

C548
G_CHG AP6680AGM 4.7 R543 100nF 10000nF 68uF C553 R538 2
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

G 470K
ILIMIT=2.97A Vref 22 22 1%

m
4 25V 25V 10000nF

1
1

n
25V AL
VDC_BGATE G_CHG
C61 S1 S2 S3
nostuff
25V
D6 1nF 1 2 3 C60 C561

3
8. Block Diagram and Schematic

R795 BAT54A 0.47nF 47nF

1000nF
R522 nostuff
300K

a
200K 50V

e
1% 1% B508

2
BLM18PG181SN1
U508

C59
C789 ISL6256AHRZ-T BAT3_DETECT#
R523 R798
10nF 39.2K 19 20 C556

S fid
150K CSIP CSIN
1% 1% 0.1nF

8-49
18 17 B507
SGATE BGATE
25 BLM18PG181SN1
DCIN TP946 C551
(1.26V) 27
(1.26V) 28
ACSET R537 100nF BAT3_SMDATA#
G_CHG DCSET 3.3 25V
(5V) BOOT
14 C555
15 0.1nF
5.1 (5.075V)13 UGATE
G_CHG

G_CHG C547 25V R36 16 B7


VDDP PHASE
0.256V@2.501A 1% 26
VDD LGATE
12 BLM18PG181SN1
1000nF 11

n
0.553V@3.08A 7
PGND Vref BAT3_SMCLK#
CHLIM
9
VADJ CSOP
21 C66
8 22 0.1nF
ACLIM CSON
5
Vref ICM TP945 2.39V

o
6
VREF
1
Vref EN
B R534 B
10K R41 3 2
ICOMP CELLS
1% 30.1K 4 10
VCOMP GND
1% R535

C
R40 100 C532 23
ACPRN THERM
29
D 3 20K 1% C550 24 R38 1K
KBC3_PRECHG Q6 Ra 1% 10nF
DCPRN KBC3_CHGEN P3.3V_MICOM
R42 6.8nF 1%
R19 10K G RHU002N06 100K
25V
50V
1 1% C58
S 2 R39 C533 C549 1nF

BAV99LT1

BAV99LT1
R20 R536 Rb 150K 10nF 0.1nF 50V
R524 R796

2
25V G_CHG G_CHG nostuff
470K 100K 1% nostuff 10K 0
1% 1%
nostuff G_CHG

3
D9

D8
R47
43.2K G_CHG

1
G_CHG G_CHG 1% G_CHG G_CHG G_CHG G_CHG ADT3_SEL#
G_CHG
1.784V@VCELL to 4.302V (ACTIVE LOW)
P3.3V_MICOM
D 3
Q8 R797 51.1K 1%
RHU002N06 VDC_SGATE
G R539 100 1%
KBC3_CHG4.2V BAT3_SMDATA# KBC3_SMDATA#
1 R541 D 3 R44 100 1%
S 2 22 BAT3_SMCLK# KBC3_SMCLK#
Q508
G RHU002N06
1
SHORT1 INSTPAR
A G_CHG
S 2 A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
60W 90W G_CHG SAMSUNG
Ra 150K(2007-007489) 20k(2007-007312) ELECTRONICS
Rb 20K (2007-007312) 150K(2007-007489)
Iaclim 2.97A 4.526A

4 3 2 1
COM-22C-015(1996.6.5) REV. 3 d:/users/mobile62/mentor/lyon/int/lyon_int_pr_080501/design_blocks/PWR_MV_Charger_ISL6256
SRP Sheet Number: 46 of 64
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

DDR2 Power
D D

R745 0
AUX_PG

g
P5.0V_AUX

R747
100K D519

n
1% MMBD4148
1 3
KBC3_SUSPWR

l
C750

u
2.2nF
50V

a
G_DDR

s i
P5.0V_AUX
nostuff nostuff
nostuff

2
P1.8V_AUX VDC P5.0V_AUX P5.0V VDC
C C

BAT54A
- This Document can not be used without Samsung's authorization -

D520
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

3
m n
R748 R746 R749 EC524 EC523

1
C749 68uF 68uF
10 750K 10 R703 100nF
1% 1% 25V 25V
8. Block Diagram and Schematic

1% U522 10K
25V AL AL

a
SC486IMLTRT nostuff

e
11 7
VTTEN PGD
3 TP922
VDDQS
2 1
TON EN_PSV
6 R763 C774 5 6 7 8
FB

S fid
8 3.3 100nF D1 D2 D3 D4

8-50
REF
C752 9
COMP BST
24
1000nF 10 Q533 P1.8V_AUX (8A)
6.3V VTTS 25V
5 G AP6680AGM
VCCA
4
VSSA DH
23 4 L511 (321 ~ 359KHz)
21 S1 S2 S3 Rtop 0ohm , Rbot Open : 1.5V
ILIM 2.2uH
C751 C753 15 22 1 2 3
G_DDR VTT_1 LX
1nF 1000nF 14 R764 Q534 5 6 7 8
50V VTT_2 SIQ1048-2R2
6.3V
C779 13K 1% AP6680AGM
D1 D2 D3 D4
1nF P1.8V_AUX 13 19

n
50V VTTIN_1 DL R784 R243
12 20 4.7 20K C357
nostuff VTTIN_2 VDDP P5.0V_AUX G 1% 1nF EC516 EC517
G_DDR G_DDR G_DDR C364 17 18
PGND_2 PGND_1 4 50V
330uF 330uF
R765 1000nF 16 25 S1 S2 S3 2.5V 2.5V
PGND_3 THERM

o
6.3V
10 1 2 3 C785 AL AL
C775
1% 1000nF C773 0.47nF R242 nostuff
B MEM1_VREF 6.3V 1nF 100K B
OCP : 10.7A nostuff 1%
P0.9V
R750

C
10 R766 0
1% G_DDR G_DDR
C778
C755 1nF
1000nF 50V
6.3V nostuff

P0.9V G_DDR G_DDR

C776 C777
10000nF 10000nF
6.3V 6.3V
INSTPAR
SHORT8

G_DDR
A A

SAMSUNG

8_Block Diagram and Schematic_en50 50


ELECTRONICS

4 3 2 1

SRP Sheet Number: 48 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D
Switched Power On (P5.0V) P12.0V_ALW P5.0V_AUX
Q532
P5.0V P5.0V_AUD D
AP4435GM

R563
1
2
S1 D1
8
7
R743 0
Switched Power On (P3.3V & 1.8V)
S2 D2
470K 3 6
S3 D3 R744 0
1% R737 C771 4
G D4
5
30.1K 10nF
1%
25V P3.3V_AUX P3.3V
C772 R741 0

g
KBC3_PWRON_INV# 2200nF
10V
D 3
Q526 P12.0V_ALW Q28
SHORT515 0 RHU002N06 AP6680AGM

n
G
KBC3_PWRON
1
C748

D1 D2 D3 D4

S1 S2 S3
2

5 6 7 8

1 2 3
S
100nF

l
R736
10V
nostuff 100K C353

u
1% 2200nF

4
G
a
Q524
RHU002N06 D 3

s
Place near to

i
C746
KBC3_PWRON_INV#
G 22nF

t
1 50V
P3.3V P5.0V_AUX_USB P5.0V_AUX_USB P5.0V_AUX_USB P5.0V_AUX_USB
C
S 2 C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
C714 C504 C508 C510 C512
1nF 1nF 1nF 1nF 1nF
P5.0V_AUX P5.0V_AUX_USB
8. Block Diagram and Schematic

a e
B506
HU-1M2012-121JT

B509

S fid
HU-1M2012-121JT P5.0V_AUX_USB P5.0V_AUX_USB P5.0V_AUX_USB P5.0V_AUX_USB

8-51
P1.5V_AUX P1.5V
C524 C513 C506
C509
Add for EMC(’08.01.16) 1nF
100nF
10V
100nF
10V
100nF
10V

5th Layer P12.0V_ALW Q20

n
AP6680AGM

D1 D2 D3 D4

S1 S2 S3
5 6 7 8

1 2 3
Audio Power (nostuff) R181 C267

o
200K 2200nF

4
G
1%
B Q21 B
RHU002N06D 3
Place near to

C
P12.0V_ALW P5.0V_AUX P5.0V_AUD G
KBC3_PWRON_INV# C268
1 22nF
S 2

P5.0V_AUX P5.0V_AUX P5.0V_AUX_USB


R701
100K
1%
C754 C724 C507
100nF 100nF 100nF
10V 10V 10V
6
5
2
1
FDC653N
D4
D3
D2
D1

Q522
G

S
3

P3.3V P5.0V_AUX_USB

Q521 D 3
RHU002N06 C717 C718
A G 10nF
10000nF C558 C537 A
KBC3_PWRON_INV# 6.3V 100nF 100nF
1 10V 10V DRAW

SAMSUNG
S 2

8_Block Diagram and Schematic_en51 51


nostuff
nostuff
nostuff CHECK
nostuff P3.3V ELECTRONICS
nostuff
APPROVAL PART NO.

Add for SI(2007.12.6)


MODULE CODE LAST EDIT

undefined

4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/users/mobile62/mentor/lyon/int/lyon_int_pr_080501
SRP Sheet Number: 15 of 64
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. POWER DISCHARGER

D D

P5.0V_ALW P5.0V_AUX P1.8V_AUX P3.3V_AUX

g
R761 R762 R783 R782
100K 1K 49.9 10
1% 1% 1% 1%

n
nostuff nostuff nostuff nostuff

u l
D 3 D 3 D 3 D 3
Q538 Q539 Q540 Q537

a
R716 10K G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_SUSPWR
1 1 1 1

s i
1%
S 2 S 2 S 2 S 2
nostuff nostuff nostuff nostuff nostuff

t
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
8. Block Diagram and Schematic

a
S fid e
P3.3V P5.0V P1.5V P1.05V

8-52
R742 R740 R739 R738
10 1K 10 10
1% 1% 1%
1% nostuff
nostuff nostuff nostuff

n
D 3 D 3 D 3 D 3
Q529 Q528 Q527 Q525
G RHU002N06 G RHU002N06 G RHU002N06 G RHU002N06
KBC3_PWRON_INV#

o
1 nostuff 1 nostuff 1 nostuff 1
S 2 S 2 S 2 S 2
B nostuff B

C
A A

SAMSUNG

8_Block Diagram and Schematic_en52 52


ELECTRONICS

4 3 2 1

SRP Sheet Number: 47 of 64

WWW.AliSaler.Com
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D ICT PORT (Need to check net name) For Debugging D

P5.0V_AUX
Sub Board Connector 3
VDC P1.05V P3.3V P5.0V P1.5V 1 U7
J12 MMBT3904

g
HDR-10P-1R-SMD J3
2
HDR-4P-SMD
1 nostuff
2 1 nostuff
3 USB3_P3+ 2 nostuff

n
4 USB3_P3- 3 3
5 AUX_PG 5
4 1 Q15
6 MNT1

l
6 MMBT3904
7 VRM3_CPU_PWRGD MNT2
R719 1K 1% 2
8 CPU1_PWRGDCPU

u
R718 1K 1%
9 CPU1_CPURST# 3711-000922
10
11

a
MNT1 nostuff
MNT2
12
3

s i
nostuff 1 U8
3711-005753 nostuff MMBT3904

t
nostuff
2
C C
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

m n
8. Block Diagram and Schematic

a e
VDC P1.8V_AUX P1.8V_AUX P1.8V_AUX P1.8V_AUX
System

S fid

8-53
P5.0V_AUX P5.0V_AUX P5.0V_AUX P5.0V_AUX P5.0V_AUX C63 C595 C102 C577 C269 MT500 MT501 MT9 MT502 MT1
100nF 100nF 100nF 100nF 100nF RMNT-35-100-1P RMNT-30-100-1P RMNT-30-100-1P RMNT-30-100-1P RMNT-30-100-1P
25V 10V 10V 10V 10V
C557 C565 C563 C545 C546
100nF 100nF 100nF 100nF 100nF
10V 10V 10V 10V 10V
P5.0V_AUX P5.0V_AUX P5.0V_AUX

n
C596 C586 C578
100nF 100nF 100nF
10V 10V 10V
Add for EMC (’08.01.16)
5th Layer

o
MT6 MT2 MT7 MT8 MT3
RMNT-30-100-1P RMNT-30-100-1P RMNT-30-100-1P RMNT-30-100-1P RMNT-30-100-1P
B Add for EMC (’08.01.16) B

P1.8V_AUX P1.05V P1.05V P1.05V P1.5V_AUX P1.5V_AUX Bottom Side

C
C146 C109 C101 C87 C247 C97
100nF 100nF 100nF 100nF 100nF 100nF
10V 10V 10V 10V 10V 10V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V

C100 C219 C560 C96 C72 C248 C299


100nF 100nF 100nF 100nF 100nF 100nF 100nF
P1.5V_AUX P1.5V_AUX VDC VDC VDC VDC 10V 10V 10V 10V 10V 10V 10V Board Keyboard
C103 C205 C296 C74 C98 C94
100nF 100nF P3.3V P3.3V P3.3V P3.3V P3.3V P3.3V MT10 MT4 MT5
1nF 1nF 1nF 1nF
10V 10V 50V 50V 50V 50V RMNT-25-70-1P RMNT-25-90-1P RMNT-25-90-1P
nostuff
C297
100nF
C599 C534 C615 C601 C629
1nF 1nF 1nF 1nF 1nF
VDC VDC VDC VDC VDC 10V 50V 50V 50V 50V 50V

C626 C99 C57


C62 C236 100nF 100nF 100nF
1nF 1nF
50V 50V 25V 25V 25V
A Add for EMC (’08.03.05) P5.0V A

C600
SAMSUNG

8_Block Diagram and Schematic_en53 53


100nF
Add for EMC (’08.01.16) 10V
ELECTRONICS
Top Side
Add for EMC (’08.03.12)
4 3 2
COM-22C-015(1996.6.5) REV. 3
SRP Sheet Number: 16 of 64
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D AUX_PG CPU1_IGNNE# CPU1_STPCLK# D


CTRL_12 CPU1_VID(0) CPU2_THERMDA CHP3_SUSSTAT# P5.0V_AUX P1.2V_LAN
SPK5_L+ CPU1_VID(1) CPU2_THERMDC MCH3_HDMI_CLK P5.0V_AUX P1.2V_LAN
SPK5_L- CPU1_VID(2) CRT3_DDCDATA MCH3_ICHSYNC# P5.0V_AUX P1.2V_LAN
SPK5_R+ CPU1_VID(3) CRT5_DDCDATA MCH3_LCDVDDON P5.0V_AUX P1.2V_LAN
SPK5_R- CPU1_VID(4) EXP3_CLKREQ# KBC3_BLCKPWRSW#
VRM_PRM CPU1_VID(5) FAN3_FDBACK# KBC3_LED_POWER# P1.05V_PEG P1.5V_AUX
CPU1_NMI CPU1_VID(6) HDA3_AUD_SDO KBC3_PWRON_INV# P1.5V_AUX
CPU1_TCK CRT3_DDCCLK HDA3_MDC_SDO AUD5_LINE_O_LEFT P12.0V_ALW P1.5V_AUX
CPU1_TDI CRT5_DDCCLK KBC3_CPURST# CHP3_SATACLKREQ# P1.5V_AUX

g
CPU1_TMS EXP3_CPUSB# KBC3_EXTSMI# KBC3_LED_CHARGE# CPU_CORE
CRT3_RED EXP3_PERST# KBC3_NUMLED# KBC3_THERM_SMCLK CPU_CORE P1.5V_EXP
FAN5_VDD MEM1_VREF KBC3_PWRBTN# VGA3_HDMI_HPD_LV CPU_CORE P1.5V_EXP
SMB3_DATA PLT3_RST# KBC3_RSMRST# AUD5_LINE_O_RIGHT CPU_CORE P1.5V_EXP
SPI3_CS0# KBC3_RUNSCI# VRM3_CPU_PWRGD P1.5V_EXP

n
SPI3_MISO CPU1_DPSLP# KBC3_SMDATA# AUD5_HP_O_RIGHT G_AUD
SPI3_MOSI KBC3_BKLTON KBC3_SPKMUTE AUD5_MIC1_RIGHT P1.8V_AUX
THM3_STP# KBC3_PRECHG KBC5_KSO(10) AUD5_MIC2_RIGHT G_CHG P1.8V_AUX

l
VRM_ISEN1 KBC3_PWRSW# KBC5_KSO(11) CHP3_ME_RTCRST# P1.8V_AUX
VRM_ISEN2 KBC3_RFOFF# KBC5_KSO(12) MCH3_HDMI_DATA G_CPU P1.8V_AUX

u
WLON_LED# KBC3_SCLED# KBC5_KSO(13) KBC3_THERM_SMDATA
AUD3_SHDN# KBC3_SMCLK# LID3_SWITCH# AUD5_MIC1_VREF_LEFT G_DDR P3.3V_EXP

a
EXP3_CPPE# KBC3_SUSPWR LOM3_CLKREQ# AUD5_MIC1_VREF_RIGHT
KBC3_CHGEN KBC5_KSI(0) LPC3_LFRAME# G_MIC P3.3V_MCD

s i
KBC3_PWRGD KBC5_KSI(1) MCD3_SDDATA0
KBC3_PWRON KBC5_KSI(2) MCD3_SDDATA1 P3.3V_AUX GROUND P5.0V_ALW
KBC5_TDATA KBC5_KSI(3) MCD3_SDDATA2 P3.3V_AUX GROUND

t
KBC5_KSI(4) MCD3_SDDATA3 P3.3V_AUX GROUND P5.0V_AUD
C CPU1_TRST# KBC5_KSI(5) MCH1_HXSWING P3.3V_AUX GROUND C
CRT3_GREEN KBC5_KSI(6) MCH3_CLKREQ# GROUND P5.0V_AMP
- This Document can not be used without Samsung's authorization -
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -

CRT3_HSYNC KBC5_KSI(7) MCH3_EXTTS0# VCC_CRT GROUND

m n
CRT3_VSYNC KBC5_KSO(0) MCH3_EXTTS1# GROUND P5.0V_AUX_USB
CRT5_HSYNC KBC5_KSO(1) MIN3_CLKREQ# VDC_CHG GROUND
CRT5_VSYNC KBC5_KSO(2) PCI3_CLKRUN# GROUND
8. Block Diagram and Schematic

KBC5_KSO(3) AUD5_SENS_HP# VDC_INV GROUND

a
CPU1_INIT# KBC5_KSO(4) VDC_INV

e
KBC5_KSO(5) CHP3_DPRSLPVR VDC_INV G_P3.3V
SMB3_CLK KBC5_KSO(6) CHP3_PM_SYNC# VDC_INV
SPI3_CLK KBC5_KSO(7) CHP3_SATALED# G_P1.05V
PEX3_WAKE# KBC5_KSO(8) PEG5_HDMI_CLK VDC_ADPT
AUD3_GPIO0# KBC5_KSO(9) LCD_VDD3V

S fid
PLT3_RST_ORG#

8-54
AUD3_GPIO1# LAN3_VPDCLK VGA5_HDMI_HPD P3.3V_AUX_EXP
AUD5_SENS_A LCD3_BKLTON AUD5_HP_O_LEFT P0.9V
BAT3_SMCLK# LPC3_LAD(0) AUD5_MIC1_LEFT P1.8V_P2.5V_LAN P0.9V
CHP3_GPIO18 LPC3_LAD(1) AUD5_MIC2_LEFT P0.9V
CHP3_GPIO20 LPC3_LAD(2) AUD5_MIC2_VREF VDC P0.9V
CHP3_SERIRQ LPC3_LAD(3) AUD5_SENS_MIC# VDC
CHP3_SLPS3# MCD3_SDCMD0 CHP3_BIOS_CRI# VDC P1.5V
CHP3_SLPS4# MCH3_BKLTEN VDC P1.5V
CHP3_SLPS5# CPU1_A20M# CHP3_CL_RST_0# P1.5V

n
CLK3_ICH14 CHP3_INTRUDER# VREF P1.5V
CLK3_PWRGD VREF
CLK3_USB48 CPU1_BSEL0 CLK3_PCLKMICOM VREF P3.3V
VRM_VSUM CPU1_BSEL2 CPU1_THRMTRIP# VREF P3.3V
ADT3_SEL# MCD3_SDCD# CPU3_THRMTRIP# P3.3V

o
AUD3_BEEP MCD3_SDCLK HDA3_HDMI_BCLK V5FILT P3.3V
AUD3_SPKR MCH1_HVREF HDA3_HDMI_RST#
B KBC3_USBPWRON# CPU1_FERR# HDA3_HDMI_SDI2 P3.3V_MICOM P5.0V
B
CLK3_FM48 SMB3_ALERT# HDA3_HDMI_SYNC P5.0V
THM3_ALERT# ITP3_DBRRESET# P4.75V_AUD P5.0V

C
CPU1_BNR# T_L_BUTTON# KBC3_CHKPWRSW# P5.0V
T_R_BUTTON# KBC3_LED_ACIN#
CPU1_INTR VCCP3_PWRGD LCD3_EDID_DATA P1.05V
CPU1_PSI# BAT3_DETECT# CPU1_PWRGDCPU P1.05V
CPU1_RS0# BAT3_SMDATA# CPU1_VCCSENSE P1.05V
CHP3_BIOSWP# CPU1_VSSSENSE P1.05V
CPU1_RS2# CHP3_CPUSTP# HDA3_AUD_BCLK
CHP3_PCISTP# HDA3_AUD_RST# PRTC_BAT
CPU1_SMI# CHP3_RTCRST# HDA3_AUD_SDI0
CRT3_BLUE CLK3_PCLKICH HDA3_AUD_SYNC
CTRL18_25 CPU1_CPURST# HDA3_HDMI_SDO
KBC3_A20G CPU1_DPRSTP# HDA3_MDC_BCLK
KBC3_RST# CPU1_DBSY# HDA3_MDC_RST#
KBC3_VRON HDA3_MDC_SDI1
KBC5_TCLK HDA3_MDC_SYNC
CLK3_DBGLPC KBC5_KSO(14) KBC3_CAPSLED#
LCD3_BRIT KBC5_KSO(15) KBC3_WAKESCI#
MCD3_SDWP LAN3_VPDDATA LCD3_EDID_CLK

A A

C&PSGO(MEKVEQERH7GLIQEXMGCIR
SAMSUNG
ELECTRONICS

4 3 2 1

SRP Sheet Number: 18 of 64

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