Experiment No. 4 Common Emitter Amplifier

Experiment No.
4
COMMON EMITTER AMPLIFIER
AIM
1. To design a small signal voltage amplifier.

2. To plot its frequency response and to obtain bandwidth.
THEORY
Amplifiers are classified as small signal amplifiers and large signal amplifiers depending
on the shift in operating point, from the quiescent condition caused by the input signal. If the
shift is small, amplifiers are referred to as small signal amplifiers and if the shift is large, they are
known as large signal amplifiers. In small signal amplifiers, voltage swing and current swing are
small. Large signal amplifiers have large voltage swing and current swing and the signal power
handled by such amplifiers remain large.
Voltage amplifiers come under small signal amplifiers. Power amplifiers are one in
which the output power of the signal is increased. They are called large signal amplifiers. Figure
shows the circuit diagram of a common emitter amplifier.
Fig 1. Circuit diagram
DESIGN
From the transistor data sheet, for BC107,
hfe = β = 110, Ic max=100 mA, VCE max = 45V
Let VCC =12V, Ic = 2mA. Since the quiescent point is in the middle of the load line for the
amplifier, VCE = 50% of VCC = 6V.
VRE = 10% of VCC = 1.2V.
Assuming
IC  IE , VRE  IC RE  IE RE
Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 1
1.2  2103  R E
RE  1.2
 600  Select standard value of resistance 560 Ω.
2 103
Voltage across collector resistance, VRC  VCC VCE VRE
 12  6 1.2  4.8
V
VRC
R  4.8  2.4 kΩ
C IC  Select standard value of 2.2 kΩ
2103
I 2 103
Base current, I B  C
  18.2
 μA 110
Take
I2  the I1  10IB  IB  11IB
10IB n
Base voltage, VB  VRE  VBE  1.2  0.6  1.8 V

VB
R  1.8  9.9 k Select standard value of 10 kΩ
2
I2  10 18.2106
VCC VB
R  12 1.8
1 I1  1118.2106  51 Select standard value of 47 kΩ
k
Design of RL:
Gain of the common emitter amplifier is given by the expression A

 rc 
 V  
 re 
25 mV
where r  R  R and r   12.5 
c C
L
e
2 mA
For a gain of 50, substituting it in the expression we get, RL=873 Ω.

Select standard value of 820 Ω for RL
Design of coupling capacitors CC1 and CC2
XC1 should be less than the input impedance of the transistor. Here, Rin is the series impedance.
Rin
Then X 
C1
10
Here R  R  R  h r  47kΩ  10 kΩ  110 12.5   1.17 kΩ
in 1 2 fe e
We get Rin=1.17 kΩ. Then XC1 ≤ 117 Ω.
For a lower cut off frequency of 200 Hz, CC1 1 1

 2  200  6.8 μF
 2 fXC1
117
Select standard value of 10 μF for CC1

Similarly, R
X C 2  out where Rout=RC. Then XCE ≤ 220Ω.
10
So, CC
2 1 1  3.6 μF
 
2 fXC 2 2  200 
220
Select standard value of 3.3 μF for CC2
Design of bypass capacitors CE

To bypass the lowest frequency (say 200 Hz), XCE should be much less than or equal to
the resistance RE.
R
X  E
CE
10
560
X 
ie. X  56
CE CE
10
Apply value of f such that the amplifier has good gain at a lower cutoff frequency of 200 Hz
1 1
CE   14.2 μF
2 fXCE  2  200 
56
Select standard value of 22 μF for CE
FREQUENCY RESPONSE
The gain of an ideal amplifier should remain the same for any frequency of the input
signal. Therefore, the frequency response curve (gain in db plotted against frequency) becomes a
straight line parallel to the frequency axis.
In actual practice, the coupling capacitors and the emitter bypass capacitor reduce the
gain at lower frequencies. The capacitance internal to the transistor and stray capacitance due to
the wiring reduce the gain at higher frequencies.
Fig 2 shows the typical frequency response characteristics of CE amplifier. The curve is
flat only for middle range of frequencies. There is one low frequency fL and one high frequency
fH

Fig 2. Frequency response

beyond which the gains, AL and AH are 1/√2 times the gain AM (maximum gain) at the middle
frequencies. The two frequencies are called lower and higher cut off frequencies. The difference
between them is called the bandwidth.
PROCEDURE
The circuit is set up as shown in figure 1. Input signal Vs is given to the circuit through a
signal generator (sinusoidal signal is applied). Measure the magnitude (peak to peak) of the input
by using CRO. Connect the CRO to the output side and the amplified output is observed.
Increase the frequency in steps and observe the magnitude of VO. The frequency response is
plotted in a semi log sheet.
OBSERVATIONS
Readings are to be taken till Vo decreases appreciably at high frequencies
Vin =..........................(p-p)(mV)
Gain in db
Frequency Vo(p-p) Vo 20 log Vo
f (Hz) (mV) Vin Vin
RESULT
The common emitter amplifier is designed, and its frequency response is plotted.
Voltage gain = Vo/Vin =
Lower cutoff frequency =
Upper cutoff frequency =
Bandwidth =
QUESTIONS
1. Define β.
2. Explain in detail procedure for measuring β.
3. Using the values of β, determine the value of α.
4. What are the differences, if any in determining the current gain of NPN and PNP
transistors?
5. In the circuit, what should be the effect of reversing the polarity of VBB?
6. What is meant by bias stabilization? Why it is used?
7. What is the phase relationship between the input and output signals of CE amplifier?

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Experiment No. 4 Common Emitter Amplifier

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Experiment No.

1. To design a small signal voltage amplifier.

Fig 1. Circuit diagram

Base voltage, VB  VRE  VBE  1.2  0.6  1.8 V

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 2

For a gain of 50, substituting it in the expression we get, RL=873 Ω.

Design of coupling capacitors CC1 and CC2

We get Rin=1.17 kΩ. Then XC1 ≤ 117 Ω.

For a lower cut off frequency of 200 Hz, CC1 1 1

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 3

Design of bypass capacitors CE

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 4

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 5

Electronic Circuits Lab, Department of Electrical Engineering, College of Engineering Trivandrum 6

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