Frequency Response of A Single Stage RC Coupled Amplifier
Frequency Response of A Single Stage RC Coupled Amplifier
Frequency Response of A Single Stage RC Coupled Amplifier
-1
Aim: To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back
and without feedback and find the following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product
Component: Resistances: 100k Ω = 01, 4.7k Ω = 01, 22k Ω = 01, 220k Ω = 01, 220 Ω = 01
Capacitors: 10µf = 02, 47 µf = 01
Transistor BC107 = 01
Connecting wire and DSO Probe
Introduction
A practical amplifier circuit is meant to raise the voltage level of the input signal. This signal
may be obtained from anywhere e.g. radio or TV receiver circuit. Such a signal is not of a single
frequency. But it consists of a band of frequencies, e.g. from 20 Hz to 20 KHz. If the
loudspeakers are to reproduce the sound faithfully, the amplifier used must amplify all the
frequency components of signal by same amount. If it does not do so, the output of the
loudspeaker will not be the exact replica of the original sound. When this happen then it means
distortion has been introduced by the amplifier. Consider an RC coupled amplifier circuit shown
fig 1 shows frequency response curve of a RC coupled amplifier. The curve is usually plotted on
a semi log graph paper with frequency range on logarithmic scale so that large frequency range
can be accommodated. The gain is constant for a limited band of frequencies. This range is
called mid-frequency band and gain is called mid band gain. AVM. On both sides of the mid
frequency range, the gain decreases. For very low and very high frequencies the gain is almost
zero.
In mid band frequency range, the coupling capacitors and bypass capacitors are as good as short
circuits. But when the frequency is low. These capacitors can no longer be replaced by the short
circuit approximation.
At low frequency, output capacitor reactance increases. The voltage across RL reduces because
some voltage drop takes place across XC. Thus output voltage reduces.
The XC reactance not only reduces the gain but also change the phase between input and output.
It would not be exactly 180o but decided by the reactance. At zero frequency, the capacitors are
open circuited therefore output voltage reduces to zero.
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The gain is constant over a frequency range. The frequencies at which the gain reduces to 70.7%
of the maximum gain are known as cut off frequencies, upper cut off and lower cut off frequency
fig. 2, shows these two frequencies. The difference of these two frequencies is called Band width
(BW) of an amplifier.
BW = f2 – f1.
Fig. 2
At f1 and f2, the voltage gain becomes 0.707 Am(1 / 2). The output voltage reduces to 1 / 2
of maximum output voltage. Since the power is proportional to voltage square, the output power
at these frequencies becomes half of maximum power. The gain on dB scale is given by
If the difference in gain is more than 3 dB, then it can be detected by human. If it is less than 3
dB it cannot be detected.
Procedure:
1. Connect the circuit as shown in the diagram.
2. Apply a sinusoidal input signal of = from a signal generator.
3. Connect the output to the DSO
4. Measure output voltage and calculate gain
5. Keeping the input voltage constant vary the input frequency and note the output
voltage of the Amplifier till the output decrease upto a -3dB point.
6. Draw a graph between input frequency Vs output voltage
7. For without feedback short terminal A and B by a connecting wire and repeat
procedure 1 to 6.
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Circuit:
VDC = + 12V
R1 R3
100K 4.7K
C2
To Digital Storage Oscilloscope (DSO)
Q1 1n
C1
Observation table
Vin = 20mv
Result:
1. Voltage Gain ………………………….
4. Bandwidth ……………………………
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Experiment No. -2
Aim: To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the
following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product and loading effect
Component: Resistances: 100k Ω = 02, 4.7k Ω = 02, 22k Ω = 02, 220k Ω = 02, 220 Ω = 02
Capacitors: 10µf = 04, 47 µf = 02
Transistor BC107 = 02
Connecting wire and DSO Probe
Introduction
To increases the voltage gain of the amplifier, multiple amplifier are connects in cascade. The
output of one amplifier is the input to another stage. In this way the overall voltage gain can be
increased, when number of amplifier stages are used in succession it is called a multistage
amplifier or cascade amplifier. The load on the first amplifier is the input resistance of the
second amplifier. The various stages need not have the same voltage and current gain. In
practice, the earlier stages are often voltage amplifiers and the last one or two stages are current
amplifiers. The voltage amplifier stages assure that the current stages have the proper input
swing. The amount of gain in a stage is determined by the load on the amplifier stage, which is
governed by the input resistance to the next stage. Therefore, in designing or analyzing
multistage amplifier, we start at the output and proceed toward the input.
Fig. 1
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In fig. 1, the overall voltage gain is the product of the voltage gain of each stage. That is, the
overall voltage gain is ABC.
To represent the gain of the cascade amplifier, the voltage gains are represents in dB. The two
power levels of input and output of an amplifier are compared on a logarithmic scale rather than
linear scale. The number of bels by which the output power P2 exceeds the input power P1 is
defined as
Because of dB scale the gain can be directly added when a number of stages are cascaded.
Types of Coupling:
In a multistage amplifier the output of one stage makes the input of the next stage. Normally a
network is used between two stages so that a minimum loss of voltage occurs when the signal
passes through this network to the next stage. Also the dc voltage at the output of one stage
should not be permitted to go to the input of the next. Otherwise, the biasing of the next stage are
disturbed.
1. RC coupling
2. Impedance coupling
3. Transformer coupling.
Page 5 of 26
RC coupling:
Fig. 2 shows RC coupling the most commonly used method of coupling from one stage to the
next. An ac source with a source resistance R S drives the input of an amplifier. The grounded
emitter stage amplifies the signal, which is then coupled to next CE stage the signal is further
amplified to get larger output.
In this case the signal developed across the collector resistor of each stage is coupled into the
base of the next stage. The cascaded stages amplify the signal and the overall gain equals the
product of the individual gains.
The coupling capacitors pass ac but block dc Because of this the stages are isolated as for as dc is
concerned. This is necessary to avoid shifting of Q-points. The drawback of this approach is the
lower frequency limit imposed by the coupling capacitor.
The bypass capacitors are needed because they bypass the emitters to ground. Without them, the
voltage gain of each stage would be lost. These bypass capacitors also place a lower limit on the
frequency response. As the frequency keeps decreasing, a point is reached at which capacitors no
longer look like a.c. shorts. At this frequency the voltage gain starts to decrease because of the
local feedback and the overall gain of the amplifier drops significantly. These amplifiers are
suitable for frequencies above 10 Hz.
Circuit:
VDC = + 12V
R1 R3 R6 R5
100K 4.7K 100K 4.7K
C2 C4
To Digital Storage Oscilloscope (DSO)
Q1 10UFD Q2 1n
C1
Procedure:
Page 6 of 26
1. Connect the circuit as shown in the diagram.
5. Keeping the input voltage constant vary the input frequency and note the output
voltage of the Amplifier till the output decrease upto a -3dB point.
Observation table
Vin = 20mv
Result:
1. Voltage Gain ………………………….
4. Bandwidth ……………………………
Page 7 of 26
Experiment No. -3
Aim: To Plot the Frequency Response of a FET Common Source Amplifier find the
following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product
Introduction
When a small ac signal is coupled into the gate it produces variations in gate source voltage.
This produces a sinusoidal drain current. Since an ac current flows through the drain resistor. An
amplified ac voltage is obtained at the output. An increase in gate source voltage produces more
drain current, which means that the drain voltage is decreasing. Since the positive half cycle of
input voltage produces the negative half cycle of output voltage, we get phase inversion in a CS
amplifier.
Fig. 1
vout = - gm v gS RD
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Negative sign means phase inversion. Because the ac source is directly connected between the
gate source terminals therefore ac input voltage equals
Vin = Vgs
Circuit:
VDC = + 12V
R1 R3
8.2K 470
C2
To Digital Storage Oscilloscope (DSO)
10UFD
D
C1 FET
BFW11
Signal Generator 10UFD G
S
A
VOFF = 0V
VAMPL = 20MV
FREQ = 1KHZ C3
R2 R4 100UFD
4.7K 100
B
0
Procedure:
5. Keeping the input voltage constant vary the input frequency and note the output
voltage of the Amplifier till the output decrease upto a -3dB point.
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Observation table
Vin = 20mv
Result:
1. Voltage Gain ………………………….
4. Bandwidth ……………………………
Page 10 of 26
Experiment No. -4
Aim: To study and calculate the input and output impedance of Darlington Amplifier and also
calculate the amplification factor.
Apparatus:
1. Power Supply
2. Bread Board
3. DMM
Introduction
Theory: consists of two emitter followers in cascaded mode as shown in fig. 1. The overall gain
is close to unity. The main advantage of Darlington amplifier is very large increase in input
impedance and an equal decrease in output impedance .
Fig. 1
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Output impedance:
RTH = RS || R1 || R2
Similar to single stage common collector amplifier, the output impedance of the two stages
zout(1) and zout(2) are given by.
Circuit:
+ C
B
VDC BC107A
Driver
- B SL100
E
Output
Vin +
-
E
R1
Vout
1k
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Procedure:
2. Connect the DC voltage source to the input of BC 107 transistor through a DMM
3. Connect 100Ω resistance to the emitter , through another DMM connected as an ammeter
4. Adjust the input voltage to 5v and note down the reading of input current and output
current.
7. Repeat same procedure for SL 100 transistor and find out the amplification factor of
SL100, is β2
8. Now, connect dc voltage to the base of transistor BC107 , connect BC 107 emitter to base
of SL100 and 100Ω resistance to SL 100 emitter , which form the Darlington circuit.
9. Measure the input current and voltage , output current and voltage.
11. Ration of input voltage and input current gives impedance and ration of output voltage
Result:
1. Amplification factor β1…………………………………
4. Input impedance………………………………..
5. output impedance……………………………..
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Experiment No. -5
Introduction
The common electrode s are then connected to a large voltage source through a large
resistor forming the long tail of the name the long tail providing an approximate constant current
source. In more sophisticated designs a true (active ) constant current source may be substitute
for a long tail.
Connect in fashion , this gives the circuit two input which are differentially amplifies
(Subtracted and multiplied) by the pair. The output may be a single ended or differential
depended on the need of the subsequent circuitry.
Circuit:
Emitter Coupled Diffential Amplifier
+12v
R1
1k R2
1k
VC2 out
VC1 out
+
R4 BC107 R5
VDC 470
BC107
470
- V1 in V2 in
R3
5.6k
-12v
Fig. 1
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Procedure: for DC characteristics
1. Adjust the AC voltage of the signal generator to 10mv RMS voltage (IKHz)
2. Connect signal generator out put to one of the input terminal of a differential amplifier
and short the other input to ground.
3. Measure the AC output voltage between two collector output of a differential amplifier
with DMM
4. Calculate the differential gain Ad = output/input
5. Now connect both input together to the signal generator , and adjust the voltage to 200mv
6. Again measure the AC output voltage between two collector outputs of the differential
amplification with DMM
7. Calculate the common mode gain Ac output / input
8. With the above values calculate the CMRR = Differential gain / common mode gain
Result:
CMRR :…………………………………..
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Experiment No. -6
Aim: To Construct RC phase shift oscillator and to measure the output frequency
Introduction
At low frequencies (around 100 kHz or less), resistors and capacitors are usually employed to
determine the frequency of oscillation. Fig shows transistorized phase shift oscillator circuit
employing RC network. If the phase shift through the common emitter amplifier is 180°, then the
oscillation may occur at the frequency where the RC network produces an additional 180° phase
shift.
Since a transistor is used as the active element, the output across R of the feedback network is
shunted by the relatively low input resistance of the transistor, because input diode is a forward
biased diode
Hence, instead of employing voltage series feedback, voltage shunt feedback is used for a transistor
phase shift oscillator.
Circuit:
+12V
R2 R1
100K 5.1k
C2
DSO
Q1 0.1uf d
B C1
A OUTPUT
0.1uf d
signal generator V1
BC107A
VAMPL = 20mv
R3
FREQ = 1kHz 10K
R6 C3
1k 0.1uf d
R5
10K
Page 16 of 26
Fig.1
Feedback
C4 C5 C6
0.1uf d 0.1uf d
0.1uf d
R7 R10 R11
1k 1k 1k
+12V
R2 R1
100K 5.1k
C2
DSO
Q1 0.1uf d
B C1
OUTPUT
0.1uf d BC107A
R3
10K
R6 C3
1k 0.1uf d
R5
10K
Fig.2
Procedure :
Result:
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Experiment No. -7
Aim: To study Wein Bridge Oscillator and to measure the output frequency
The Wien Bridge oscillator is a standard oscillator circuit for low to moderate frequencies, in the
range 5Hz to about 1MHz. It is mainly used in audio frequency generators.
The Wien Bridge oscillator uses a feedback circuit called a lead lag network as shown in fig 1
Fig.1
At very low frequencies, the series capacitor looks open to the input signal and there is no
output signal. At very high frequencies the shunt capacitor looks shorted, and there is no
output. In between these extremes, the output voltage reaches a maximum value. The
frequency at which the output is maximized is called the resonant frequency. At this frequency,
the feedback fraction reaches a maximum value of 1/3.
At very low frequencies, the phase angle is positive, and the circuit acts like a lead network. On
the other hand, at very high frequencies, the phase angle is negative, and the circuit acts like a
lag network. In between, there is a resonant frequency fr at which the phase angle equals 0°.
Page 19 of 26
Circuit:
A
R9 R10
+12V
1k 1k R1 R3 R5 R7
Feedback
OUTPUT
R11 R12
0.1uf d 1k 1k R2 R6
2.7k 2.7k
R4
F 1k R8
1K C3
47uf d
Fig.1
Procedure :
Result:
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Experiment No. -8
Aim: To study Hartley and colpitts oscillator and to measure the output frequency
Introduction
Wein bridge and RC phase shift oscillator is not suited to high frequencies (above 1MHz). The
main problem is the phase shift through the amplifier.
The alternative is an LC oscillator, a circuit that can be used for frequencies between 1MHz and
500MHz.. With an amplifier and LC tank circuit, we can feedback a signal with the right amplitude
and phase is feedback to sustain oscillations. shows the circuit of LC oscillator. The voltage divider
bias sets up a quiescent operating point. The circuit then has a low frequency voltage gain of rc /
r'e where rc is the ac resistance seen by the selector. Because of the base and collector lag networks,
the high frequency voltage gain is less then rc / r'e.
+12V
R3
100K 5.1k
C2
B
Q2 0.1uf d
C1
TO DSO
C
D SL100
0.1uf d
OUTPUT
0.1uf d 2 R2
10K R4
1k 0.1uf d
10mh
R5
0
.01uf d 1
1K
Fig.1
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Circuit: Hartley Oscillator
+12V
R3
100K 5.1k
C C2
B
D
Q2 0.1uf d
2 C1
TO DSO
10mh SL100
0.1uf d
OUTPUT
1
2 R2
0.1uf d
10K R4
1k 0.1uf d
0 10mh
R5
1
A 1K
Fig.2
Result:
Compare both theoretical and practical frequencies
Result:
Compare both theoretical and practical frequencies
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DELHI TECHNOLOGICAL UNIVERSITY
ELECTRONICS & COMMUNICATION ENGG. DEPTT.
ELECTRONICS DEVICES AND CIRCUITS- I LAB
4. To study and plot the input and out put characteristics of the given transistor in CB
(common base) configuration.
5. To study and plot the input and out put characteristics of the given transistor in
CE(common emitter) configuration.
Page 23 of 26
DELHI TECHNOLOGICAL UNIVERSITY
ELECTRONICS & COMMUNICATION ENGG. DEPTT.
ELECTRONICS DEVICES AND CIRCUITS- II LAB
1. To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back
and without feedback and find the following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product
2. To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the
Following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product and loading effect
3. To Plot the Frequency Response of a FET Common Source Amplifier find the
following:
1. Voltage Gain
2. Lower cut off Frequency
3. Upper cut off Frequency
4. Bandwidth
5. Gain Bandwidth Product
4. To study and calculate the input and output impedance of Darlington Amplifier and also
calculate the amplification factor
8. To study Hartley and colpitts oscillator and to measure the output frequency
Page 24 of 26
DELHI TECHNOLOGICAL UNIVERSITY
ELECTRONICS & COMMUNICATION ENGG. DEPTT.
FOR
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DELHI TECHNOLOGICAL UNIVERSITY
ELECTRONICS & COMMUNICATION ENGG. DEPTT.
FOR
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