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WO2024222367A1 - Radio frequency power amplifier and radio frequency power amplifier module - Google Patents

Radio frequency power amplifier and radio frequency power amplifier module Download PDF

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Publication number
WO2024222367A1
WO2024222367A1 PCT/CN2024/084273 CN2024084273W WO2024222367A1 WO 2024222367 A1 WO2024222367 A1 WO 2024222367A1 CN 2024084273 W CN2024084273 W CN 2024084273W WO 2024222367 A1 WO2024222367 A1 WO 2024222367A1
Authority
WO
WIPO (PCT)
Prior art keywords
power amplifier
capacitor
transistor
bias circuit
output
Prior art date
Application number
PCT/CN2024/084273
Other languages
French (fr)
Chinese (zh)
Inventor
朱魏
郭嘉帅
Original Assignee
深圳飞骧科技股份有限公司
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Publication of WO2024222367A1 publication Critical patent/WO2024222367A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to the field of wireless communication technology, and in particular to a radio frequency power amplifier and a radio frequency power amplifier module.
  • wireless communication technology With the advancement of the information age, wireless communication technology has developed rapidly. Mobile phones, wireless LANs and Bluetooth have become an indispensable part of its development. The advancement of wireless communication technology is inseparable from the development of radio frequency circuits and microwave technology.
  • Portable mobile communication equipment is an application of wireless communication.
  • the distance between the base station and the mobile device will cause the output power of the power amplifier to be increased or decreased accordingly. That is, when the power amplifier is in high power mode, the higher the gain, the better, preferably greater than 30dB. On the contrary, when the power amplifier is in low power mode, the gain cannot be too high, and generally needs to be less than 20dB to meet the application of the whole machine.
  • the power amplifier of the related technology generally adopts S parameter matching to improve the gain of the power amplifier when it is in high power mode and reduce the gain of the power amplifier when it is in low power mode. Although this method can increase the gain of the power amplifier when it is in high power mode and reduce the gain of the power amplifier when it is in low power mode, it will worsen the linear distortion of the power amplifier.
  • the object of the present invention is to provide a radio frequency power amplifier to solve the problem that the power amplifier in the related art can increase the gain when it is in a high power mode and increase the gain when it is in a low power mode.
  • the gain is reduced in power mode, but its linearity distortion problem is aggravated.
  • the present invention provides a radio frequency power amplifier, which includes a signal input terminal, an input matching network, a first capacitor, a second capacitor, a first bias circuit, a first power amplifier, a third capacitor, a fourth capacitor, a second bias circuit, a second power amplifier, an inter-stage matching network, a fifth capacitor, a sixth capacitor, a third bias circuit, a third power amplifier, a seventh capacitor, an eighth capacitor, a fourth bias circuit, a fourth power amplifier, an output matching network and a signal output terminal;
  • the input end of the input matching network is connected to the signal input end;
  • the first end of the first capacitor is connected to the output end of the input matching network; the first end of the second capacitor is connected to the first end of the first capacitor, and the second end of the second capacitor is connected to the second end of the first capacitor; the output end of the first bias circuit is connected to the second end of the first capacitor;
  • the input end of the first power amplifier is connected to the second end of the first capacitor, the first output end of the first power amplifier is connected to a first power supply, and the second output end of the first power amplifier is grounded; the first bias circuit is used to provide a bias voltage for the first power amplifier;
  • the first end of the third capacitor is connected to the output end of the input matching network; the first end of the fourth capacitor is connected to the first end of the third capacitor, and the second end of the fourth capacitor is connected to the second end of the third capacitor; the output end of the second bias circuit is connected to the second end of the fourth capacitor;
  • the input end of the second power amplifier is connected to the second end of the third capacitor, the first output end of the second power amplifier is connected to the first output end of the first power amplifier, and the second output end of the second power amplifier is grounded; the second bias circuit is used to provide a bias voltage for the second power amplifier;
  • An input end of the inter-stage matching network is connected to a first output end of the first power amplifier
  • the first end of the fifth capacitor is connected to the output end of the inter-stage matching network; the first end of the sixth capacitor is connected to the first end of the fifth capacitor, The second end is connected to the second end of the fifth capacitor; the output end of the third bias circuit is connected to the second end of the sixth capacitor;
  • the input end of the third power amplifier is connected to the second end of the fifth capacitor, the first output end of the third power amplifier is connected to the second power supply, and the second output end of the third power amplifier is grounded;
  • the third bias circuit is used to provide a bias voltage for the third power amplifier;
  • the first end of the seventh capacitor is connected to the output end of the inter-stage matching network; the first end of the eighth capacitor is connected to the first end of the seventh capacitor, and the second end of the eighth capacitor is connected to the second end of the seventh capacitor; the output end of the fourth bias circuit is connected to the second end of the eighth capacitor;
  • the input end of the fourth power amplifier is connected to the second end of the seventh capacitor, the first output end of the fourth power amplifier is connected to the first output end of the third power amplifier, and the second output end of the fourth power amplifier is grounded; the fourth bias circuit is used to provide a bias voltage for the fourth power amplifier;
  • the input end of the output matching network is connected to the first output end of the third power amplifier
  • the signal output terminal is connected to the output terminal of the output matching network.
  • the RF power amplifier further includes a first resistor, a second resistor, a third resistor and a fourth resistor;
  • the two ends of the first resistor are respectively connected to the second end of the second capacitor and the second end of the first capacitor; the two ends of the second resistor are respectively connected to the second end of the fourth capacitor and the second end of the third capacitor; the two ends of the third resistor are respectively connected to the second end of the sixth capacitor and the second end of the fifth capacitor; the two ends of the fourth resistor are respectively connected to the second end of the eighth capacitor and the second end of the seventh capacitor.
  • the RF power amplifier further includes a first inductor and a second inductor;
  • Two ends of the first inductor are respectively connected to the first output end of the first power amplifier and the first power supply; two ends of the second inductor are respectively connected to the first output end of the third power amplifier and the second power supply.
  • the RF power amplifier further includes a third inductor, a fourth inductor, a fifth inductor and a sixth inductor;
  • the third inductor is connected in series to the second end of the second capacitor; the fourth inductor is connected in series to the second end of the fourth capacitor; the fifth inductor is connected in series to the second end of the sixth capacitor; and the sixth inductor is connected in series to the second end of the eighth capacitor.
  • the first power amplifier includes a first transistor; the second power amplifier includes a second transistor; the third power amplifier includes a third transistor; and the fourth power amplifier includes a fourth transistor.
  • the first transistor, the second transistor, the third transistor and the fourth transistor are all heterojunction bipolar transistors or field effect transistors.
  • the first bias circuit includes a fifth transistor, a fifth resistor, a sixth transistor, a ninth capacitor and a seventh transistor;
  • the first output end of the fifth transistor is connected to the first voltage terminal, and the second output end of the fifth transistor serves as the output end of the first bias circuit;
  • a first end of the fifth resistor is connected to a second voltage terminal
  • the input terminal of the sixth transistor is connected to the input terminal of the fifth transistor, and the first output terminal of the sixth transistor is connected to the second terminal of the fifth resistor;
  • the input terminal of the seventh transistor is connected to the first output terminal of the seventh transistor and to the second output terminal of the sixth transistor, and the second output terminal of the seventh transistor is grounded;
  • a first end of the ninth capacitor is connected to the second output end of the seventh transistor, and a second end of the ninth capacitor is connected to the input end of the fifth transistor.
  • the first bias transistor, the second bias transistor and the third bias transistor are all heterojunction bipolar transistors or field effect transistors.
  • the circuit structures of the second bias circuit, the third bias circuit and the fourth bias circuit are the same as the circuit structure of the first bias circuit.
  • the present invention provides a radio frequency power amplifier module, which includes the radio frequency power amplifier as described above.
  • the RF power amplifier in the present invention can control the working states of the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier respectively by controlling the working states of the first bias circuit, the second bias circuit, the third bias circuit and the fourth bias circuit, so that the gain of the RF power amplifier is increased when it is in a high power mode, and the gain of the RF power amplifier is reduced when it is in a low power mode.
  • the added second capacitor, the fourth capacitor, the sixth capacitor and the sixth capacitor are regarded as open circuits relative to the DC component and as short circuits relative to the AC component, so that the AC components of the bias currents of the first bias circuit, the second bias circuit, the third bias circuit and the fourth bias circuit flow to the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier, respectively, and can flow efficiently to the input ends of the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier through the first capacitor to the eighth capacitor, thereby effectively suppressing the gain compression and linear distortion of the RF power amplifier.
  • FIG1 is a circuit connection diagram of a first radio frequency power amplifier provided by an embodiment of the present invention.
  • FIG. 2 is a circuit connection diagram of a first bias circuit in a first RF power amplifier provided in an embodiment of the present invention
  • FIG3 is a circuit connection diagram of a second RF power amplifier provided in an embodiment of the present invention.
  • An embodiment of the present invention provides a radio frequency power amplifier 100, which, as shown in Figure 1, includes a signal input terminal RFIN, an input matching network 1, a first capacitor C1, a second capacitor C2, a first bias circuit 2, a first power amplifier, a third capacitor C3, a fourth capacitor C4, a second bias circuit 3, a second power amplifier, an inter-stage matching network 4, a fifth capacitor C5, a sixth capacitor C6, a third bias circuit 5, a third power amplifier, a seventh capacitor C7, an eighth capacitor C8, a fourth bias circuit 6, a fourth power amplifier, an output matching network 7 and a signal output terminal RFOUT.
  • the input terminal of the input matching network 1 is connected to the signal input terminal RFIN.
  • the first end of the first capacitor C1 is connected to the output end of the input matching network 1; the first end of the second capacitor C2 is connected to the first end of the first capacitor C1, and the second end of the second capacitor C2 is connected to the second end of the first capacitor C1; the output end of the first bias circuit 2 is connected to the second end of the first capacitor C1.
  • the input end of the first power amplifier is connected to the second end of the first capacitor C1, the first output end of the first power amplifier is connected to the first power supply VCC1, and the second output end of the first power amplifier is grounded; the first bias circuit 2 is used to provide a bias voltage for the first power amplifier.
  • a first end of the third capacitor C3 is connected to the output end of the input matching network 1; a first end of the fourth capacitor C4 is connected to the first end of the third capacitor C3, and a second end of the fourth capacitor C4 is connected to the second end of the third capacitor C3; and an output end of the second bias circuit 3 is connected to the second end of the fourth capacitor C4.
  • the input end of the second power amplifier is connected to the second end of the third capacitor C3, the first output end of the second power amplifier is connected to the first output end of the first power amplifier, and the second output end of the second power amplifier is grounded; the second bias circuit 3 is used to provide a bias voltage for the second power amplifier.
  • An input terminal of the inter-stage matching network 4 is connected to a first output terminal of the first power amplifier.
  • the first end of the fifth capacitor C5 is connected to the output end of the inter-stage matching network 4; the first end of the sixth capacitor C6 is connected to the first end of the fifth capacitor C5, and the second end of the sixth capacitor C6 is connected to the second end of the fifth capacitor C5; the output end of the third bias circuit 5 is connected to the second end of the sixth capacitor C6.
  • the input end of the third power amplifier is connected to the second end of the fifth capacitor C5, the first output end of the third power amplifier is connected to the second power supply VCC2, and the second output end of the third power amplifier is grounded; the third bias circuit 5 is used to provide a bias voltage for the third power amplifier.
  • the first end of the seventh capacitor C7 is connected to the output end of the inter-stage matching network 4; the first end of the eighth capacitor C8 is connected to the first end of the seventh capacitor C7, and the second end of the eighth capacitor C8 is connected to the second end of the seventh capacitor C7; the output end of the fourth bias circuit 6 is connected to the second end of the eighth capacitor C8.
  • the input end of the fourth power amplifier is connected to the second end of the seventh capacitor C7, the first output end of the fourth power amplifier is connected to the first output end of the third power amplifier, and the second output end of the fourth power amplifier is grounded; the fourth bias circuit 6 is used to provide a bias voltage for the fourth power amplifier.
  • An input terminal of the output matching network 7 is connected to the first output terminal of the third power amplifier.
  • the signal output terminal RFOUT is connected to the output terminal of the output matching network 7 .
  • the signal input terminal RFIN is used to input a radio frequency signal.
  • the first capacitor C1, the third capacitor C3, the fifth capacitor C5 and the seventh capacitor C7 are used as DC blocking capacitors.
  • the first capacitor C1 and the third capacitor C3 are used to isolate the DC power supply (not shown) to prevent the DC power supply from entering the signal input terminal RFIN.
  • the fifth capacitor C5 and the seventh capacitor C7 are used to isolate the first power supply VCC1 to prevent the first power supply VCC1 from entering the corresponding third power amplifier and fourth power amplifier.
  • the second capacitor C2 , the fourth capacitor C4 , the sixth capacitor C6 and the eighth capacitor C8 are used as capacitors for suppressing linear distortion, that is, for suppressing the deterioration of the linear distortion of the RF power amplifier 100 .
  • the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 are respectively connected to the first power amplifier, the second power amplifier, the third power amplifier and the and a fourth power amplifier providing a bias voltage.
  • the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier are respectively used to amplify the radio frequency signals input to the input ends thereof.
  • the input matching network 1 is used for impedance matching to minimize the power transmission loss between the first power amplifier and the second power amplifier;
  • the inter-stage matching network 4 is used for impedance matching between the first power amplifier and the second power amplifier at the front stage and the third power amplifier and the fourth power amplifier at the rear stage, so that more power output from the front stage can reach the rear stage;
  • the output matching network 7 is used for impedance matching between the third power amplifier and the fourth power amplifier to the signal output terminal RFOUT, so as to maximize the output power.
  • the signal output terminal RFOUT is used to output the amplified RF signal to the outside.
  • the first power amplifier includes a first transistor Q1; the second power amplifier includes a second transistor Q2; the third power amplifier includes a third transistor Q3; and the fourth power amplifier includes a fourth transistor Q4.
  • the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 can be one or multiple transistors connected in parallel, and the specific number depends on the area of the transistors after design simulation.
  • the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 are all heterojunction bipolar transistors (HBT, Heterojunction Bipolar Transistor) or field effect transistors (MOSFET, Metal oxide semiconductor Field Effect Transistor, Metal oxide semiconductor field effect transistor).
  • HBT Heterojunction Bipolar Transistor
  • MOSFET Metal oxide semiconductor Field Effect Transistor
  • Metal oxide semiconductor field effect transistor Metal oxide semiconductor field effect transistor
  • the base of the heterojunction bipolar transistor serves as the input terminal of the corresponding power amplifier
  • the collector of the heterojunction bipolar transistor serves as the first output terminal of the corresponding power amplifier
  • the emitter of the heterojunction bipolar transistor serves as the second output terminal of the corresponding power amplifier
  • the gate of the field effect transistor serves as the input terminal of the corresponding power amplifier
  • the drain of the field effect transistor serves as the first output terminal of the corresponding power amplifier
  • the source of the field effect transistor serves as the second output terminal of the corresponding power amplifier.
  • the first bias circuit 2 includes a fifth transistor Q5, a first a fifth resistor R5, a sixth transistor Q6, a ninth capacitor C9 and a seventh transistor Q7.
  • a first output terminal of the fifth transistor Q5 is connected to the first voltage terminal VBAT, and a second output terminal of the fifth transistor Q5 serves as an output terminal of the first bias circuit 2 .
  • a first end of the fifth resistor R5 is connected to the second voltage terminal Vreg.
  • An input terminal of the sixth transistor Q6 is connected to the input terminal of the fifth transistor Q5 , and a first output terminal of the sixth transistor Q6 is connected to a second terminal of the fifth resistor R5 .
  • An input terminal of the seventh transistor Q7 is connected to a first output terminal of the seventh transistor Q7 and to a second output terminal of the sixth transistor Q6 , and a second output terminal of the seventh transistor Q7 is grounded.
  • a first terminal of the ninth capacitor C9 is connected to the second output terminal of the seventh transistor, and a second terminal of the ninth capacitor C9 is connected to the input terminal of the fifth transistor Q5.
  • the fifth resistor R5 is used for voltage division to adjust the bias voltage finally output; the sixth transistor Q6 and the seventh transistor Q7 are used as diodes respectively to achieve the clamping effect; the fifth transistor Q5 is used to output the bias current Ib to provide the bias voltage for the corresponding field effect transistor; the first voltage terminal VBAT is used to provide the working voltage for the fifth transistor Q5 so that the fifth transistor Q5 can work normally, thereby outputting the bias current Ib; the second voltage terminal Vreg is used to provide power for the entire bias circuit.
  • the fifth transistor Q5, the sixth transistor Q6 and the seventh transistor Q7 are all heterojunction bipolar transistors or field effect transistors; if a heterojunction bipolar transistor is selected, the base of the heterojunction bipolar transistor serves as the input terminal of the corresponding transistor, the collector of the heterojunction bipolar transistor serves as the first output terminal of the corresponding transistor, and the emitter of the heterojunction bipolar transistor serves as the second output terminal of the corresponding transistor; if a field effect transistor is selected, the gate of the field effect transistor serves as the input terminal of the corresponding transistor, the drain of the field effect transistor serves as the first output terminal of the corresponding transistor, and the source of the field effect transistor serves as the second output terminal of the corresponding transistor.
  • the circuit structures of the second bias circuit 3 , the third bias circuit 5 and the fourth bias circuit 6 are the same as the circuit structure of the first bias circuit 2 , and are not described in detail herein.
  • the RF power amplifier 100 further includes a first resistor R1 , a second resistor R2 , a third resistor R3 and a fourth resistor.
  • the two ends of the first resistor R1 are respectively connected to the second end of the second capacitor C2 and the second end of the first capacitor C1; the two ends of the second resistor R2 are respectively connected to the second end of the fourth capacitor C4 and the second end of the third capacitor C3; the two ends of the third resistor R3 are respectively connected to the second end of the sixth capacitor C6 and the second end of the fifth capacitor C5; the two ends of the fourth resistor are respectively connected to the second end of the eighth capacitor C8 and the second end of the seventh capacitor C7.
  • the first resistor R1 , the second resistor R2 , the third resistor R3 and the fourth resistor are used as ballast resistors to improve the thermal stability of the transistors connected to them.
  • the RF power amplifier 100 further includes a first inductor L1 and a second inductor L2.
  • Two ends of the first inductor L1 are connected to the first output end of the first power amplifier and the first power supply VCC1 respectively; two ends of the second inductor L2 are connected to the first output end of the third power amplifier and the second power supply VCC2 respectively.
  • the first inductor L1 and the second inductor L2 are used as choke inductors to prevent the radio frequency signal from leaking to the corresponding first power source VCC1 and the second power source VCC2.
  • the RF power amplifier 100 further includes a third inductor L3 , a fourth inductor L4 , a fifth inductor L5 and a sixth inductor L6 .
  • the third inductor L3 is connected in series to the second end of the second capacitor C2; the fourth inductor L4 is connected in series to the second end of the fourth capacitor C4; the fifth inductor L5 is connected in series to the second end of the sixth capacitor C6; the sixth inductor L6 is connected in series to the second end of the eighth capacitor C8.
  • the third inductor L3, the fourth inductor L4, the fifth inductor L5 and the sixth inductor L6 can form a resonant circuit with their respective series capacitors to change the resonant frequency, thereby changing the AC component of the bias current Ib output by the corresponding bias circuits, thereby more accurately suppressing the gain compression and linear distortion deterioration of the RF power amplifier 100.
  • connection can be understood as “electrical connection”, “electrical connection” and “communication connection” between two devices, etc., which are connection modes that can transmit radio frequency signals.
  • the working principle of the RF power amplifier 100 is described below by way of example:
  • the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 respectively operate in different states.
  • the first bias circuit 2 provides a bias voltage for the first transistor Q1
  • the second bias circuit 3 provides a bias voltage for the second transistor Q2
  • the third bias circuit 5 provides a bias voltage for the third transistor Q3
  • the fourth bias circuit 6 provides a bias voltage for the fourth transistor Q4, so that the first transistor Q1 to the fourth transistor Q4 are all in the working state, so that the gain of the RF power amplifier 100 is the highest, that is, the gain is improved.
  • the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 respectively operate in different states, specifically, the first bias circuit 2 does not provide a bias voltage for the first transistor Q1, the second bias circuit 3 provides a bias voltage for the second transistor Q2, the third bias circuit 5 does not provide a bias voltage for the third transistor Q3, and the fourth bias circuit 6 provides a bias voltage for the fourth transistor Q4, so that the first transistor Q1 and the third transistor Q3 are both in a non-operating state, and the second transistor Q2 and the fourth transistor Q4 are in an operating state, thereby reducing the gain of the RF power amplifier 100 and improving its overall efficiency.
  • the first transistor Q1 to the fourth transistor Q4 can perform different working state combinations in the high power mode or the low power mode.
  • the first transistor Q1 is working, the second transistor Q2 is not working, the third transistor Q3 is working, and the fourth transistor Q4 is not working, which can also achieve the effect of improving the gain; for example, the first transistor Q1 is not working, the second transistor Q2 is working, the third transistor Q3 is working, and the fourth transistor Q4 is not working, which can also achieve the effect of reducing the gain and compromising the efficiency. Examples are not given one by one here.
  • the RF power amplifier 100 in this embodiment can control the working states of the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier respectively by controlling the working states of the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6, so as to increase the gain when the RF power amplifier 100 is in the high power mode and reduce the gain when the RF power amplifier 100 is in the low power mode, and at the same time, the added second capacitor C2, the fourth capacitor C4, the sixth capacitor C5 and the fourth capacitor C6 are Capacitor C6 and the sixth capacitor C6 are regarded as open circuits with respect to the DC component and as short circuits with respect to the AC component, so that the AC components of the bias currents Ib of the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 flow to the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier, respectively, and can flow efficiently to the input ends of the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power
  • the present invention also provides an embodiment of a radio frequency power amplifier module, which includes the radio frequency power amplifier 100 in the above embodiment. Since the radio frequency power amplifier module in this embodiment includes the radio frequency power amplifier 100 in the above embodiment, it can also achieve the technical effect achieved by the radio frequency power amplifier 100 in the above embodiment, which will not be described in detail here.

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
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  • Amplifiers (AREA)

Abstract

Disclosed in the present invention are a radio frequency power amplifier and a radio frequency power amplifier module. The radio frequency power amplifier comprises a signal input end, an input matching network, a first capacitor, a second capacitor, a first bias circuit, a first power amplifier, a third capacitor, a fourth capacitor, a second bias circuit, a second power amplifier, an interstage matching network, a fifth capacitor, a sixth capacitor, a third bias circuit, a third power amplifier, a seventh capacitor, an eighth capacitor, a fourth bias circuit, a fourth power amplifier, an output matching network, and a signal output end. According to the radio frequency power amplifier in the present invention, deterioration of gain compression and linear distortion of the radio frequency power amplifier can be effectively suppressed.

Description

射频功率放大器及射频功放模组RF power amplifier and RF power amplifier module 【技术领域】[Technical field]
本发明涉及无线通信技术领域，尤其涉及一种射频功率放大器及射频功放模组。The present invention relates to the field of wireless communication technology, and in particular to a radio frequency power amplifier and a radio frequency power amplifier module.
【背景技术】[Background technology]
随着信息化时代的进步，无线通信技术有了飞速发展，从手机、无线局域网及蓝牙等已成为了其发展不可或缺的一部分，而无线通信技术的进步离不开射频电路和微波技术的发展。With the advancement of the information age, wireless communication technology has developed rapidly. Mobile phones, wireless LANs and Bluetooth have become an indispensable part of its development. The advancement of wireless communication technology is inseparable from the development of radio frequency circuits and microwave technology.
便携移动通信设备便是无线通信的一种应用，而在移动通信设备的功率放大器中，基站与移动设备的距离会使得功率放大器的输出功率需要进行相应的增大或相应的减小，即功率放大器处于高功率模式时增益越高越好，最好大于30dB，相反的，功率放大器处于低功率模式时增益不能太高，一般需要低于20dB才能满足整机的应用。Portable mobile communication equipment is an application of wireless communication. In the power amplifier of mobile communication equipment, the distance between the base station and the mobile device will cause the output power of the power amplifier to be increased or decreased accordingly. That is, when the power amplifier is in high power mode, the higher the gain, the better, preferably greater than 30dB. On the contrary, when the power amplifier is in low power mode, the gain cannot be too high, and generally needs to be less than 20dB to meet the application of the whole machine.
相关技术的功率放大器一般会采用S参数的匹配来提高功率放大器处于高功率模式时的增益，并降低功率放大器处于低功率模式时的增益，这种方式虽然能使功率放大器处于高功率模式时提高增益，并使功率放大器处于低功率模式时的降低增益，但却会恶化功率放大器的线性度失真。The power amplifier of the related technology generally adopts S parameter matching to improve the gain of the power amplifier when it is in high power mode and reduce the gain of the power amplifier when it is in low power mode. Although this method can increase the gain of the power amplifier when it is in high power mode and reduce the gain of the power amplifier when it is in low power mode, it will worsen the linear distortion of the power amplifier.
【发明内容】[Summary of the invention]
本发明的目的在于提供一种射频功率放大器，以解决相关技术中的功率放大器虽然能使其处于高功率模式时提高增益，并使其处于低 功率模式时的降低增益，但却会恶化其线性度失真的问题。The object of the present invention is to provide a radio frequency power amplifier to solve the problem that the power amplifier in the related art can increase the gain when it is in a high power mode and increase the gain when it is in a low power mode. The gain is reduced in power mode, but its linearity distortion problem is aggravated.
为了解决上述技术问题，第一方面，本发明提供了一种射频功率放大器，其包括信号输入端、输入匹配网络、第一电容、第二电容、第一偏置电路、第一功率放大器、第三电容、第四电容、第二偏置电路、第二功率放大器、级间匹配网络、第五电容、第六电容、第三偏置电路、第三功率放大器、第七电容、第八电容、第四偏置电路、第四功率放大器、输出匹配网络以及信号输出端；In order to solve the above technical problems, in a first aspect, the present invention provides a radio frequency power amplifier, which includes a signal input terminal, an input matching network, a first capacitor, a second capacitor, a first bias circuit, a first power amplifier, a third capacitor, a fourth capacitor, a second bias circuit, a second power amplifier, an inter-stage matching network, a fifth capacitor, a sixth capacitor, a third bias circuit, a third power amplifier, a seventh capacitor, an eighth capacitor, a fourth bias circuit, a fourth power amplifier, an output matching network and a signal output terminal;
所述输入匹配网络的输入端连接至所述信号输入端；The input end of the input matching network is connected to the signal input end;
所述第一电容的第一端连接至所述输入匹配网络的输出端；所述第二电容的第一端连接至所述第一电容的第一端，所述第二电容的第二端连接至所述第一电容的第二端；所述第一偏置电路的输出端连接至所述第一电容的第二端；The first end of the first capacitor is connected to the output end of the input matching network; the first end of the second capacitor is connected to the first end of the first capacitor, and the second end of the second capacitor is connected to the second end of the first capacitor; the output end of the first bias circuit is connected to the second end of the first capacitor;
所述第一功率放大器的输入端连接至所述第一电容的第二端，所述第一功率放大器的第一输出端连接至第一电源，所述第一功率放大器的第二输出端接地；所述第一偏置电路用于为所述第一功率放大器提供偏置电压；The input end of the first power amplifier is connected to the second end of the first capacitor, the first output end of the first power amplifier is connected to a first power supply, and the second output end of the first power amplifier is grounded; the first bias circuit is used to provide a bias voltage for the first power amplifier;
所述第三电容的第一端连接至所述输入匹配网络的输出端；所述第四电容的第一端连接至所述第三电容的第一端，所述第四电容的第二端连接至所述第三电容的第二端；所述第二偏置电路的输出端连接至所述第四电容的第二端；The first end of the third capacitor is connected to the output end of the input matching network; the first end of the fourth capacitor is connected to the first end of the third capacitor, and the second end of the fourth capacitor is connected to the second end of the third capacitor; the output end of the second bias circuit is connected to the second end of the fourth capacitor;
所述第二功率放大器的输入端连接至所述第三电容的第二端，所述第二功率放大器的第一输出端连接至所述第一功率放大器的第一输出端，所述第二功率放大器的第二输出端接地；所述第二偏置电路用于为所述第二功率放大器提供偏置电压；The input end of the second power amplifier is connected to the second end of the third capacitor, the first output end of the second power amplifier is connected to the first output end of the first power amplifier, and the second output end of the second power amplifier is grounded; the second bias circuit is used to provide a bias voltage for the second power amplifier;
所述级间匹配网络的输入端连接至所述第一功率放大器的第一输出端；An input end of the inter-stage matching network is connected to a first output end of the first power amplifier;
所述第五电容的第一端连接至所述级间匹配网络的输出端；所述第六电容的第一端连接至所述第五电容的第一端，所述第六电容的第 二端连接至所述第五电容的第二端；所述第三偏置电路的输出端连接至所述第六电容的第二端；The first end of the fifth capacitor is connected to the output end of the inter-stage matching network; the first end of the sixth capacitor is connected to the first end of the fifth capacitor, The second end is connected to the second end of the fifth capacitor; the output end of the third bias circuit is connected to the second end of the sixth capacitor;
所述第三功率放大器的输入端连接至所述第五电容的第二端，所述第三功率放大器的第一输出端连接至第二电源，所述第三功率放大器的第二输出端接地；所述第三偏置电路用于为所述第三功率放大器提供偏置电压；The input end of the third power amplifier is connected to the second end of the fifth capacitor, the first output end of the third power amplifier is connected to the second power supply, and the second output end of the third power amplifier is grounded; the third bias circuit is used to provide a bias voltage for the third power amplifier;
所述第七电容的第一端连接至所述级间匹配网络的输出端；所述第八电容的第一端连接至所述第七电容的第一端，所述第八电容的第二端连接至所述第七电容的第二端；所述第四偏置电路的输出端连接至所述第八电容的第二端；The first end of the seventh capacitor is connected to the output end of the inter-stage matching network; the first end of the eighth capacitor is connected to the first end of the seventh capacitor, and the second end of the eighth capacitor is connected to the second end of the seventh capacitor; the output end of the fourth bias circuit is connected to the second end of the eighth capacitor;
所述第四功率放大器的输入端连接至所述第七电容的第二端，所述第四功率放大器的第一输出端连接至所述第三功率放大器的第一输出端，所述第四功率放大器的第二输出端接地；所述第四偏置电路用于为所述第四功率放大器提供偏置电压；The input end of the fourth power amplifier is connected to the second end of the seventh capacitor, the first output end of the fourth power amplifier is connected to the first output end of the third power amplifier, and the second output end of the fourth power amplifier is grounded; the fourth bias circuit is used to provide a bias voltage for the fourth power amplifier;
所述输出匹配网络的输入端连接至所述第三功率放大器的第一输出端；The input end of the output matching network is connected to the first output end of the third power amplifier;
所述信号输出端连接至所述输出匹配网络的输出端。The signal output terminal is connected to the output terminal of the output matching network.
优选的，所述射频功率放大器还包括第一电阻、第二电阻、第三电阻以及第四电阻；Preferably, the RF power amplifier further includes a first resistor, a second resistor, a third resistor and a fourth resistor;
所述第一电阻的两端分别连接至所述第二电容的第二端和所述第一电容的第二端；所述第二电阻的两端分别连接至所述第四电容的第二端和所述第三电容的第二端；所述第三电阻的两端分别连接至所述第六电容的第二端和所述第五电容的第二端；所述第四电阻的两端分别连接至所述第八电容的第二端和所述第七电容的第二端。The two ends of the first resistor are respectively connected to the second end of the second capacitor and the second end of the first capacitor; the two ends of the second resistor are respectively connected to the second end of the fourth capacitor and the second end of the third capacitor; the two ends of the third resistor are respectively connected to the second end of the sixth capacitor and the second end of the fifth capacitor; the two ends of the fourth resistor are respectively connected to the second end of the eighth capacitor and the second end of the seventh capacitor.
优选的，所述射频功率放大器还包括第一电感和第二电感；Preferably, the RF power amplifier further includes a first inductor and a second inductor;
所述第一电感的两端分别连接至所述第一功率放大器的第一输出端和所述第一电源；所述第二电感的两端分别连接至所述第三功率放大器的第一输出端和所述第二电源。 Two ends of the first inductor are respectively connected to the first output end of the first power amplifier and the first power supply; two ends of the second inductor are respectively connected to the first output end of the third power amplifier and the second power supply.
优选的，所述射频功率放大器还包括第三电感、第四电感、第五电感以及第六电感；Preferably, the RF power amplifier further includes a third inductor, a fourth inductor, a fifth inductor and a sixth inductor;
所述第三电感串连至所述第二电容的第二端；所述第四电感串连只所述第四电容的第二端；所述第五电感串连至所述第六电容的第二端；所述第六电感串连至所述第八电容的第二端。The third inductor is connected in series to the second end of the second capacitor; the fourth inductor is connected in series to the second end of the fourth capacitor; the fifth inductor is connected in series to the second end of the sixth capacitor; and the sixth inductor is connected in series to the second end of the eighth capacitor.
优选的，所述第一功率放大器包括第一晶体管；所述第二功率放大器包括第二晶体管；所述第三功率放大器包括第三晶体管；所述第四功率放大器包括第四晶体管。Preferably, the first power amplifier includes a first transistor; the second power amplifier includes a second transistor; the third power amplifier includes a third transistor; and the fourth power amplifier includes a fourth transistor.
优选的，所述第一晶体管、所述第二晶体管、所述第三晶体管以及所述第四晶体管均为异质结双极晶体管或场效应晶体管。Preferably, the first transistor, the second transistor, the third transistor and the fourth transistor are all heterojunction bipolar transistors or field effect transistors.
优选的，所述第一偏置电路包括第五晶体管、第五电阻、第六晶体管、第九电容以及第七晶体管；Preferably, the first bias circuit includes a fifth transistor, a fifth resistor, a sixth transistor, a ninth capacitor and a seventh transistor;
所述第五晶体管的第一输出端连接至第一电压端子，所述第五晶体管的第二输出端作为所述第一偏置电路的输出端；The first output end of the fifth transistor is connected to the first voltage terminal, and the second output end of the fifth transistor serves as the output end of the first bias circuit;
所述第五电阻的第一端连接至第二电压端子；A first end of the fifth resistor is connected to a second voltage terminal;
所述第六晶体管的输入端连接至所述第五晶体管的输入端，所述第六晶体管的第一输出端连接至所述第五电阻的第二端；The input terminal of the sixth transistor is connected to the input terminal of the fifth transistor, and the first output terminal of the sixth transistor is connected to the second terminal of the fifth resistor;
所述第七晶体管的输入端连接至所述第七晶体管的第一输出端，并与所述第六晶体管的第二输出端连接，所述第七晶体管的第二输出端接地；The input terminal of the seventh transistor is connected to the first output terminal of the seventh transistor and to the second output terminal of the sixth transistor, and the second output terminal of the seventh transistor is grounded;
所述第九电容的第一端连接至所述七晶体管的第二输出端，所述第九电容的第二端连接至所述第五晶体管的输入端。A first end of the ninth capacitor is connected to the second output end of the seventh transistor, and a second end of the ninth capacitor is connected to the input end of the fifth transistor.
优选的，所述第一偏置晶体管、所述第二偏置晶体管以及所述第三偏置晶体管均为异质结双极晶体管或场效应晶体管。Preferably, the first bias transistor, the second bias transistor and the third bias transistor are all heterojunction bipolar transistors or field effect transistors.
优选的，所述第二偏置电路、所述第三偏置电路以及所述第四偏置电路的电路结构均与所述第一偏置电路的电路结构相同。Preferably, the circuit structures of the second bias circuit, the third bias circuit and the fourth bias circuit are the same as the circuit structure of the first bias circuit.
第二方面，本发明提供了一种射频功放模组，其包括如上所述的射频功率放大器。 In a second aspect, the present invention provides a radio frequency power amplifier module, which includes the radio frequency power amplifier as described above.
与相关技术相比，本发明中的射频功率放大器可以通过控制第一偏置电路、第二偏置电路、第三偏置电路和第四偏置电路的工作状态来分别控制第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的工作状态，以使射频功率放大器处于高功率模式时提高增益，并使射频功率放大器处于低功率模式时的降低增益，同时使增设的第二电容、第四电容、第六电容和第六电容相对于直流分量视为开路，相对于交流分量视为短路导通，以分别使第一偏置电路、第二偏置电路、第三偏置电路和第四偏置电路流向对应的第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的偏置电流的交流分量，能通过第一电容至第八电容分别高效的向对应的第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的输入端流动，从而有效的抑制射频功率放大器的增益压缩和线性度失真的恶化。Compared with the related art, the RF power amplifier in the present invention can control the working states of the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier respectively by controlling the working states of the first bias circuit, the second bias circuit, the third bias circuit and the fourth bias circuit, so that the gain of the RF power amplifier is increased when it is in a high power mode, and the gain of the RF power amplifier is reduced when it is in a low power mode. At the same time, the added second capacitor, the fourth capacitor, the sixth capacitor and the sixth capacitor are regarded as open circuits relative to the DC component and as short circuits relative to the AC component, so that the AC components of the bias currents of the first bias circuit, the second bias circuit, the third bias circuit and the fourth bias circuit flow to the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier, respectively, and can flow efficiently to the input ends of the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier through the first capacitor to the eighth capacitor, thereby effectively suppressing the gain compression and linear distortion of the RF power amplifier.
【附图说明】【Brief Description of the Drawings】
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图，其中：In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:
图1为本发明实施例提供的第一种射频功率放大器的电路连接示意图；FIG1 is a circuit connection diagram of a first radio frequency power amplifier provided by an embodiment of the present invention;
图2为本发明实施例提供的第一种射频功率放大器中第一偏置电路的电路连接示意图；2 is a circuit connection diagram of a first bias circuit in a first RF power amplifier provided in an embodiment of the present invention;
图3为本发明实施例提供的第二种射频功率放大器的电路连接示意图。FIG3 is a circuit connection diagram of a second RF power amplifier provided in an embodiment of the present invention.
【具体实施方式】[Specific implementation method]
下面将结合本发明实施例中的附图，对本发明实施例中的技术方 案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。The technical aspects in the embodiments of the present invention will be described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in the present invention are clearly and completely described. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
本发明实施例提供了一种射频功率放大器100，结合图1所示，其包括信号输入端RFIN、输入匹配网络1、第一电容C1、第二电容C2、第一偏置电路2、第一功率放大器、第三电容C3、第四电容C4、第二偏置电路3、第二功率放大器、级间匹配网络4、第五电容C5、第六电容C6、第三偏置电路5、第三功率放大器、第七电容C7、第八电容C8、第四偏置电路6、第四功率放大器、输出匹配网络7以及信号输出端RFOUT。An embodiment of the present invention provides a radio frequency power amplifier 100, which, as shown in Figure 1, includes a signal input terminal RFIN, an input matching network 1, a first capacitor C1, a second capacitor C2, a first bias circuit 2, a first power amplifier, a third capacitor C3, a fourth capacitor C4, a second bias circuit 3, a second power amplifier, an inter-stage matching network 4, a fifth capacitor C5, a sixth capacitor C6, a third bias circuit 5, a third power amplifier, a seventh capacitor C7, an eighth capacitor C8, a fourth bias circuit 6, a fourth power amplifier, an output matching network 7 and a signal output terminal RFOUT.
具体地，输入匹配网络1的输入端连接至信号输入端RFIN。Specifically, the input terminal of the input matching network 1 is connected to the signal input terminal RFIN.
第一电容C1的第一端连接至输入匹配网络1的输出端；第二电容C2的第一端连接至第一电容C1的第一端，第二电容C2的第二端连接至第一电容C1的第二端；第一偏置电路2的输出端连接至第一电容C1的第二端。The first end of the first capacitor C1 is connected to the output end of the input matching network 1; the first end of the second capacitor C2 is connected to the first end of the first capacitor C1, and the second end of the second capacitor C2 is connected to the second end of the first capacitor C1; the output end of the first bias circuit 2 is connected to the second end of the first capacitor C1.
第一功率放大器的输入端连接至第一电容C1的第二端，第一功率放大器的第一输出端连接至第一电源VCC1，第一功率放大器的第二输出端接地；第一偏置电路2用于为第一功率放大器提供偏置电压。The input end of the first power amplifier is connected to the second end of the first capacitor C1, the first output end of the first power amplifier is connected to the first power supply VCC1, and the second output end of the first power amplifier is grounded; the first bias circuit 2 is used to provide a bias voltage for the first power amplifier.
第三电容C3的第一端连接至输入匹配网络1的输出端；第四电容C4的第一端连接至第三电容C3的第一端，第四电容C4的第二端连接至第三电容C3的第二端；第二偏置电路3的输出端连接至第四电容C4的第二端。A first end of the third capacitor C3 is connected to the output end of the input matching network 1; a first end of the fourth capacitor C4 is connected to the first end of the third capacitor C3, and a second end of the fourth capacitor C4 is connected to the second end of the third capacitor C3; and an output end of the second bias circuit 3 is connected to the second end of the fourth capacitor C4.
第二功率放大器的输入端连接至第三电容C3的第二端，第二功率放大器的第一输出端连接至第一功率放大器的第一输出端，第二功率放大器的第二输出端接地；第二偏置电路3用于为第二功率放大器提供偏置电压。The input end of the second power amplifier is connected to the second end of the third capacitor C3, the first output end of the second power amplifier is connected to the first output end of the first power amplifier, and the second output end of the second power amplifier is grounded; the second bias circuit 3 is used to provide a bias voltage for the second power amplifier.
级间匹配网络4的输入端连接至第一功率放大器的第一输出端。 An input terminal of the inter-stage matching network 4 is connected to a first output terminal of the first power amplifier.
第五电容C5的第一端连接至级间匹配网络4的输出端；第六电容C6的第一端连接至第五电容C5的第一端，第六电容C6的第二端连接至第五电容C5的第二端；第三偏置电路5的输出端连接至第六电容C6的第二端。The first end of the fifth capacitor C5 is connected to the output end of the inter-stage matching network 4; the first end of the sixth capacitor C6 is connected to the first end of the fifth capacitor C5, and the second end of the sixth capacitor C6 is connected to the second end of the fifth capacitor C5; the output end of the third bias circuit 5 is connected to the second end of the sixth capacitor C6.
第三功率放大器的输入端连接至第五电容C5的第二端，第三功率放大器的第一输出端连接至第二电源VCC2，第三功率放大器的第二输出端接地；第三偏置电路5用于为第三功率放大器提供偏置电压。The input end of the third power amplifier is connected to the second end of the fifth capacitor C5, the first output end of the third power amplifier is connected to the second power supply VCC2, and the second output end of the third power amplifier is grounded; the third bias circuit 5 is used to provide a bias voltage for the third power amplifier.
第七电容C7的第一端连接至级间匹配网络4的输出端；第八电容C8的第一端连接至第七电容C7的第一端，第八电容C8的第二端连接至第七电容C7的第二端；第四偏置电路6的输出端连接至第八电容C8的第二端。The first end of the seventh capacitor C7 is connected to the output end of the inter-stage matching network 4; the first end of the eighth capacitor C8 is connected to the first end of the seventh capacitor C7, and the second end of the eighth capacitor C8 is connected to the second end of the seventh capacitor C7; the output end of the fourth bias circuit 6 is connected to the second end of the eighth capacitor C8.
第四功率放大器的输入端连接至第七电容C7的第二端，第四功率放大器的第一输出端连接至第三功率放大器的第一输出端，第四功率放大器的第二输出端接地；第四偏置电路6用于为第四功率放大器提供偏置电压。The input end of the fourth power amplifier is connected to the second end of the seventh capacitor C7, the first output end of the fourth power amplifier is connected to the first output end of the third power amplifier, and the second output end of the fourth power amplifier is grounded; the fourth bias circuit 6 is used to provide a bias voltage for the fourth power amplifier.
输出匹配网络7的输入端连接至第三功率放大器的第一输出端。An input terminal of the output matching network 7 is connected to the first output terminal of the third power amplifier.
信号输出端RFOUT连接至输出匹配网络7的输出端。The signal output terminal RFOUT is connected to the output terminal of the output matching network 7 .
其中，信号输入端RFIN用于输入射频信号。The signal input terminal RFIN is used to input a radio frequency signal.
第一电容C1、第三电容C3、第五电容C5和第七电容C7作为隔直电容，第一电容C1和第三电容C3用于隔绝DC电源(图未示)，避免DC电源进入到信号输入端RFIN，第五电容C5和第七电容C7用于隔绝第一电源VCC1，避免第一电源VCC1进入到对应的第三功率放大器和第四功率放大器。The first capacitor C1, the third capacitor C3, the fifth capacitor C5 and the seventh capacitor C7 are used as DC blocking capacitors. The first capacitor C1 and the third capacitor C3 are used to isolate the DC power supply (not shown) to prevent the DC power supply from entering the signal input terminal RFIN. The fifth capacitor C5 and the seventh capacitor C7 are used to isolate the first power supply VCC1 to prevent the first power supply VCC1 from entering the corresponding third power amplifier and fourth power amplifier.
第二电容C2、第四电容C4、第六电容C6和第八电容C8作为抑制线性度失真的电容，即用于抑制射频功率放大器100的线性度失真的恶化。The second capacitor C2 , the fourth capacitor C4 , the sixth capacitor C6 and the eighth capacitor C8 are used as capacitors for suppressing linear distortion, that is, for suppressing the deterioration of the linear distortion of the RF power amplifier 100 .
第一偏置电路2、第二偏置电路3、第三偏置电路5和第四偏置电路6在分别为第一功率放大器、第二功率放大器、第三功率放大器以 及第四功率放大器提供偏置电压。The first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 are respectively connected to the first power amplifier, the second power amplifier, the third power amplifier and the and a fourth power amplifier providing a bias voltage.
第一功率放大器、第二功率放大器、第三功率放大器和第四功率放大器分别用于对输入至其输入端的射频信号进行放大。The first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier are respectively used to amplify the radio frequency signals input to the input ends thereof.
输入匹配网络1用于进行阻抗匹配，以使输入到第一功率放大器和第二功率放大器之间的功率传输耗损最小；级间匹配网络4用于进行前级第一功率放大器和第二功率放大器与后级第三功率放大器和第四功率放大器之间的阻抗匹配，以使前级输出的功率能更多的达到后级；输出匹配网络7用于进行第三功率放大器和第四功率放大器到信号输出端RFOUT之间的阻抗匹配，以使输出功率最大化。The input matching network 1 is used for impedance matching to minimize the power transmission loss between the first power amplifier and the second power amplifier; the inter-stage matching network 4 is used for impedance matching between the first power amplifier and the second power amplifier at the front stage and the third power amplifier and the fourth power amplifier at the rear stage, so that more power output from the front stage can reach the rear stage; the output matching network 7 is used for impedance matching between the third power amplifier and the fourth power amplifier to the signal output terminal RFOUT, so as to maximize the output power.
信号输出端RFOUT用于将放大后的射频信号向外输出。The signal output terminal RFOUT is used to output the amplified RF signal to the outside.
具体地，第一功率放大器包括第一晶体管Q1；第二功率放大器包括第二晶体管Q2；第三功率放大器包括第三晶体管Q3；第四功率放大器包括第四晶体管Q4。Specifically, the first power amplifier includes a first transistor Q1; the second power amplifier includes a second transistor Q2; the third power amplifier includes a third transistor Q3; and the fourth power amplifier includes a fourth transistor Q4.
当然，根据实际需求，第一晶体管Q1、第二晶体管Q2、第三晶体管Q3和第四晶体管Q4分别可以为一个或并联的多个，具体的数量取决与设计仿真后晶体管的面积。Of course, according to actual needs, the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 can be one or multiple transistors connected in parallel, and the specific number depends on the area of the transistors after design simulation.
其中，第一晶体管Q1、第二晶体管Q2、第三晶体管Q3以及第四晶体管Q4均为异质结双极晶体管(HBT、Heterojunction Bipolar Transistor)或场效应晶体管(MOSFET、Metal oxide semiconductor Field Effect Transistor、金属氧化物半导体场效应晶体管)。Among them, the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 are all heterojunction bipolar transistors (HBT, Heterojunction Bipolar Transistor) or field effect transistors (MOSFET, Metal oxide semiconductor Field Effect Transistor, Metal oxide semiconductor field effect transistor).
若选用异质结双极晶体管，则异质结双极晶体管的基极作为对应功率放大器的输入端，异质结双极晶体管的集电极作为对应的功率放大器的第一输出端，异质结双极晶体管的发射极作为对应的功率放大器的第二输出端；若选用场效应晶体管，则场效应晶体管的栅极作为对应功率放大器的输入端，场效应晶体管的漏极作为对应的功率放大器的第一输出端，场效应晶体管的源极作为对应的功率放大器的第二输出端。If a heterojunction bipolar transistor is selected, the base of the heterojunction bipolar transistor serves as the input terminal of the corresponding power amplifier, the collector of the heterojunction bipolar transistor serves as the first output terminal of the corresponding power amplifier, and the emitter of the heterojunction bipolar transistor serves as the second output terminal of the corresponding power amplifier; if a field effect transistor is selected, the gate of the field effect transistor serves as the input terminal of the corresponding power amplifier, the drain of the field effect transistor serves as the first output terminal of the corresponding power amplifier, and the source of the field effect transistor serves as the second output terminal of the corresponding power amplifier.
具体地，结合图2所示，第一偏置电路2包括第五晶体管Q5、第 五电阻R5、第六晶体管Q6、第九电容C9以及第七晶体管Q7。Specifically, as shown in FIG. 2, the first bias circuit 2 includes a fifth transistor Q5, a first a fifth resistor R5, a sixth transistor Q6, a ninth capacitor C9 and a seventh transistor Q7.
第五晶体管Q5的第一输出端连接至第一电压端子VBAT，第五晶体管Q5的第二输出端作为第一偏置电路2的输出端。A first output terminal of the fifth transistor Q5 is connected to the first voltage terminal VBAT, and a second output terminal of the fifth transistor Q5 serves as an output terminal of the first bias circuit 2 .
第五电阻R5的第一端连接至第二电压端子Vreg。A first end of the fifth resistor R5 is connected to the second voltage terminal Vreg.
第六晶体管Q6的输入端连接至第五晶体管Q5的输入端，第六晶体管Q6的第一输出端连接至第五电阻R5的第二端。An input terminal of the sixth transistor Q6 is connected to the input terminal of the fifth transistor Q5 , and a first output terminal of the sixth transistor Q6 is connected to a second terminal of the fifth resistor R5 .
第七晶体管Q7的输入端连接至第七晶体管Q7的第一输出端，并与第六晶体管Q6的第二输出端连接，第七晶体管Q7的第二输出端接地。An input terminal of the seventh transistor Q7 is connected to a first output terminal of the seventh transistor Q7 and to a second output terminal of the sixth transistor Q6 , and a second output terminal of the seventh transistor Q7 is grounded.
第九电容C9的第一端连接至七晶体管的第二输出端，第九电容C9的第二端连接至第五晶体管Q5的输入端。A first terminal of the ninth capacitor C9 is connected to the second output terminal of the seventh transistor, and a second terminal of the ninth capacitor C9 is connected to the input terminal of the fifth transistor Q5.
其中，第五电阻R5用于分压调节最后输出的偏置电压；第六晶体管Q6和第七晶体管Q7分别用于作为二极管使用，可达到钳位的作用；第五晶体管Q5用于输出偏置电流Ib，以达到为相应的场效应晶体管提供偏置电压的作用；第一电压端子VBAT用于为第五晶体管Q5提供工作电压，以使第五晶体管Q5能正常工作，从而输出偏置电流Ib；第二电压端子Vreg用于为整个偏置电路提供电源。Among them, the fifth resistor R5 is used for voltage division to adjust the bias voltage finally output; the sixth transistor Q6 and the seventh transistor Q7 are used as diodes respectively to achieve the clamping effect; the fifth transistor Q5 is used to output the bias current Ib to provide the bias voltage for the corresponding field effect transistor; the first voltage terminal VBAT is used to provide the working voltage for the fifth transistor Q5 so that the fifth transistor Q5 can work normally, thereby outputting the bias current Ib; the second voltage terminal Vreg is used to provide power for the entire bias circuit.
第五晶体管Q5、第六晶体管Q6和第七晶体管Q7均为异质结双极晶体管或场效应晶体管；若选用异质结双极晶体管，则异质结双极晶体管的基极作为对应晶体管的输入端，异质结双极晶体管的集电极作为对应晶体管的第一输出端，异质结双极晶体管的发射极作为对应晶体管的第二输出端；若选用场效应晶体管，则场效应晶体管的栅极作为对应晶体管的输入端，场效应晶体管的漏极作为对应晶体管的第一输出端，场效应晶体管的源极作为对应晶体管的第二输出端。The fifth transistor Q5, the sixth transistor Q6 and the seventh transistor Q7 are all heterojunction bipolar transistors or field effect transistors; if a heterojunction bipolar transistor is selected, the base of the heterojunction bipolar transistor serves as the input terminal of the corresponding transistor, the collector of the heterojunction bipolar transistor serves as the first output terminal of the corresponding transistor, and the emitter of the heterojunction bipolar transistor serves as the second output terminal of the corresponding transistor; if a field effect transistor is selected, the gate of the field effect transistor serves as the input terminal of the corresponding transistor, the drain of the field effect transistor serves as the first output terminal of the corresponding transistor, and the source of the field effect transistor serves as the second output terminal of the corresponding transistor.
本实施例中，第二偏置电路3、第三偏置电路5以及第四偏置电路6的电路结构均与第一偏置电路2的电路结构相同，在此不做赘述。In this embodiment, the circuit structures of the second bias circuit 3 , the third bias circuit 5 and the fourth bias circuit 6 are the same as the circuit structure of the first bias circuit 2 , and are not described in detail herein.
本实施例中，射频功率放大器100还包括第一电阻R1、第二电阻R2、第三电阻R3以及第四电阻。 In this embodiment, the RF power amplifier 100 further includes a first resistor R1 , a second resistor R2 , a third resistor R3 and a fourth resistor.
第一电阻R1的两端分别连接至第二电容C2的第二端和第一电容C1的第二端；第二电阻R2的两端分别连接至第四电容C4的第二端和第三电容C3的第二端；第三电阻R3的两端分别连接至第六电容C6的第二端和第五电容C5的第二端；第四电阻的两端分别连接至第八电容C8的第二端和第七电容C7的第二端。The two ends of the first resistor R1 are respectively connected to the second end of the second capacitor C2 and the second end of the first capacitor C1; the two ends of the second resistor R2 are respectively connected to the second end of the fourth capacitor C4 and the second end of the third capacitor C3; the two ends of the third resistor R3 are respectively connected to the second end of the sixth capacitor C6 and the second end of the fifth capacitor C5; the two ends of the fourth resistor are respectively connected to the second end of the eighth capacitor C8 and the second end of the seventh capacitor C7.
第一电阻R1、第二电阻R2、第三电阻R3和第四电阻作为镇流电阻，用于提升各自对应连接的晶体管的热稳定性能。The first resistor R1 , the second resistor R2 , the third resistor R3 and the fourth resistor are used as ballast resistors to improve the thermal stability of the transistors connected to them.
本实施例中，射频功率放大器100还包括第一电感L1和第二电感L2。In this embodiment, the RF power amplifier 100 further includes a first inductor L1 and a second inductor L2.
第一电感L1的两端分别连接至第一功率放大器的第一输出端和第一电源VCC1；第二电感L2的两端分别连接至第三功率放大器的第一输出端和第二电源VCC2。Two ends of the first inductor L1 are connected to the first output end of the first power amplifier and the first power supply VCC1 respectively; two ends of the second inductor L2 are connected to the first output end of the third power amplifier and the second power supply VCC2 respectively.
第一电感L1和第二电感L2作为扼流电感，用于防止射频信号泄露到对应的第一电源VCC1和第二电源VCC2。The first inductor L1 and the second inductor L2 are used as choke inductors to prevent the radio frequency signal from leaking to the corresponding first power source VCC1 and the second power source VCC2.
另外，如图3所示，射频功率放大器100还包括第三电感L3、第四电感L4、第五电感L5以及第六电感L6，In addition, as shown in FIG3 , the RF power amplifier 100 further includes a third inductor L3 , a fourth inductor L4 , a fifth inductor L5 and a sixth inductor L6 .
第三电感L3串连至第二电容C2的第二端；第四电感L4串连只第四电容C4的第二端；第五电感L5串连至第六电容C6的第二端；第六电感L6串连至第八电容C8的第二端。The third inductor L3 is connected in series to the second end of the second capacitor C2; the fourth inductor L4 is connected in series to the second end of the fourth capacitor C4; the fifth inductor L5 is connected in series to the second end of the sixth capacitor C6; the sixth inductor L6 is connected in series to the second end of the eighth capacitor C8.
第三电感L3、第四电感L4、第五电感L5和第六电感L6可以与各自串联的电容构成谐振电路，以使谐振频率发生变化，从而使得各自对应的偏置电路输出的偏置电流Ib的交流分量发生改变，进而更精准的抑制射频功率放大器100的增益压缩和线性度失真的恶化。The third inductor L3, the fourth inductor L4, the fifth inductor L5 and the sixth inductor L6 can form a resonant circuit with their respective series capacitors to change the resonant frequency, thereby changing the AC component of the bias current Ib output by the corresponding bias circuits, thereby more accurately suppressing the gain compression and linear distortion deterioration of the RF power amplifier 100.
以上描述的“连接”可理解为两个器件之间的“电连接”、“电性连接”及“通信连接”等可进行射频信号传输的连接方式。The “connection” described above can be understood as “electrical connection”, “electrical connection” and “communication connection” between two devices, etc., which are connection modes that can transmit radio frequency signals.
为了更好的体现本实用新型中射频功率放大器100处于高功率模式可提高增益或处于低功率模式时可降低增益的技术效果，以下将对射频功率放大器100的工作原理进行举例说明： In order to better reflect the technical effect that the RF power amplifier 100 in the present invention can increase the gain when in high power mode or reduce the gain when in low power mode, the working principle of the RF power amplifier 100 is described below by way of example:
当射频功率放大器100处于高功率模式时，第一偏置电路2、第二偏置电路3、第三偏置电路5和第四偏置电路6分别工作在不同的状态，具体为第一偏置电路2为第一晶体管Q1提供偏置电压、第二偏置电路3为第二晶体管Q2提供偏置电压、第三偏置电路5为第三晶体管Q3提供偏置电压，第四偏置电路6为第四晶体管Q4提供偏置电压，以使第一晶体管Q1至第四晶体管Q4均处于工作状态，从而使射频功率放大器100的增益最高，即提高增益。When the RF power amplifier 100 is in the high power mode, the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 respectively operate in different states. Specifically, the first bias circuit 2 provides a bias voltage for the first transistor Q1, the second bias circuit 3 provides a bias voltage for the second transistor Q2, the third bias circuit 5 provides a bias voltage for the third transistor Q3, and the fourth bias circuit 6 provides a bias voltage for the fourth transistor Q4, so that the first transistor Q1 to the fourth transistor Q4 are all in the working state, so that the gain of the RF power amplifier 100 is the highest, that is, the gain is improved.
当射频功率放大器100处于低功率模式时，第一偏置电路2、第二偏置电路3、第三偏置电路5和第四偏置电路6分别工作在不同的状态，具体为第一偏置电路2不为第一晶体管Q1提供偏置电压、第二偏置电路3为第二晶体管Q2提供偏置电压、第三偏置电路5不为第三晶体管Q3提供偏置电压，第四偏置电路6为第四晶体管Q4提供偏置电压，以使第一晶体管Q1和第三晶体管Q3均处于未工作状态，使第二晶体管Q2和第四晶体管Q4处于工作状态，从而降低射频功率放大器100的增益，并提升其整体效率。When the RF power amplifier 100 is in the low power mode, the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 respectively operate in different states, specifically, the first bias circuit 2 does not provide a bias voltage for the first transistor Q1, the second bias circuit 3 provides a bias voltage for the second transistor Q2, the third bias circuit 5 does not provide a bias voltage for the third transistor Q3, and the fourth bias circuit 6 provides a bias voltage for the fourth transistor Q4, so that the first transistor Q1 and the third transistor Q3 are both in a non-operating state, and the second transistor Q2 and the fourth transistor Q4 are in an operating state, thereby reducing the gain of the RF power amplifier 100 and improving its overall efficiency.
当然，根据射频功率放大器100的增益需求，第一晶体管Q1至第四晶体管Q4可以在高功率模式或低功率模式下进行不同的工作状态组合，如第一晶体管Q1工作、第二晶体管Q2未工作、第三晶体管Q3工作、第四晶体管Q4未工作，也可以达到提高增益的作用；又如第一晶体管Q1不工作、第二晶体管Q2工作、第三晶体管Q3工作、第四晶体管Q4未工作，也可以达到降低增益且效率折中的作用，在此不一一进行举例描述。Of course, according to the gain requirements of the RF power amplifier 100, the first transistor Q1 to the fourth transistor Q4 can perform different working state combinations in the high power mode or the low power mode. For example, the first transistor Q1 is working, the second transistor Q2 is not working, the third transistor Q3 is working, and the fourth transistor Q4 is not working, which can also achieve the effect of improving the gain; for example, the first transistor Q1 is not working, the second transistor Q2 is working, the third transistor Q3 is working, and the fourth transistor Q4 is not working, which can also achieve the effect of reducing the gain and compromising the efficiency. Examples are not given one by one here.
与相关技术相比，本实施例中的射频功率放大器100可以通过控制第一偏置电路2、第二偏置电路3、第三偏置电路5和第四偏置电路6的工作状态来分别控制第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的工作状态，以使射频功率放大器100处于高功率模式时提高增益，并使射频功率放大器100处于低功率模式时的降低增益，同时使增设的第二电容C2、第四电容C4、第六电 容C6和第六电容C6相对于直流分量视为开路，相对于交流分量视为短路导通，以分别使第一偏置电路2、第二偏置电路3、第三偏置电路5和第四偏置电路6流向对应的第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的偏置电流Ib的交流分量，能通过第一电容C1至第八电容C8分别高效的向对应的第一功率放大器、第二功率放大器、第三功率放大器以及第四功率放大器的输入端流动，从而有效的抑制射频功率放大器100的增益压缩和线性度失真的恶化。Compared with the related art, the RF power amplifier 100 in this embodiment can control the working states of the first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier respectively by controlling the working states of the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6, so as to increase the gain when the RF power amplifier 100 is in the high power mode and reduce the gain when the RF power amplifier 100 is in the low power mode, and at the same time, the added second capacitor C2, the fourth capacitor C4, the sixth capacitor C5 and the fourth capacitor C6 are Capacitor C6 and the sixth capacitor C6 are regarded as open circuits with respect to the DC component and as short circuits with respect to the AC component, so that the AC components of the bias currents Ib of the first bias circuit 2, the second bias circuit 3, the third bias circuit 5 and the fourth bias circuit 6 flow to the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier, respectively, and can flow efficiently to the input ends of the corresponding first power amplifier, the second power amplifier, the third power amplifier and the fourth power amplifier through the first capacitor C1 to the eighth capacitor C8, thereby effectively suppressing the gain compression and linear distortion deterioration of the RF power amplifier 100.
本发明还提供了一种射频功放模组的实施例，该射频功放模组包括上述实施例中的射频功率放大器100。由于本实施例中的射频功放模组包括了上述实施例中的射频功率放大器100，因此其也能达到上述实施例中射频功率放大器100所达到的技术效果，在此不作赘述。The present invention also provides an embodiment of a radio frequency power amplifier module, which includes the radio frequency power amplifier 100 in the above embodiment. Since the radio frequency power amplifier module in this embodiment includes the radio frequency power amplifier 100 in the above embodiment, it can also achieve the technical effect achieved by the radio frequency power amplifier 100 in the above embodiment, which will not be described in detail here.
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其它相关的技术领域，均同理包括在本发明的专利保护范围内。 The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims (10)

  1. 一种射频功率放大器，其特征在于，所述射频功率放大器包括信号输入端、输入匹配网络、第一电容、第二电容、第一偏置电路、第一功率放大器、第三电容、第四电容、第二偏置电路、第二功率放大器、级间匹配网络、第五电容、第六电容、第三偏置电路、第三功率放大器、第七电容、第八电容、第四偏置电路、第四功率放大器、输出匹配网络以及信号输出端；A radio frequency power amplifier, characterized in that the radio frequency power amplifier comprises a signal input terminal, an input matching network, a first capacitor, a second capacitor, a first bias circuit, a first power amplifier, a third capacitor, a fourth capacitor, a second bias circuit, a second power amplifier, an inter-stage matching network, a fifth capacitor, a sixth capacitor, a third bias circuit, a third power amplifier, a seventh capacitor, an eighth capacitor, a fourth bias circuit, a fourth power amplifier, an output matching network and a signal output terminal;
    所述输入匹配网络的输入端连接至所述信号输入端；The input end of the input matching network is connected to the signal input end;
    所述第一电容的第一端连接至所述输入匹配网络的输出端；所述第二电容的第一端连接至所述第一电容的第一端，所述第二电容的第二端连接至所述第一电容的第二端；所述第一偏置电路的输出端连接至所述第一电容的第二端；The first end of the first capacitor is connected to the output end of the input matching network; the first end of the second capacitor is connected to the first end of the first capacitor, and the second end of the second capacitor is connected to the second end of the first capacitor; the output end of the first bias circuit is connected to the second end of the first capacitor;
    所述第一功率放大器的输入端连接至所述第一电容的第二端，所述第一功率放大器的第一输出端连接至第一电源，所述第一功率放大器的第二输出端接地；所述第一偏置电路用于为所述第一功率放大器提供偏置电压；The input end of the first power amplifier is connected to the second end of the first capacitor, the first output end of the first power amplifier is connected to a first power supply, and the second output end of the first power amplifier is grounded; the first bias circuit is used to provide a bias voltage for the first power amplifier;
    所述第三电容的第一端连接至所述输入匹配网络的输出端；所述第四电容的第一端连接至所述第三电容的第一端，所述第四电容的第二端连接至所述第三电容的第二端；所述第二偏置电路的输出端连接至所述第四电容的第二端；The first end of the third capacitor is connected to the output end of the input matching network; the first end of the fourth capacitor is connected to the first end of the third capacitor, and the second end of the fourth capacitor is connected to the second end of the third capacitor; the output end of the second bias circuit is connected to the second end of the fourth capacitor;
    所述第二功率放大器的输入端连接至所述第三电容的第二端，所述第二功率放大器的第一输出端连接至所述第一功率放大器的第一输出端，所述第二功率放大器的第二输出端接地；所述第二偏置电路用于为所述第二功率放大器提供偏置电压；The input end of the second power amplifier is connected to the second end of the third capacitor, the first output end of the second power amplifier is connected to the first output end of the first power amplifier, and the second output end of the second power amplifier is grounded; the second bias circuit is used to provide a bias voltage for the second power amplifier;
    所述级间匹配网络的输入端连接至所述第一功率放大器的第一输出端；An input end of the inter-stage matching network is connected to a first output end of the first power amplifier;
    所述第五电容的第一端连接至所述级间匹配网络的输出端；所述第六电容的第一端连接至所述第五电容的第一端，所述第六电容的第 二端连接至所述第五电容的第二端；所述第三偏置电路的输出端连接至所述第六电容的第二端；The first end of the fifth capacitor is connected to the output end of the inter-stage matching network; the first end of the sixth capacitor is connected to the first end of the fifth capacitor, The second end is connected to the second end of the fifth capacitor; the output end of the third bias circuit is connected to the second end of the sixth capacitor;
    所述第三功率放大器的输入端连接至所述第五电容的第二端，所述第三功率放大器的第一输出端连接至第二电源，所述第三功率放大器的第二输出端接地；所述第三偏置电路用于为所述第三功率放大器提供偏置电压；The input end of the third power amplifier is connected to the second end of the fifth capacitor, the first output end of the third power amplifier is connected to the second power supply, and the second output end of the third power amplifier is grounded; the third bias circuit is used to provide a bias voltage for the third power amplifier;
    所述第七电容的第一端连接至所述级间匹配网络的输出端；所述第八电容的第一端连接至所述第七电容的第一端，所述第八电容的第二端连接至所述第七电容的第二端；所述第四偏置电路的输出端连接至所述第八电容的第二端；The first end of the seventh capacitor is connected to the output end of the inter-stage matching network; the first end of the eighth capacitor is connected to the first end of the seventh capacitor, and the second end of the eighth capacitor is connected to the second end of the seventh capacitor; the output end of the fourth bias circuit is connected to the second end of the eighth capacitor;
    所述第四功率放大器的输入端连接至所述第七电容的第二端，所述第四功率放大器的第一输出端连接至所述第三功率放大器的第一输出端，所述第四功率放大器的第二输出端接地；所述第四偏置电路用于为所述第四功率放大器提供偏置电压；The input end of the fourth power amplifier is connected to the second end of the seventh capacitor, the first output end of the fourth power amplifier is connected to the first output end of the third power amplifier, and the second output end of the fourth power amplifier is grounded; the fourth bias circuit is used to provide a bias voltage for the fourth power amplifier;
    所述输出匹配网络的输入端连接至所述第三功率放大器的第一输出端；The input end of the output matching network is connected to the first output end of the third power amplifier;
    所述信号输出端连接至所述输出匹配网络的输出端。The signal output terminal is connected to the output terminal of the output matching network.
  2. 如权利要求1所述的射频功率放大器，其特征在于，所述射频功率放大器还包括第一电阻、第二电阻、第三电阻以及第四电阻；The RF power amplifier according to claim 1, characterized in that the RF power amplifier further comprises a first resistor, a second resistor, a third resistor and a fourth resistor;
    所述第一电阻的两端分别连接至所述第二电容的第二端和所述第一电容的第二端；所述第二电阻的两端分别连接至所述第四电容的第二端和所述第三电容的第二端；所述第三电阻的两端分别连接至所述第六电容的第二端和所述第五电容的第二端；所述第四电阻的两端分别连接至所述第八电容的第二端和所述第七电容的第二端。The two ends of the first resistor are respectively connected to the second end of the second capacitor and the second end of the first capacitor; the two ends of the second resistor are respectively connected to the second end of the fourth capacitor and the second end of the third capacitor; the two ends of the third resistor are respectively connected to the second end of the sixth capacitor and the second end of the fifth capacitor; the two ends of the fourth resistor are respectively connected to the second end of the eighth capacitor and the second end of the seventh capacitor.
  3. 如权利要求1所述的射频功率放大器，其特征在于，所述射频功率放大器还包括第一电感和第二电感；The radio frequency power amplifier according to claim 1, characterized in that the radio frequency power amplifier further comprises a first inductor and a second inductor;
    所述第一电感的两端分别连接至所述第一功率放大器的第一输出端和所述第一电源；所述第二电感的两端分别连接至所述第三功率放 大器的第一输出端和所述第二电源。The two ends of the first inductor are respectively connected to the first output terminal of the first power amplifier and the first power supply; the two ends of the second inductor are respectively connected to the first output terminal of the third power amplifier The first output terminal of the amplifier and the second power supply.
  4. 如权利要求2所述的射频功率放大器，其特征在于，所述射频功率放大器还包括第三电感、第四电感、第五电感以及第六电感；The radio frequency power amplifier according to claim 2, characterized in that the radio frequency power amplifier further comprises a third inductor, a fourth inductor, a fifth inductor and a sixth inductor;
    所述第三电感串连至所述第二电容的第二端；所述第四电感串连只所述第四电容的第二端；所述第五电感串连至所述第六电容的第二端；所述第六电感串连至所述第八电容的第二端。The third inductor is connected in series to the second end of the second capacitor; the fourth inductor is connected in series to the second end of the fourth capacitor; the fifth inductor is connected in series to the second end of the sixth capacitor; and the sixth inductor is connected in series to the second end of the eighth capacitor.
  5. 如权利要求1所述的射频功率放大器，其特征在于，所述第一功率放大器包括第一晶体管；所述第二功率放大器包括第二晶体管；所述第三功率放大器包括第三晶体管；所述第四功率放大器包括第四晶体管。The RF power amplifier as described in claim 1 is characterized in that the first power amplifier includes a first transistor; the second power amplifier includes a second transistor; the third power amplifier includes a third transistor; and the fourth power amplifier includes a fourth transistor.
  6. 如权利要求5所述的射频功率放大器，其特征在于，所述第一晶体管、所述第二晶体管、所述第三晶体管以及所述第四晶体管均为异质结双极晶体管或场效应晶体管。The RF power amplifier as described in claim 5 is characterized in that the first transistor, the second transistor, the third transistor and the fourth transistor are all heterojunction bipolar transistors or field effect transistors.
  7. 如权利要求1所述的射频功率放大器，其特征在于，所述第一偏置电路包括第五晶体管、第五电阻、第六晶体管、第九电容以及第七晶体管；The radio frequency power amplifier according to claim 1, wherein the first bias circuit comprises a fifth transistor, a fifth resistor, a sixth transistor, a ninth capacitor and a seventh transistor;
    所述第五晶体管的第一输出端连接至第一电压端子，所述第五晶体管的第二输出端作为所述第一偏置电路的输出端；The first output end of the fifth transistor is connected to the first voltage terminal, and the second output end of the fifth transistor serves as the output end of the first bias circuit;
    所述第五电阻的第一端连接至第二电压端子；A first end of the fifth resistor is connected to a second voltage terminal;
    所述第六晶体管的输入端连接至所述第五晶体管的输入端，所述第六晶体管的第一输出端连接至所述第五电阻的第二端；The input terminal of the sixth transistor is connected to the input terminal of the fifth transistor, and the first output terminal of the sixth transistor is connected to the second terminal of the fifth resistor;
    所述第七晶体管的输入端连接至所述第七晶体管的第一输出端，并与所述第六晶体管的第二输出端连接，所述第七晶体管的第二输出端接地；The input terminal of the seventh transistor is connected to the first output terminal of the seventh transistor and to the second output terminal of the sixth transistor, and the second output terminal of the seventh transistor is grounded;
    所述第九电容的第一端连接至所述七晶体管的第二输出端，所述第九电容的第二端连接至所述第五晶体管的输入端。A first end of the ninth capacitor is connected to the second output end of the seventh transistor, and a second end of the ninth capacitor is connected to the input end of the fifth transistor.
  8. 如权利要求7所述的射频功率放大器，其特征在于，所述第一偏置晶体管、所述第二偏置晶体管以及所述第三偏置晶体管均为异质 结双极晶体管或场效应晶体管。The RF power amplifier according to claim 7, wherein the first bias transistor, the second bias transistor and the third bias transistor are all heterogeneous Junction bipolar transistor or field effect transistor.
  9. 如权利要求7或8所述的射频功率放大器，其特征在于，所述第二偏置电路、所述第三偏置电路以及所述第四偏置电路的电路结构均与所述第一偏置电路的电路结构相同。The RF power amplifier according to claim 7 or 8, characterized in that the circuit structures of the second bias circuit, the third bias circuit and the fourth bias circuit are the same as the circuit structure of the first bias circuit.
  10. 一种射频功放模组，其特征在与，所述射频功放模组包括如权利要求1至9任意一项所述的射频功率放大器。 A radio frequency power amplifier module, characterized in that the radio frequency power amplifier module comprises the radio frequency power amplifier as described in any one of claims 1 to 9.
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WO2023061089A1 (en) * 2021-10-14 2023-04-20 深圳飞骧科技股份有限公司 Radio frequency power amplifier applied to 5g-sub6g frequency band communication system
CN116260401A (en) * 2023-04-28 2023-06-13 深圳飞骧科技股份有限公司 Radio frequency power amplifier and radio frequency power amplifier module

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