WO2024179239A1

WO2024179239A1 - Radio frequency power amplifier circuit and radio frequency chip

Info

Publication number: WO2024179239A1
Application number: PCT/CN2024/073954
Authority: WO
Inventors: 祁威; 郭嘉帅
Original assignee: 深圳飞骧科技股份有限公司
Priority date: 2023-02-27
Filing date: 2024-01-25
Publication date: 2024-09-06
Also published as: CN219536035U

Abstract

Provided are a radio frequency power amplifier circuit and a radio frequency chip. The radio frequency power amplifier circuit comprises a radio frequency input end, an input matching circuit, a first transistor, a bias circuit, and a radio frequency output end. The radio frequency input end is connected to the input end of the input matching circuit. The output end of the input matching circuit is connected to the base of the first transistor and the output end of the bias circuit, respectively. The emitter of the first transistor is grounded, and the collector of the first transistor is connected to the radio frequency output end. The bias circuit comprises a first resistor, a second resistor, a third resistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first capacitor. Compared with the related art, the radio frequency power amplifier circuit and the radio frequency chip have good linearity and high efficiency.

Description

RF power amplifier circuit and RF chip

Technical Field

The utility model relates to the field of amplifier circuits, in particular to a radio frequency power amplifier circuit and a radio frequency chip.

Background Art

As humans enter the information age, wireless communication technology has developed rapidly. From mobile phones, wireless LANs, Bluetooth, etc., it has become an indispensable part of social life and development. The advancement of wireless communication technology is inseparable from the development of RF circuits and microwave technology. At present, in wireless transceiver systems, RF power amplifiers are one of the important components. At present, 5G communication technically sets the corresponding frequency band at ultra-high frequency. The RF power amplifier used in 5G communication operates at the HPUE power level, which is 2dB higher than the rated power of 4G LTE communication. Therefore, the linearity and efficiency of the RF power amplifier become important design indicators.

The RF power amplifier circuit of the related art includes an input matching circuit, a bias circuit, an RF amplifier transistor and a choke inductor. The RF power amplifier circuit shown in Figure 1 is a RF power amplifier circuit commonly used in the related art. Among them, the RF power amplifier circuit includes an RF amplifier transistor HBT0 and a choke inductor L0 made by the HBT process, wherein the input matching circuit is a capacitor CA, and the bias circuit includes a first transistor HBT1, a second transistor HBT2, a third transistor HBT3, a capacitor CB, a resistor RA and a resistor RB. Capacitor CB is a linear capacitor. The first transistor HBT1 and the second transistor HBT2 constitute a mirror current source to provide a bias current to the RF amplifier transistor HBT0. As the RF power increases, the DC current of the RF amplifier transistor HBT0 increases, and due to the self-heating effect of the RF amplifier transistor HBT0 and the diode rectification effect formed by the base-emitter of the RF amplifier transistor HBT0, the base potential Vb0 of the RF amplifier transistor HBT0 will decrease, and at the same time, a small part of the RF power will leak into the bias circuit, and after passing through the first transistor HBT1, it will be bypassed to the ground by the capacitor CB, so the Q point potential will remain unchanged. The leaked power increases the DC current of the first transistor HBT1, and the DC rectification of the first transistor HBT1 causes the base -The DC component Vbe of the emitter junction voltage decreases, and since the Q-point potential remains unchanged, the base potential of the RF amplifier transistor HBT0 will be raised. The RF signal is input from the RF signal input port RFin, amplified by the RF power amplifier circuit of the related technology, and fed to the external antenna from the RF signal output port RFout for transmission.

However, the RF power amplifier circuit of the related technology is used in 5G communication. In order to meet the high power requirements, the linearity and efficiency of the RF power amplifier circuit of the related technology are difficult to meet the technical requirements of 5G communication under high power.

Therefore, it is necessary to provide a new RF power amplifier circuit and RF chip to solve the above problems.

Utility Model Content

In view of the above deficiencies in the prior art, the utility model proposes a radio frequency power amplifier circuit and a radio frequency chip with good linearity and high efficiency.

In order to solve the above technical problems, in a first aspect, an embodiment of the utility model provides a radio frequency power amplifier circuit, which includes a radio frequency input terminal, an input matching circuit, a first transistor, a bias circuit and a radio frequency output terminal, wherein the radio frequency input terminal is connected to the input terminal of the input matching circuit, the output terminal of the input matching circuit is respectively connected to the base of the first transistor and the output terminal of the bias circuit, the emitter of the first transistor is grounded, and the collector of the first transistor is connected to the radio frequency output terminal.

The bias circuit includes a first resistor, a second resistor, a third resistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first capacitor;

The first end of the first resistor is used to connect to a reference voltage;

The second end of the first resistor is respectively connected to the base of the second transistor, the base of the third transistor, the collector of the third transistor and the first end of the first capacitor; the second end of the first capacitor is grounded;

The emitter of the third transistor is connected to the base of the fourth transistor and the collector of the fourth transistor respectively; the emitter of the fourth transistor is grounded;

The collector of the second transistor is connected to a first power supply voltage;

The emitter of the second transistor is connected to the first end of the second resistor and the first end of the third resistor respectively;

The second end of the second resistor is connected to the base of the fifth transistor and the collector of the fifth transistor respectively; the emitter of the fifth transistor is grounded;

The second end of the third resistor serves as the output end of the bias circuit.

Preferably, the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all NPN bipolar transistors.

Preferably, the input matching circuit is composed of a second capacitor, a first end of the second capacitor serves as an input end of the input matching circuit, and a second end of the second capacitor serves as an output end of the input matching circuit.

Preferably, the RF power amplifier circuit further includes a first inductor, a first end of the first inductor being used to be connected to a second power supply voltage, and a second end of the first inductor being respectively connected to the collector of the first transistor and the RF output end.

In a second aspect, an embodiment of the present invention further provides a radio frequency chip, and the radio frequency chip includes the radio frequency power amplifier circuit provided in the embodiment of the present invention.

Compared with the related art, the RF power amplifier circuit and RF chip of the utility model are provided with a second resistor and a fifth transistor on the bias circuit. When the RF power of the RF output end increases in 5G high-power applications, a small part of the RF power of the RF output end leaks into the bias circuit. Specifically, after passing through the second transistor, it is bypassed to the ground by the first capacitor. The leaked RF power increases the DC current of the second transistor, causing the potential of the base of the first transistor to be raised. At this time, the fifth transistor is in the on state and forms a path from the second transistor to the ground with the second resistor. The path is equivalent to the internal resistance of the bias circuit becoming smaller, and the bias circuit can be equivalent to an ideal voltage source, which can reduce the sensitivity of the bias circuit to changes in load impedance, so that the baseband internal resistance of the entire bias circuit becomes smaller to suppress the memory effect, thereby reducing the deterioration of the adjacent channel power leakage ratio (ACLR) and adjacent channel power ratio (ACLR) of the output signal of the RF output end caused by the memory effect. Ratio, ACPR) asymmetry reduces distortion and improves the performance of the entire radio frequency link. Therefore, the radio frequency power amplifier circuit and radio frequency chip circuit of the utility model have good linearity and high efficiency.

BRIEF DESCRIPTION OF THE DRAWINGS

The utility model is described in detail below in conjunction with the accompanying drawings. Through the detailed description made in conjunction with the following drawings, the above or other aspects of the utility model will become clearer and easier to understand. In the accompanying drawings,

FIG1 is a circuit structure diagram of a radio frequency power amplifier circuit of the related art;

FIG2 is a circuit diagram of a radio frequency power amplifier circuit according to an embodiment of the present invention;

FIG3 is a graph showing the relationship between the adjacent channel power ratio and the output power of the radio frequency power amplifier circuit according to an embodiment of the present utility model;

FIG. 4 is a graph showing the relationship between Icc and output power of the RF power amplifier circuit according to an embodiment of the present invention.

DETAILED DESCRIPTION

The specific implementation of the present utility model is described in detail below with reference to the accompanying drawings.

The specific implementation modes/examples described herein are specific implementation modes of the present utility model, which are used to illustrate the concept of the present utility model, are explanatory and exemplary, and should not be interpreted as limiting the implementation modes of the present utility model and the scope of the present utility model. In addition to the examples described herein, those skilled in the art can also adopt other obvious technical solutions based on the contents disclosed in the claims and the specification of this application, and these technical solutions include any obvious replacement and modification of the embodiments described herein, which are within the protection scope of the present utility model.

The utility model provides a radio frequency power amplifier circuit 100.

Please refer to FIG. 2 , which is a circuit structure diagram of a radio frequency power amplifier circuit 100 according to an embodiment of the present invention.

Specifically, the RF power amplifier circuit 100 includes a RF input terminal RFin, an input matching circuit 1, a first transistor Q1, a bias circuit 2 and a RF output terminal RFout.

The internal circuit connection relationship of the RF power amplifier circuit 100 is:

The radio frequency input terminal RFin is connected to the input terminal of the input matching circuit 1 . The output end of the input matching circuit 1 is respectively connected to the base of the first transistor Q1 and the output end of the bias circuit 2. The emitter of the first transistor Q1 is grounded GND. The collector of the first transistor Q1 is connected to the radio frequency output end RFout.

In this embodiment, the input matching circuit 1 is formed by a second capacitor C2 , wherein a first end of the second capacitor C2 serves as an input end of the input matching circuit 1 , and a second end of the second capacitor C2 serves as an output end of the input matching circuit 1 .

In this embodiment, the first transistor Q1 is an NPN bipolar transistor. Of course, it is not limited thereto, the first transistor Q1 can also be a PNP bipolar transistor, and the circuit structure of the RF power amplifier circuit 100 can be adjusted accordingly according to the PNP bipolar transistor, which will not be described in detail here.

The bias circuit 2 includes a first resistor R1, a second resistor R2, a third resistor R3, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5 and a first capacitor C1.

In this embodiment, the second transistor Q2, the third transistor Q3, the fourth transistor Q4 and the fifth transistor Q5 are all NPN bipolar transistors. Of course, not limited to this, the second transistor Q2, the third transistor Q3, the fourth transistor Q4 and the fifth transistor Q5 can also be PNP bipolar transistors, and the circuit structure of the bias circuit 2 can be adjusted accordingly according to the PNP bipolar transistors, which will not be described in detail here.

The internal circuit connection relationship of the bias circuit 2 is:

The first end of the first resistor R1 is used to be connected to a reference voltage Vref.

The second end of the first resistor R1 is respectively connected to the base of the second transistor Q2, the base of the third transistor Q3, the collector of the third transistor Q3 and the first end of the first capacitor C1. The second end of the first capacitor C1 is grounded GND.

The emitter of the third transistor Q3 is connected to the base of the fourth transistor Q4 and the collector of the fourth transistor Q4, respectively. The emitter of the fourth transistor Q4 is grounded GND.

A collector of the second transistor Q2 is connected to a first power supply voltage Vbatt.

The emitter of the second transistor Q2 is connected to the The first end and the first end of the third resistor R3.

The second end of the second resistor R2 is connected to the base of the fifth transistor Q5 and the collector of the fifth transistor Q5 respectively. The emitter of the fifth transistor Q5 is grounded GND.

The second end of the third resistor R3 serves as the output end of the bias circuit 2 .

The circuit principle of the bias circuit 2 is:

The first capacitor C1 is a linear capacitor. The second transistor Q2 and the third transistor Q3 form a mirror current source to provide a bias current to the first transistor Q1. In 5G high-power applications, as the RF power of the RF input terminal RFin increases, the DC current of the first transistor Q1 increases, and due to the self-heating effect of the first transistor Q1 and the diode rectification effect formed by the base-emitter of the first transistor Q1, the base potential Vb0 of the first transistor Q1 will decrease, and at the same time, a small part of the RF power of the RF input terminal RFin leaks into the bias circuit 2, specifically after passing through the second transistor Q2, it is bypassed to the ground GND by the first capacitor C1. Therefore, the potential at point P will remain unchanged. The leaked RF power increases the DC current of the second transistor Q2, and the DC rectification of the second transistor Q2 reduces the DC component Vbe of the base-emitter junction voltage. Since the potential at point P remains unchanged, the base potential of the first transistor Q1 will be raised. Since the bias circuit 2 sets the second resistor R2 and the fifth transistor Q5. At this time, the fifth transistor Q5 is in the on state, and forms a path from the second transistor Q2 to the ground GND with the second resistor R2; this path is equivalent to the internal resistance of the bias circuit 2 becoming smaller, and the bias circuit 2 can be equivalent to an ideal voltage source, which can reduce the sensitivity of the bias circuit 2 to the change of the load impedance, so that the baseband internal resistance of the entire bias circuit 2 becomes smaller to suppress the memory effect, thereby reducing the adjacent channel power leakage ratio (ACLR) deterioration and adjacent channel power ratio (ACPR) asymmetry of the output signal of the RF output terminal RFout caused by the memory effect, so that the distortion is reduced and the performance of the entire RF link is improved. The RF signal is input from the RF signal input port RFin, and after power amplification by the RF power amplifier circuit of the related technology, it is fed to the external antenna from the RF signal output port RFout for transmission.

In this embodiment, the RF power amplifier circuit 100 further includes a first inductor L1, wherein a first end of the first inductor L1 is used to connect to a second power supply voltage VCC, and a second end of the first inductor L1 is respectively connected to the collector of the first transistor Q1 and the RF output terminal RFout.

In order to verify that the RF power amplifier circuit 100 can improve linearity and efficiency, circuit simulation is used for verification. Please refer to Figures 3 and 4 for the simulation results. Figure 3 is a graph showing the relationship between the adjacent channel power ratio ACPR and the output power Power Date of the RF power amplifier circuit 100 of the embodiment of the utility model; Figure 4 is a graph showing the relationship between Icc and the output power Power Date of the RF power amplifier circuit 100 of the embodiment of the utility model. Wherein, Icc is the DC current of the first transistor Q1.

As shown in Figure 3, the straight line m1 is the output power Power Date value of 18.364. When the output power Power Date is 28.689, the adjacent channel power ratio ACPP values of points m11 and m12 are -52.086 and -52.407 respectively. The difference between the adjacent channel power ratio ACPP of points m11 and m12 is -0.321, so the adjacent channel power leakage ratio ACLR is smaller.

As shown in Figure 3, the straight line m2 is the output power Power Date value of 28.689. When the output power Power Date is 28.689, the adjacent channel power ratio ACPP values of point m21 and point m22 are -45.772 and -45.978 respectively. The difference between the adjacent channel power ratio ACPP of point m21 and point m22 is -0.206, so the adjacent channel power leakage ratio ACLR is smaller.

From the value of the adjacent channel power ratio ACPP in FIG. 3 , it can be concluded that the radio frequency power amplifier circuit of the utility model has good linearity.

As shown in Figure 4, the straight line m3 is the output power Power Date value of 29.250. When the output power Power Date is 29.250, the Icc value of point m31 is 0.922.

It can be concluded from the Icc value of FIG. 4 that the radio frequency power amplifier circuit of the present invention has high efficiency.

The embodiment of the utility model further provides a radio frequency chip. The radio frequency chip includes the radio frequency power amplifier circuit 100 .

The radio frequency chip provided in the embodiment of the utility model can realize various implementations of the radio frequency power amplifier circuit 100 embodiment and corresponding beneficial effects. To avoid repetition, it will not be repeated here.

It should be pointed out that the relevant circuit modules, resistors, capacitors, inductors and transistors used in the present invention are all commonly used circuit modules and components in the field. The corresponding specific indicators and parameters are adjusted according to actual applications and are not described in detail here.

Compared with the related art, the RF power amplifier circuit and RF chip of the utility model add a second resistor and a fifth transistor to the bias circuit. When the RF power of the RF output end increases in 5G high-power applications, a small part of the RF power of the RF output end leaks into the bias circuit. Specifically, after passing through the second transistor, it is bypassed to the ground by the first capacitor. The leaked RF power increases the DC current of the second transistor, causing the potential of the base of the first transistor to be raised. At this time, the fifth transistor is in the on state and forms a path from the second transistor to the ground with the second resistor. The path The circuit is equivalent to reducing the internal resistance of the bias circuit, and the bias circuit can be equivalent to an ideal voltage source, which can reduce the sensitivity of the bias circuit to changes in load impedance, making the baseband internal resistance of the entire bias circuit smaller and suppressing the memory effect, thereby reducing the adjacent channel power leakage ratio (ACLR) deterioration and adjacent channel power ratio (ACPR) asymmetry of the output signal of the RF output end caused by the memory effect, reducing distortion and improving the performance of the entire RF link. Therefore, the RF power amplifier circuit and RF chip circuit of the utility model have good linearity and high efficiency.

It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent replacement of the present invention without departing from the spirit and scope of the present invention should be included in the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

A radio frequency power amplifier circuit comprises a radio frequency input terminal, an input matching circuit, a first transistor, a bias circuit and a radio frequency output terminal, wherein the radio frequency input terminal is connected to the input terminal of the input matching circuit, the output terminal of the input matching circuit is respectively connected to the base of the first transistor and the output terminal of the bias circuit, the emitter of the first transistor is grounded, and the collector of the first transistor is connected to the radio frequency output terminal, characterized in that:

The bias circuit includes a first resistor, a second resistor, a third resistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first capacitor;

The first end of the first resistor is used to connect to a reference voltage;

The second end of the first resistor is respectively connected to the base of the second transistor, the base of the third transistor, the collector of the third transistor and the first end of the first capacitor; the second end of the first capacitor is grounded;

The emitter of the third transistor is connected to the base of the fourth transistor and the collector of the fourth transistor respectively; the emitter of the fourth transistor is grounded;

The collector of the second transistor is used to be connected to a first power supply voltage; the emitter of the second transistor is respectively connected to the first end of the second resistor and the first end of the third resistor;

The second end of the second resistor is connected to the base of the fifth transistor and the collector of the fifth transistor respectively; the emitter of the fifth transistor is grounded;

The second end of the third resistor serves as the output end of the bias circuit.
The RF power amplifier circuit according to claim 1 is characterized in that the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor are all NPN bipolar transistors.
The RF power amplifier circuit according to claim 1 is characterized in that the input matching circuit is composed of a second capacitor, the first end of the second capacitor serves as the input end of the input matching circuit, and the second end of the second capacitor serves as the output end of the input matching circuit.
The RF power amplifier circuit according to claim 1, characterized in that the RF power amplifier circuit further comprises a first inductor, wherein a first end of the first inductor Used to be connected to a second power supply voltage, the second end of the first inductor is respectively connected to the collector of the first transistor and the RF output end.
A radio frequency chip, characterized in that the radio frequency chip comprises the radio frequency power amplifier circuit as described in any one of claims 1 to 4.