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WO2020134036A1 - Test board for testing memory card, and test device - Google Patents

Test board for testing memory card, and test device Download PDF

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Publication number
WO2020134036A1
WO2020134036A1 PCT/CN2019/096432 CN2019096432W WO2020134036A1 WO 2020134036 A1 WO2020134036 A1 WO 2020134036A1 CN 2019096432 W CN2019096432 W CN 2019096432W WO 2020134036 A1 WO2020134036 A1 WO 2020134036A1
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WIPO (PCT)
Prior art keywords
test
circuit
memory card
tested
voltage
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PCT/CN2019/096432
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French (fr)
Chinese (zh)
Inventor
胡宏辉
梁广庆
李小强
Original Assignee
深圳市江波龙电子股份有限公司
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Publication of WO2020134036A1 publication Critical patent/WO2020134036A1/en

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Definitions

  • the disclosed embodiments of the present application relate to the field of storage technology, and more specifically, to a test board and test equipment for testing a memory card.
  • Memory cards are independent storage media used on smart devices, such as smart phones, digital cameras, portable computers, etc., generally in the form of cards. Before a memory card is inserted into a smart device and put into use, a compatibility test needs to be performed on the memory card, for example, information recognition, reading, hot swapping, etc.
  • the current testing method is manual testing, and only a single memory card can be used at a time, and the testing efficiency is low.
  • the present application proposes a test board and test equipment for testing a memory card, so as to improve the test efficiency of the memory card.
  • a test board for testing a memory card.
  • the test board includes: a circuit board; and a plurality of test circuits, which are disposed on the circuit board and are independent of each other. Each test circuit is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
  • each test circuit includes a controller for generating a test signal.
  • the controllers in the multiple test circuits are alternately arranged on opposite sides of the circuit board.
  • Each test circuit further includes a first transformer circuit, the input terminal is coupled to the power interface, and the output terminal is coupled to the controller to convert the external voltage into the first voltage and provide it to the controller.
  • Each test circuit also includes a second transformer circuit, a third transformer circuit, and a selection circuit, where the input terminals of the second transformer circuit and the third transformer circuit are coupled to the power supply interface, and the output terminal is
  • the memory card to be tested is coupled to convert the external voltage into a second voltage and a third voltage respectively, and the second voltage or the third voltage is provided to the memory card to be tested through the selection circuit.
  • the first voltage is 1.2V
  • the second voltage is 1.8V
  • the third voltage is 3.3V.
  • each test circuit also includes an eMMC IO pin, which is provided at one end of the circuit board and is coupled to the memory card to be tested.
  • each test circuit also includes a light-emitting circuit, which is coupled to the controller.
  • the light-emitting circuits in the plurality of test circuits are arranged side by side and arranged at one end of the circuit board, and are arranged opposite to the controller at both ends of the circuit board.
  • test equipment includes at least one test board connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time, wherein the test board is the test board in the first aspect described above.
  • the beneficial effects of the present application are: multiple test circuits are provided on the circuit board, and multiple memory cards are tested at a time, thereby improving test efficiency.
  • FIG. 1 is a schematic diagram of a test board according to the first embodiment of the present application.
  • FIG. 2 is a schematic circuit diagram of a test circuit on a test board according to an embodiment of the present application.
  • FIG. 3 is a top view of a test board according to a second embodiment of the application.
  • FIG. 4 is a front view of a test board according to a second embodiment of the application.
  • the test board 10 is used to test a memory card, wherein the memory card includes but is not limited to SD (Secure Digital Memory Card) card, TF (Trans-flash Card) card, MMC (Multi-Media Card) card, EMMC (Embedded Multi Media Card) ) Card, EMCP (Embedded Multi-Chip Package) card, CF (Compact Flash) card.
  • the test board 10 includes a circuit board 11 and a plurality of test circuits 12. A plurality of test circuits 12 are disposed on the circuit board 11 and are independent of each other. Each test circuit 12 is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
  • multiple test circuits 12 are provided on the circuit board 11 to test multiple memory cards at a time to improve test efficiency.
  • test circuit 12 is shown as a dotted frame in FIG. 1, and FIG. 1 The position of the specific circuit part in the test circuit 12 on the circuit board 11 is not specifically shown in FIG.
  • test circuits 12 are disposed on the circuit board 11.
  • test circuits 12 are provided on the circuit board 11 as an example.
  • Each test circuit 12 includes a controller 121 for generating a test signal.
  • the controller 121 may be implemented using an integrated chip.
  • the controller 121 may be a DM8371 controller.
  • FIGS. 3 and 4 it is a top view and a front view of a test board according to a second embodiment of the present application.
  • Controllers 121 in a plurality of test circuits 12 are alternately arranged on opposite sides of the circuit board 11.
  • 8 test circuits 12 are shown on the circuit board 11 in FIG. 2, that is, the test board 10 includes 8 test circuits 12, but those skilled in the art can understand that according to the size of the circuit board 11, it can be set For other number of test circuits 12, for example, four, at this time, four test circuits are alternately arranged on opposite sides of the circuit board 11, so that the size of the circuit board 11 becomes smaller.
  • the test circuit 12 further includes a first transformer circuit 122.
  • the input terminal of the first transformer circuit 122 is coupled to the power interface 123, and the output terminal is coupled to the controller 121 to convert the external voltage V0 into the first voltage V1 and provide it to the controller 121.
  • the controller 121 works under the action of the first voltage V1.
  • the test circuit 12 further includes a second transformer circuit 124, a third transformer circuit 125 and a selection circuit 126, wherein the input terminals of the second transformer circuit 124 and the third transformer circuit 125 are both connected to the power supply 123 is coupled, and the output terminal is coupled to the memory card to be tested through the selection circuit 126.
  • the second transformer circuit 124 converts the external voltage V0 to the second voltage V2
  • the third transformer circuit 125 converts the external voltage V0 to the third voltage V3, and the second voltage V2 or the third voltage V3 passes through the selection circuit 126 Provide to the memory card to be tested.
  • the memory card to be tested operates under the action of the second voltage V2 or the third voltage V3.
  • the external voltage V0 is converted into the second voltage V2 and the third voltage V3 through the two transformer circuits, respectively, and is selected by the selection circuit 126 to be provided to the memory card to be tested, thereby enabling the memory to be tested
  • the card works, so that memory cards with different operating voltages can be tested, increasing the type of memory card to be tested.
  • the first voltage V1 is 1.2V
  • the second voltage V2 is 1.8V
  • the third voltage V3 is 3.3V.
  • the memory card to be tested uses the eMMC protocol, that is, the memory card to be tested is a memory card of the eMMC protocol.
  • the memory card to be tested is a memory card of the eMMC protocol
  • the memory card to be tested includes an interface contact piece, which is used to establish an electrical connection between the memory card to be tested and an external device, for example, the test board 10.
  • the test circuit 12 also includes an eMMC IO pin 127.
  • the eMMC IO pin 127 is coupled to the controller 121, and it executes the eMMC protocol.
  • the eMMC IO pin 127 is electrically connected to the interface contact of the memory card to be tested, and then the memory card to be tested receives the test signal for testing.
  • the interface contacts of the eMMC protocol memory card include 3.3V power contacts (VCC), ground contacts (GND), clock contacts (CLK), command contacts (CMD), and 4 data contacts (D0-D3), in this example, the settings of 8 interface contacts are as follows:
  • Sub contact number definition Sub contact number definition 1 D1 5 D2 2 CMD 6 VCC 3 GND 7 D0 4 D3 8 CLK
  • the 3.3V power contact (VCC) is used to receive the third voltage V3 output by the third transformer circuit 125.
  • the standard eMMC protocol needs to provide two power inputs of VCC (3.3V) and VCCQ (3.3V or 1.8V), and 8 data pins.
  • the NM card provided in this embodiment is provided with 8 Interface contacts, of which there are only VCC pins, so only 3.3V power input is reserved, and only four data interface contacts are set.
  • the eMMC IO pins 127 of the plurality of test circuits 12 are provided at one end of the circuit board 11.
  • the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested.
  • the eMMC IO pin 127 of the test circuit 12 may be coupled to the memory card to be tested through a connector, for example, setting Another circuit board with a plug slot.
  • the test board 10 is connected to another circuit board through the insertion slot, and the memory card to be tested is placed on the other circuit board, and then the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested.
  • the test circuit 12 further includes a light emitting circuit 128.
  • the light emitting circuit 128 is coupled to the controller 121.
  • the light emitting circuit 128 is used to indicate the test condition of the memory card to be tested. For example, it indicates whether the test of the memory card to be tested is normal. When the light-emitting circuit 128 emits light, it indicates that the memory card to be tested is being tested. When the light-emitting circuit 128 does not emit light, it indicates that the memory card to be tested is not tested, that is, a test failure occurs.
  • the light emitting circuit 128 includes an LED lamp.
  • the light emitting circuits 128 in the plurality of test circuits 12 are arranged side by side and arranged at one end of the circuit board 11, and are arranged opposite to the controller 121 at both ends of the circuit board 11.
  • each circuit part of the test circuit 12 on the circuit board 11 is not limited, so each circuit in the test circuit 12 is not specifically shown in FIGS. 3 and 4 The position of the part on the circuit board 11.
  • the test device includes at least one test board, and the at least one test board is connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time.
  • the test board is the test board 10 of the above embodiment.
  • one test board can test multiple memory cards to be tested at the same time. With at least one test board, the number of memory cards to be tested that can be tested simultaneously increases, improving the efficiency of one test.

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  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

A test board (10) and a test device. The test board (10) is used for testing a memory card, and comprises a circuit board (11) and a plurality of test circuits (12) disposed on the circuit board (11) and independent from each other, each of the plurality of test circuits (12) being coupled to one memory card to be tested so as to provide a test signal for said memory card. By providing the plurality of test circuits (12) on the circuit board (11), the test board (10) improves the test efficiency of the memory card.

Description

一种用于测试存储卡的测试板及测试设备Test board and test equipment for testing memory card 【技术领域】【Technical field】
本申请的所公开实施例涉及存储技术领域,且更具体而言,涉及一种用于测试存储卡的测试板及测试设备。The disclosed embodiments of the present application relate to the field of storage technology, and more specifically, to a test board and test equipment for testing a memory card.
【背景技术】【Background technique】
存储卡是用于智能设备上的独立存储介质,例如,智能手机、数码相机、便携式电脑等,一般为卡片的形态。存储卡在插入到智能设备上投入使用前,需要对存储卡进行兼容性测试,例如,信息识别、读取、热插拔等。Memory cards are independent storage media used on smart devices, such as smart phones, digital cameras, portable computers, etc., generally in the form of cards. Before a memory card is inserted into a smart device and put into use, a compatibility test needs to be performed on the memory card, for example, information recognition, reading, hot swapping, etc.
目前的测试方法为人工测试,并且,一次只能单个存储卡,测试效率低。The current testing method is manual testing, and only a single memory card can be used at a time, and the testing efficiency is low.
【发明内容】[Invention content]
根据本申请的实施例,本申请提出一种用于测试存储卡的测试板和测试设备,以提高存储卡的测试效率。According to an embodiment of the present application, the present application proposes a test board and test equipment for testing a memory card, so as to improve the test efficiency of the memory card.
根据本申请的第一方面,提供一种测试板,用于测试存储卡。该测试板包括:电路板;以及多个测试电路,设置于电路板上且彼此相互独立,每个测试电路均与一个待测存储卡耦接,以向待测存储卡提供测试信号。According to the first aspect of the present application, a test board is provided for testing a memory card. The test board includes: a circuit board; and a plurality of test circuits, which are disposed on the circuit board and are independent of each other. Each test circuit is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
其中,每个测试电路均包括用于产生测试信号的控制器。Among them, each test circuit includes a controller for generating a test signal.
其中,多个测试电路内的控制器交替设置于电路板的相对两侧。Among them, the controllers in the multiple test circuits are alternately arranged on opposite sides of the circuit board.
其中,每个测试电路还包括第一变压电路,输入端与电源接口耦接、输出端与控制器耦接,以将外部的电压转换为第一电压提供给控制器。Each test circuit further includes a first transformer circuit, the input terminal is coupled to the power interface, and the output terminal is coupled to the controller to convert the external voltage into the first voltage and provide it to the controller.
其中,每个测试电路还包括第二变压电路、第三变压电路和选择电路,其中第二变压电路和第三变压电路的输入端与电源接口耦接、输出端通过选择电路与待测存储卡耦接,以将外部的电压分别转换为第二电压和第三电压,并将第二电压或第三电压通过选择电路提供给待测存储卡。Each test circuit also includes a second transformer circuit, a third transformer circuit, and a selection circuit, where the input terminals of the second transformer circuit and the third transformer circuit are coupled to the power supply interface, and the output terminal is The memory card to be tested is coupled to convert the external voltage into a second voltage and a third voltage respectively, and the second voltage or the third voltage is provided to the memory card to be tested through the selection circuit.
其中,第一电压为1.2V,第二电压为1.8V,第三电压为3.3V。Among them, the first voltage is 1.2V, the second voltage is 1.8V, and the third voltage is 3.3V.
其中,待测存储卡采用eMMC协议;每个测试电路还包括eMMC IO引脚,设置于电路板的一端,与待测存储卡耦接。Among them, the memory card to be tested uses the eMMC protocol; each test circuit also includes an eMMC IO pin, which is provided at one end of the circuit board and is coupled to the memory card to be tested.
其中,每个测试电路还包括发光电路,与控制器耦接。Among them, each test circuit also includes a light-emitting circuit, which is coupled to the controller.
其中,多个测试电路内的发光电路并排设置并设置于电路板的一端,且与控制器相对设置于电路板的两端。Among them, the light-emitting circuits in the plurality of test circuits are arranged side by side and arranged at one end of the circuit board, and are arranged opposite to the controller at both ends of the circuit board.
根据本申请的第二方面,提供一种测试设备。该测试设备包括至少一个测试板,与多个待测存储卡连接,以同时对多个待测存储卡进行测试,其中测试板为上述第一方面中的测试板。According to the second aspect of the present application, a test device is provided. The test equipment includes at least one test board connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time, wherein the test board is the test board in the first aspect described above.
本申请的有益效果有:通过电路板上设置多个测试电路,一次测试多个存储卡,提高测试效率。The beneficial effects of the present application are: multiple test circuits are provided on the circuit board, and multiple memory cards are tested at a time, thereby improving test efficiency.
【附图说明】[Description of the drawings]
图1是本申请第一实施例的测试板的示意图。FIG. 1 is a schematic diagram of a test board according to the first embodiment of the present application.
图2是本申请实施例的测试板上的测试电路的电路示意图。2 is a schematic circuit diagram of a test circuit on a test board according to an embodiment of the present application.
图3是本申请第二实施例的测试板的俯视图。FIG. 3 is a top view of a test board according to a second embodiment of the application.
图4是本申请第二实施例的测试板的正视图。4 is a front view of a test board according to a second embodiment of the application.
【具体实施方式】【detailed description】
本说明书及权利要求书通篇中所用的某些用语指代特定部件。如所属领域的技术人员可以理解的是,电子设备制造商可利用不同名称来指代同一个部件。本文并非以名称来区分部件,而是以功能来区分部件。在以下说明书及权利要求书中,用语“包括”是开放式的限定词语,因此其应被解释为意指“包括但不限于…”。另外,用语“耦合”旨在意指间接电耦接或直接电耦接。因此,当一个装置耦合到另一装置时,则这种耦接可以是直接电耦接或通过其他装置及耦接部而实现的间接电耦接。Certain terms used throughout this specification and claims refer to specific components. As those skilled in the art can understand, electronic device manufacturers can use different names to refer to the same component. This article does not distinguish parts by name, but by function. In the following description and claims, the term "including" is an open-ended qualified word, so it should be interpreted to mean "including but not limited to...". In addition, the term "coupled" is intended to mean indirect electrical coupling or direct electrical coupling. Therefore, when one device is coupled to another device, such coupling may be direct electrical coupling or indirect electrical coupling through other devices and coupling parts.
如图1所示,是本申请第一实施例的测试板的示意图。该测试板10用于测试存储卡,其中存储卡包括但不限于SD(Secure Digital Memory Card)卡、TF(Trans-flash Card)卡、MMC(Multi-Media Card)卡、EMMC(Embedded Multi Media Card)卡,EMCP(Embedded Multi-Chip Package)卡、CF(Compact Flash)卡。该测试板10包括电路板11和多个测试电路12。多个测试电路12设置于电路板11上且彼此相互独立,每个测试电路12均与一个待测存储卡耦接,以向待测存储卡提供测试信号。As shown in FIG. 1, it is a schematic diagram of the test board according to the first embodiment of the present application. The test board 10 is used to test a memory card, wherein the memory card includes but is not limited to SD (Secure Digital Memory Card) card, TF (Trans-flash Card) card, MMC (Multi-Media Card) card, EMMC (Embedded Multi Media Card) ) Card, EMCP (Embedded Multi-Chip Package) card, CF (Compact Flash) card. The test board 10 includes a circuit board 11 and a plurality of test circuits 12. A plurality of test circuits 12 are disposed on the circuit board 11 and are independent of each other. Each test circuit 12 is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
在本实施例中,通过电路板11上设置多个测试电路12,一次测试多个存储卡,提高测试效率。In this embodiment, multiple test circuits 12 are provided on the circuit board 11 to test multiple memory cards at a time to improve test efficiency.
需要说明的是,在本申请中,不限制测试电路12内的具体电路部分及其在电路板11上的位置,因此,在图1中测试电路12被示出为虚线框,并且,图1中并未具体示出测试电路12内的具体电路部分在电路板11上的位置。It should be noted that in this application, the specific circuit part in the test circuit 12 and its position on the circuit board 11 are not limited, therefore, the test circuit 12 is shown as a dotted frame in FIG. 1, and FIG. 1 The position of the specific circuit part in the test circuit 12 on the circuit board 11 is not specifically shown in FIG.
在一实施例中,8个测试电路12设置于电路板11上。In an embodiment, eight test circuits 12 are disposed on the circuit board 11.
下面以电路板11上设置有8个测试电路12为例进行说明。The following uses an example in which eight test circuits 12 are provided on the circuit board 11 as an example.
如图2所示,是本申请实施例的测试板上的测试电路的电路示意图,每个测试电路12均包括用于产生测试信号的控制器121。在一示例中,控制器121可以采用集成芯片来实现。例如,控制器121可以为DM8371控制器。As shown in FIG. 2, it is a schematic circuit diagram of a test circuit on a test board according to an embodiment of the present application. Each test circuit 12 includes a controller 121 for generating a test signal. In an example, the controller 121 may be implemented using an integrated chip. For example, the controller 121 may be a DM8371 controller.
同时如图3和图4所示,是本申请第二实施例的测试板的俯视图和正视图,多个测试电路12内的控制器121交替设置于电路板11的相对两侧。需要说明的是,图2中电路板11上示出了8个测试电路12,即测试板10包括8个测试电路12,但是本领域的技术人员可以理解,根据电路板11的尺寸,可以设置其他数量个测试电路12,例如,4个,此时4个测试电路交替设置于电路板11的相对两侧,这样电路板11的尺寸变小。At the same time, as shown in FIGS. 3 and 4, it is a top view and a front view of a test board according to a second embodiment of the present application. Controllers 121 in a plurality of test circuits 12 are alternately arranged on opposite sides of the circuit board 11. It should be noted that 8 test circuits 12 are shown on the circuit board 11 in FIG. 2, that is, the test board 10 includes 8 test circuits 12, but those skilled in the art can understand that according to the size of the circuit board 11, it can be set For other number of test circuits 12, for example, four, at this time, four test circuits are alternately arranged on opposite sides of the circuit board 11, so that the size of the circuit board 11 becomes smaller.
如图2所示,测试电路12还包括第一变压电路122。第一变压电路122的输入端与电源接口123耦接、输出端与控制器121耦接,以将外部的电压V0转换为第一电压V1提供给控制器121。控制器121在第一电压V1的作用工作。As shown in FIG. 2, the test circuit 12 further includes a first transformer circuit 122. The input terminal of the first transformer circuit 122 is coupled to the power interface 123, and the output terminal is coupled to the controller 121 to convert the external voltage V0 into the first voltage V1 and provide it to the controller 121. The controller 121 works under the action of the first voltage V1.
如图2所示,测试电路12还包括第二变压电路124、第三变压电路125和选择电路126,其中第二变压电路124和第三变压电路125的输入端均与电源接口123耦接、输出端通过选择电路126与待测存储卡耦接。第二变压电路124将外部的电压V0转换为第二电压V2,第三变压电路125将外部的电压V0转换为第三电压V3,并且第二电压V2或第三电压V3通过选择电路126提供给待测存储卡。待测存储卡在第二电压V2或或第三电压V3的作用下工作。As shown in FIG. 2, the test circuit 12 further includes a second transformer circuit 124, a third transformer circuit 125 and a selection circuit 126, wherein the input terminals of the second transformer circuit 124 and the third transformer circuit 125 are both connected to the power supply 123 is coupled, and the output terminal is coupled to the memory card to be tested through the selection circuit 126. The second transformer circuit 124 converts the external voltage V0 to the second voltage V2, the third transformer circuit 125 converts the external voltage V0 to the third voltage V3, and the second voltage V2 or the third voltage V3 passes through the selection circuit 126 Provide to the memory card to be tested. The memory card to be tested operates under the action of the second voltage V2 or the third voltage V3.
通过上述的方式,通过两个变压电路分别将外部的电压V0转换为第二电压V2和第三电压V3,在通过选择电路126进行选择,以提供给待测存储卡,进而使得待测存储卡工作,这样不同工作电压的存储卡均可被测试,增加了待测存储卡的类型。In the above manner, the external voltage V0 is converted into the second voltage V2 and the third voltage V3 through the two transformer circuits, respectively, and is selected by the selection circuit 126 to be provided to the memory card to be tested, thereby enabling the memory to be tested The card works, so that memory cards with different operating voltages can be tested, increasing the type of memory card to be tested.
在一示例中,第一电压V1为1.2V,第二电压V2为1.8V,第三电压V3为3.3V。In one example, the first voltage V1 is 1.2V, the second voltage V2 is 1.8V, and the third voltage V3 is 3.3V.
在一实施例中,待测存储卡采用eMMC协议,即待测存储卡为eMMC协议的存储卡。In an embodiment, the memory card to be tested uses the eMMC protocol, that is, the memory card to be tested is a memory card of the eMMC protocol.
下面以eMMC协议的存储卡为例进行说明,例如,NM卡(多媒体存储卡)。当待测存储卡为eMMC协议的存储卡时,该待测存储卡包括接口触片,其用于建立该待测存储卡与外部设备的电连接,例如,测试板10。The following uses the eMMC protocol memory card as an example to illustrate, for example, NM card (multimedia memory card). When the memory card to be tested is a memory card of the eMMC protocol, the memory card to be tested includes an interface contact piece, which is used to establish an electrical connection between the memory card to be tested and an external device, for example, the test board 10.
如图2所示,测试电路12还包括eMMC IO引脚127。eMMC IO引脚127与控制器121耦接,并且其执行eMMC协议。eMMC IO引脚127与待测存储卡的接口触片电连接,进而待测存储卡接收测试信号进行测试。在一示例中,eMMC协议的存储卡的接口触片包括3.3V电源触片(VCC)、接地触片(GND)、时钟触片(CLK)、命令触片(CMD)和4个数据触片(D0-D3),在本示例中,8个接口触片的设置如下:As shown in FIG. 2, the test circuit 12 also includes an eMMC IO pin 127. The eMMC IO pin 127 is coupled to the controller 121, and it executes the eMMC protocol. The eMMC IO pin 127 is electrically connected to the interface contact of the memory card to be tested, and then the memory card to be tested receives the test signal for testing. In one example, the interface contacts of the eMMC protocol memory card include 3.3V power contacts (VCC), ground contacts (GND), clock contacts (CLK), command contacts (CMD), and 4 data contacts (D0-D3), in this example, the settings of 8 interface contacts are as follows:
子触片号Sub contact number 定义definition 子触片号Sub contact number 定义definition
11 D1D1 55 D2D2
22 CMDCMD 66 VCCVCC
33 GNDGND 77 D0D0
44 D3D3 88 CLKCLK
其中,3.3V电源触片(VCC)用于接收第三变压电路125输出的第三电压V3。标准的eMMC协议需要提供VCC(3.3V)和VCCQ(3.3V或1.8V)两路电源输入,以及8个数据管脚,本实施例提供的NM卡为了减小存储卡的面积,设置8个接口触片,其中只有VCC引脚,因此只保留了3.3V电源输入,并只设置了4个数据接口触片。Among them, the 3.3V power contact (VCC) is used to receive the third voltage V3 output by the third transformer circuit 125. The standard eMMC protocol needs to provide two power inputs of VCC (3.3V) and VCCQ (3.3V or 1.8V), and 8 data pins. In order to reduce the area of the memory card, the NM card provided in this embodiment is provided with 8 Interface contacts, of which there are only VCC pins, so only 3.3V power input is reserved, and only four data interface contacts are set.
在本实施例中,同时如图4所示,多个测试电路12的eMMC IO引脚127设置于电路板11的一端。如上所述,测试电路12的eMMC IO引脚127与待测存储卡耦接,在一示例中,测试电路12的eMMC IO引脚127可以通过连接件与待测存储卡耦接,例如,设置有插接槽的另一电路板。测试板10通过插接槽插接到另一电路板上,而待测存储卡放置在另一电路板上,进而测试电路12的eMMC IO引脚127与待测存储卡耦接。In this embodiment, as shown in FIG. 4 at the same time, the eMMC IO pins 127 of the plurality of test circuits 12 are provided at one end of the circuit board 11. As mentioned above, the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested. In one example, the eMMC IO pin 127 of the test circuit 12 may be coupled to the memory card to be tested through a connector, for example, setting Another circuit board with a plug slot. The test board 10 is connected to another circuit board through the insertion slot, and the memory card to be tested is placed on the other circuit board, and then the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested.
如图2所示,测试电路12还包括发光电路128。发光电路128与控制器121耦接。发光电路128用于指示待测存储卡的测试情况。例如,指示待测存储卡的测试是否正常,当发光电路128发光时,表示待测存储卡正在被测试,当发光电路128不发光时,表示待测存储卡没有被测试,即出现测试故障。在一实施例中,发光电路128包括LED灯。同时如图4所示,多个测试电路12内的 发光电路128并排设置并设置于电路板11的一端,且与控制器121相对设置于电路板11的两端。As shown in FIG. 2, the test circuit 12 further includes a light emitting circuit 128. The light emitting circuit 128 is coupled to the controller 121. The light emitting circuit 128 is used to indicate the test condition of the memory card to be tested. For example, it indicates whether the test of the memory card to be tested is normal. When the light-emitting circuit 128 emits light, it indicates that the memory card to be tested is being tested. When the light-emitting circuit 128 does not emit light, it indicates that the memory card to be tested is not tested, that is, a test failure occurs. In one embodiment, the light emitting circuit 128 includes an LED lamp. At the same time, as shown in FIG. 4, the light emitting circuits 128 in the plurality of test circuits 12 are arranged side by side and arranged at one end of the circuit board 11, and are arranged opposite to the controller 121 at both ends of the circuit board 11.
需要说明的是,在本申请中,不限制测试电路12中的每个电路部分在电路板11上的位置,因此在图3和图4中并未具体示出测试电路12中的每个电路部分在电路板11上的位置。It should be noted that in this application, the position of each circuit part of the test circuit 12 on the circuit board 11 is not limited, so each circuit in the test circuit 12 is not specifically shown in FIGS. 3 and 4 The position of the part on the circuit board 11.
本申请还提供一种测试设备。该测试设备包括至少一个测试板,至少一个测试板与多个待测存储卡连接,以同时对多个待测存储卡进行测试。该测试板为上述实施例的测试板10。This application also provides a test device. The test device includes at least one test board, and the at least one test board is connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time. The test board is the test board 10 of the above embodiment.
在本实施例中,一个测试板可同时测试多个待测存储卡,通过至少一个测试板,可以同时测试的待测存储卡的数量增加,提高一次测试效率。In this embodiment, one test board can test multiple memory cards to be tested at the same time. With at least one test board, the number of memory cards to be tested that can be tested simultaneously increases, improving the efficiency of one test.
所属领域的技术人员易知,可在保持本申请的教示内容的同时对装置及方法作出诸多修改及变动。因此,以上公开内容应被视为仅受随附权利要求书的范围的限制。Those skilled in the art will readily know that many modifications and changes can be made to the device and method while maintaining the teaching content of the present application. Therefore, the above disclosure should be considered as limited only by the scope of the appended claims.

Claims (11)

  1. 一种测试板,用于测试存储卡,其特征在于,包括:A test board for testing a memory card, characterized in that it includes:
    电路板;以及Circuit board; and
    多个测试电路,设置于所述电路板上且彼此相互独立,每个所述测试电路均与一个待测存储卡耦接,以向所述待测存储卡提供测试信号。A plurality of test circuits are provided on the circuit board and are independent of each other. Each test circuit is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
  2. 如权利要求1中所述的测试板,其特征在于,每个所述测试电路均包括用于产生所述测试信号的控制器。The test board according to claim 1, wherein each of the test circuits includes a controller for generating the test signal.
  3. 如权利要求2中所述的测试板,其特征在于,所述多个测试电路内的所述控制器交替设置于所述电路板的相对两侧。The test board according to claim 2, wherein the controllers in the plurality of test circuits are alternately arranged on opposite sides of the circuit board.
  4. 如权利要求2中所述的测试板,其特征在于,每个所述测试电路还包括第一变压电路,输入端与电源接口耦接、输出端与所述控制器耦接,以将外部的电压转换为第一电压提供给所述控制器。The test board according to claim 2, wherein each of the test circuits further includes a first transformer circuit, an input terminal is coupled to the power interface, and an output terminal is coupled to the controller to connect the external The voltage is converted to a first voltage and provided to the controller.
  5. 如权利要求2中所述的测试板,其特征在于,每个所述测试电路还包括第二变压电路、第三变压电路和选择电路,其中所述第二变压电路和所述第三变压电路的输入端与电源接口耦接、输出端通过所述选择电路与所述待测存储卡耦接,以将外部的电压分别转换为第二电压和第三电压,并将所述第二电压或所述第三电压通过所述选择电路提供给所述待测存储卡。The test board according to claim 2, wherein each of the test circuits further includes a second transformer circuit, a third transformer circuit and a selection circuit, wherein the second transformer circuit and the first The input terminal of the three-transformer circuit is coupled to the power interface, and the output terminal is coupled to the memory card to be tested through the selection circuit to convert the external voltage into a second voltage and a third voltage, respectively, and The second voltage or the third voltage is provided to the memory card under test through the selection circuit.
  6. 如权利要求4中所述的测试板,其特征在于,所述第一电压为1.2V。The test board according to claim 4, wherein the first voltage is 1.2V.
  7. 如权利要求5中所述的测试板,其特征在于,所述第二电压为1.8V,所述第三电压为3.3V。The test board according to claim 5, wherein the second voltage is 1.8V and the third voltage is 3.3V.
  8. 如权利要求6或7中所述的测试板,其特征在于,所述待测存储卡采用eMMC协议;The test board according to claim 6 or 7, wherein the memory card to be tested uses the eMMC protocol;
    每个所述测试电路还包括eMMC IO引脚,设置于所述电路板的一端,与所述待测存储卡耦接。Each test circuit further includes an eMMC IO pin, which is provided at one end of the circuit board and is coupled to the memory card to be tested.
  9. 如权利要求2中所述的测试板,其特征在于,每个所述测试电路还包括发光电路,与所述控制器耦接。The test board according to claim 2, wherein each of the test circuits further includes a light-emitting circuit coupled to the controller.
  10. 如权利要求9中所述的测试板,其特征在于,所述多个测试电路内的发光电路并排设置并设置于所述电路板的一端,且与所述控制器相对设置于所述电路板的两端。The test board according to claim 9, wherein the light emitting circuits in the plurality of test circuits are arranged side by side and at one end of the circuit board, and are arranged opposite to the controller on the circuit board Both ends.
  11. 一种测试设备,其特征在于,包括至少一个如权利要求1-10中至少一项所述的测试板,与多个待测存储卡连接,以同时对所述多个待测存储卡进行测试。A test device, characterized by comprising at least one test board according to at least one of claims 1-10, connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time .
PCT/CN2019/096432 2018-12-26 2019-07-17 Test board for testing memory card, and test device WO2020134036A1 (en)

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